PCB Design Flow &

PCB Design Input

Data Required for PCB Layout

2005 PCB Libraries, Inc.
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ƒ DATA SHEETS
Physical description data sheets from the component manufacturer, of all component land
patterns that are not in the Wind River PowerPCB Libraries. Only mechanical data is required,
IE: Pin Spacing in Metric Units, Lead Size or Hole Size in Metric Units, Pin Numbers.

ƒ CONNECTOR PIN ASSIGNMENTS

Identify where is pin 1, pin 2, pin 3 and the connector End Pins assignments

ƒ Constraint Drawing
Board outline illustrating dimensions in Metric Units and the location of all fixed component
coordinates in Metric Units. IE: Mounting Holes, Connectors, Switches, Potentiometers, etc.
Note: The CAD origin, (X=0, Y=0) should be in the lower left Mounting Hole of the board.

ƒ Netlist
PowerPCB format netlist including the shape names of the library land patterns is required.
The header at the top of the netlist should be: !PADS-POWERPCB-V4.0-METRIC!

ƒ SCHEMATIC
Need schematic to debug the netlist if “one pin nets” occur or if only one pin of a two pin part is
in the netlist. Schematic is also used to place components.

ƒ PART PLACEMENT
Pencil sketch of suggested component placement layout map of major components. It is highly
recommended that the engineer participate in the part placement to avoid duplication.

ƒ POWER PLANES
Power and Ground Plane instructions including bypass capacitor fanout, BGA & QFP fanout. If
there are multiple nets on the same layer, need Split Plane information.

ƒ TRACE ROUTING RULES

Clock, or High Speed trace instructions - Matched Length, Differential Pairs and Trace Widths
in Metric Units. Special Route Layers, Impedance, etc. and include the net name reference.
What needs to be hand routed and what can be auto-routed?

ƒ SILKSCREEN LEGEND
Silkscreen text identification requirements including copyright, board name, part number,
revision level, connector ID’s, reference designator rotations and polarity markings.

ƒ MANUFACTURING INFORMATION
Special fabrication notes, layer construction and panel information. Provide special assembly
notes and drawings that illustrate special assembly information.

2005 PCB Libraries, Inc. 11/26/2004

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 PCB Design Flow Process
Create a set of PCB design flow processes that you can use as a guide to step you through the development of a PCB layout. An
efficient design flow helps you avoid duplicating steps. Once you have completed a step, you should never need to repeat it.

1. DESIGN REVIEW
♦ A comprehensive design review should take place between all applicable disciplines:
i.e. Hardware Engineer, Project Management, Layout, Mechanical, and Manufacturing.
♦ For the PCB designer the following information needs to be determined: Layer stack-
up and plane layers, PCB thickness and board material, default trace width,
component complexity and quantity of new components, proto board or
production/auto route or manual route, high speed rules, impedance control, testability
and Schedule.

2. COMPONENT DATA SHEETS

♦ Engineering Department will submit all component data sheets prior to the start date of
a PCB layout, of all of the components that cannot be located in your Library
Handbook.

3. MECHANICAL DATA SHEET

♦ Engineering Department will also provide a Board Outline constraint drawing if one is
available, or as soon as possible. The mechanical constraint drawing should be drawn
from the top side, include all mounting holes, fixed connector locations, indicate the
Layer Stack-up and board thickness of the PCB. The origin for the constraint drawing
should be the lower left mounting or tooling hole.

4. PART NUMBER & BOARD NAME ASSIGNMENT

♦ After the Engineering Department submits the data sheets, a part number and a board
name are assigned to the PC Board.

5. LIBRARY MANAGEMENT
♦ As you create your library parts, using the naming convention that you developed,
populate the applicable blank pages with the new decals, representing the pin
assignments and all applicable notes and documentation for each part. Keep the PDF
file “Up to Date” every time new parts are built.

6. CUSTOM BOARD OUTLINE

♦ Select the correct PADS “Start File” that matches the layering scheme that the
Engineer has provided and copy the master “Start File” to a new name.
♦ Fill out the Title Block.
♦ Enter the Board Outline.
♦ Add all Mounting/Tooling Holes and Fiducials that are necessary then glue them down.
♦ Move the Targets to the outer extremities of the board outline.
♦ Fully dimension the board edges and at least one mounting hole.
♦ Create the “Auto router Keep-in/out” inside the Board Outline.

2005 PCB Libraries, Inc. 11/26/2004

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 PCB Design Flow Process
7. STANDARD BOARD OUTLINE
♦ If a Standard Board Outline is selected from the Library, the PCB Designer will fill out
the Title Block and edit the text on Layer 26 that will eventually go on the Silkscreen.
♦ Setup the correct Layer and Color Scheme.

8. NETLIST
♦ At the start of the PCB design, the Engineering Department will provide a net list, from
the schematic capture tool, in PADS format starting with the PADS-PowerPCB header:
! PADS-POWERPCB-V4.0-METRIC!
♦ The net list will contain all of the correct PADS Decal Shape Names.
♦ The net list will not contain Pin Names over four characters long.
♦ The following is a list of acceptable pin names: Collector = C, Emitter = E, Base = B,
Anode = A, Cathode = C, Source = S, Drain = D, Gate = G, Positive = 1, Negative = 2.
♦ Import the netlist into PowerPCB. If errors are found, in the netlist, the Designer will
report them to the Project Engineer. The Project Engineer will fix the problems and
provide the PCB Designer with an updated netlist.
♦ After the net list is successfully imported into PADS, the PCB Designer will
Tools/Disperse the parts.

9. REPORTS
♦ Create and e-mail to Project Engineer Unused Pins, Part List 2 & Statistic Reports.
♦ PCB Designer must review Unused Pins list for 2 pin components.
♦ Project Engineer must review Unused Pins list for possible schematic errors.

10. PART PLACEMENT

♦ The Designer and Engineer will perform the part placement, or Engineers suggested
layout.
♦ The placement must meet the Engineers guidelines and design rules. Engineer will
provide the design rules.
♦ The placement must meet all manufacturing requirements.
♦ The placement must meet all routability requirements.
♦ Tools/Verify Design - check clearance to ensure no over lapping parts.

11. SPLIT PLANES

♦ Use CAM Plane option and use a 2D-Line to separate the different Plane Nets, or use
the Split/Mixed Plane option.
♦ Use the View/Nets feature to discriminate different nets by color.

2005 PCB Libraries, Inc. 11/26/2004

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 PCB Design Flow Process
12. SILKSCREEN
♦ Create Silkscreen (use 0.1mm snap grid) and bottom side etch text.
♦ All reference designators must be moved outside component, and must not exceed
two different rotations. All company identification & REV Blocks must be placed inside
the board outline. Default text height/width is .080”/.008” Minimum height/width is
.060”/.006”.
♦ All connectors should have text to identify the end-pins. Add connector & jumper text
names, if any.

13. 1ST SET OF QUALITY CONTROL PRINTS

♦ 1:1 scale Drill and Assembly drawing laser print or bond paper.
♦ All new Library Decals must be checked for Solder Pattern accuracy.
♦ Print Split Planes if applicable for Project Engineer to check.

14. FINAL PART PLACEMENT

♦ After Split Planes and New library Decals are checked, PCB Designer will make final
part placement adjustments.
♦ PCB Designer will make final silkscreen adjustments.

15. GENERATE OUTPUT FOR MECHANICAL PART PLACEMENT 3D MODEL

CHECKS USING SolidWorks or PRO-E TRANSLATORS

16. PREPARE LAYOUT FOR TRACE ROUTING

♦ Compare Schematic CAE net list with the PCB Design net list using Netcheck Tools.

17. SETUP DESIGN RULES

♦ Setup/Design Rules on “Default Clearance” rules and …
♦ Setup/Design Rules on “Net Clearance” rules are to be set up for Voltage, Ground and
Critical Nets.
♦ Set class rules for high-speed technology.

18. MANUAL ROUTING

♦ Manually Bus route memory sections using Copy/Paste command.
♦ Manually fan out all Voltages that connect to an inner layer plane using Via Share
technique.
♦ Manually fan out all Ground connections so that every Ground Pin gets its own Via.
♦ Manually route all other Voltages that require large trace widths.

2005 PCB Libraries, Inc. 11/26/2004

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 PCB Design Flow Process
(Manual Routing Continued)
♦ Manually route all high-speed matched length traces and critical nets.
♦ Use Tools/Verify Design/Check Planes to insure 100% fan out of all SMT Plane Pins.
♦ Use Tools/Verify Design/Check Clearances to insure no short circuits.
♦ If the design is a 2-Layer board, all voltages should be manually routed per Engineers
specification.

19. 2nd SET OF QUALITY PRINTS

♦ PCB Designer will print all layers that were affected by manual routing and give them
to the engineer.
♦ If the placement or pad-stacks have changed run check prints of assembly & drill
drawing.

20. SIGNAL INTEGRITY OUTPUT

♦ Generate a Hyperlynx file for signal analysis.

21. FIX ENGINEERS RED-LINED PRINTS

♦ Incorporate all of the Project Engineers corrections.
♦ If there were many corrections, PCB Designer will create a new set of check prints.

22. TESTABILITY
♦ The Project Engineer will be responsible for informing the PCB Designer the
Testability Rules, early in the Process. This includes the following questions:
‰ Does every Net need a test point or just some of the nets?
‰ Do voltage nets require extra test points?
‰ Do non-connected pins need to be testable?
‰ Will the Project Engineer add selective test points to the schematic?
‰ Can vias be used as test points, or do they have to be “Bottom Side” non-drilled
Pads?
‰ What size do the test points have to be, what is the point to point spacing
requirements & amount of pins per square inch?
‰ Are there vacuum requirements for the test fixture?
♦ If PCB Design requires testability on every net, the PCB Designer will add a test point
for every net, using PADS DFT Audit program and place the test points, near one of
the pins, of the net it belongs to.

2005 PCB Libraries, Inc. 11/26/2004

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 PCB Design Flow Process
23. ROUTE REMAINDER OF NON-CRITICAL ROUTES
♦ If the PC Board has a large number of production boards made, it should be 100 %
manually routed to reduce trace length, reduce via count and reduce layers.
♦ If Project Engineer requested a quick turn proto-type, use an auto router to route
remainder of board.
♦ If auto routing is used, clean up the traces on all layers after the auto router has
completed 100%
♦ Make and save a pre-auto routed version of the PCB. This will be use for future
revisions.

24. FINAL DRC CHECKS

♦ PCB Designer & Project Engineer: Tools/Verify Design – Check Clearances,
Continuity and Panes.

25. 3rd SET OF QUALITY PRINTS

♦ Create check prints of all Routed Layers, Silk-screens, Solder Masks & Paste Masks.
♦ Create check prints of final AutoCAD Drill & Assembly Drawings.
♦ Check final CAE Netlist with final CAD Netlist.

26. FINAL CAM OUTPUT

♦ Make final prints of AutoCAD Assembly & Drill Drawings.
♦ Create Fabrication Data that contains Gerber Data, Drill Data & Fabrication Drawing.
♦ Import the PADS ASCII file into CAM350 to extract an IPC-D-356 Netlist.
♦ Create Assembly X/Y Coordinate Data.
♦ Save all of the final output data to Source Safe.

2005 PCB Libraries, Inc. 11/26/2004

http://www.PCBLibraries.com