0% found this document useful (0 votes)
32 views2 pages

A Simple Three-Terminal IC Bandgap Reference

Uploaded by

Haoyu Liu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
32 views2 pages

A Simple Three-Terminal IC Bandgap Reference

Uploaded by

Haoyu Liu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

SESSION XVI: A/D and D/A Techniques Chairman: William G. Howard, Jr.

Motorola Inc., Mesa, Ariz.

FAM 16.1: A SimpleThree-Terminal IC Bandgap Reference


A. Paul Brokaw

Analog Devices, Inc.

Wilrnington, Mass.

The resistance of R1 is selected so that the total of the two


voltages, VOUT, is equal to the bandgap voltage plus (m-1)k To/q.
This is the optimum voltage to give zero TC at temperature To.
A CIRCUIT, illustrated in Figure 2, using collectorcurrent This circuit depends upon alpha match rather than high beta
sensing to reduce errors and provide more flexibility than the so that the base current is supplied by the amplifier and does not
conventional bandgap circuit’ will be described. Collector current contribute to output error.
sensing is used to fix the ratioof current density in twotransistors. A usefulfeature of the configuration is illustrated inFigure 3.
This ratio generates a temperature-proportional voltage which is The control loop stabilizes the base of 42 just above the bandgap
added to VBE to produce a temperature-stable sum voltage. voltage. The voltage divider between the circuit output and the
Conventional bandgap circuits use parallel current paths with base causes the output to be stabilized at a voltage greater than
voltage sensing connections between the paths.Thesecircuits the bandgap voltage. Adding R3 compensates any error due to
are typified by Figure 1, discussed earlier’ to illustrate the the base current which flows through R4.
operation of more complex, but fundamentally similar circuits. Theprincipleillustrated by Figure 3 has been used as the
In this well-known circuit parasitic currents exchanged between basis for an integratedcircuit voltage-reference design shown
the parallel paths are not accounted for in the theory and give schematically in Figure 4.
rise to beta-dependent voltage errors and temperature drift. The similarly numberedcomponentsinFigure 4 approx-
To generatehigher voltages with theconventional circuit, imately correspond to those in Figure 3. In the complete circuit,
it is necessary to stack junctions t o produce a multiple of the however, the current mirror
transistors Qlo and 9 1 1 are
bandgap or usesecond
a amplifier to multiply the bootstrappcd to the stabilized output voltage to improve input
separately stabilized bandgap voltage. voltage rejection ratio. Transistors Q, and 44 act as the output
The circuit of Figure 2 overcomestheselimitations. The
operating principle involves the followingcharacteristics. The V+
emitter area of Q1 is larger than that of Q2. Thus when VOUT is
low, making the voltage drop across R 1 and R 2 small, the base-
emitter voltage of Q1 nearly equals that of 4 2 . This results ina net
collector current exceeds the current in 4 2 . This results in a net
positive signal applied to the amplifier which causes the amplifier
to raise the output voltage. Alternately, if V ~ U Tis large, R 2
limits the current through Q1 to less than the current in 4 2 . The
net negative input to the amplifier causes it to reduce the output
voltage. As a consequence of these conditions at the extremes,
the amplifier drives the circuit output to a voltage resulting in
equal collector current in Q1 and Q2.
When thecollectorcurrents are equal, the areadifference
results in unequal current densities. The current densitydifference
generates a temperature-dependent voltage which appears across
R 2 The current in 4 2 equals that in Q1, making the current in
R1 twice that in R2. Accordingly, the voltage developed across
R, is also temperature dependent as shown by the expression in
Figure 2.

‘Widlar, R. J., IEEE Journal of SolidSlateCircuits, p. 2;


Feb., 1971.
‘Kuiik, K. E., IEEE Journal of Solid State Circuits, p. 222;
June. 1973.
3Brokaw, A. P . and Maidique, M. A., “A Fast. High-Precision,
Laser-Trimmed FET Input Operational Amplifier”,thisissue;
p. 142-1 43. FIGURE 1-Conventional band-gap circuit.

Authorized licensed use limited to: Universitatsbibliothek Erlangen Nurnberg. Downloaded on September 21,2024 at 12:48:07 UTC from IEEE Xplore. Restrictions apply.
driver and bootstrap followers with level translation and current reflected by Q13 andQ14to drive both Q4andthe level
gain provided by 43, R6, Q12 and Qg. The level translater Q12 translation circuit so that the voltage across R6 is made equal to
is used to provideequal bias for Q8 and Q g Theratioand that across R7 and R8.
impedance of R l o and R11 are selected to force the current in The epitaxiallayerFET, which is integral with Q5, insures
45 to be equal to the currents in Q 1 and Q2. This current is starting. Current-limit protection is provided by Rg and Qs.
The chip provides a 2.5 V reference output over a 4.5 V to
vi 40-V input range. Itoperatea at 1-mAstandbycurrent and is
fully current limited at the output. Breadboard tests and mono-
lithic realization of a simplified design based on the same circuit
concept3 indicate that yield to 30 ppm/OC should be substantial.

vi

Ehminate error due


to base current In
R 4 by settlng :

FIGURE 2-Idealized circuit illustrating basic configuration.

V+
FIGURE 3-Simplified circuit for developing higher output

L voltages.

FIGURE 5-Photograph of 37 mil x 6 2 mil monolithic die


FIGURE 4-Complete circuit of monolithic referencechip. showing thin-film resistors and balanced thermal layout.

1TC1
FIGURE 6-Transconductance and frequency compensationmodel.

Authorized licensed use limited to: Universitatsbibliothek Erlangen Nurnberg. Downloaded on September 21,2024 at 12:48:07 UTC from IEEE Xplore. Restrictions apply.

You might also like