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Bi CMOS

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12 views15 pages

Bi CMOS

Uploaded by

samiularefin2000
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Course title: VLSI Circuits and Design I

Course no.: EEE2213


Contact hours: 03
Credit: 3.0

Sarjana Shabab,
Lecturer. Dept. of EEE, RUET

08-Oct-23 1
Course Contents
• Overview of Integrated Circuits: IC 555 timer and its application, VCO, and PLL.
• IC Technology and Basic Electrical Properties of MOS & BiCMOS: Moore’s law, IC(s) and Scale integration, Glue logic,
Evolution of VLSI, VLSI design flow, Basic MOSFET structures, Switch level modelling of PMOS & NMOS, Compound gates using
CMOS, Transmission logic, Tristates, CMOS memory elements, NMOS inverter, Pull-Up to Pull-Down ratio of NMOS inverter,
BiCMOS inverters, Latch up in CMOS circuits.
• Fabrication and Design Processes of CMOS: CMOS fabrication, Twin-Tub fabrication process of CMOS, Lambda & Micron
based design rules and layout, Basics of stick diagrams, Stick diagram rules, Design of complementary gates using stick
diagrams.
• Circuit Concepts & Scaling of MOS Circuits: Sheet resistance, Inverter resistance calculation, Area capacitance Calculation
of MOS structures, Silicides, Scaling models and scaling factors, Limits of miniaturization.
• Sub-System Design Processes, Layout & Computational Elements: Problems in Large VLSI systems, Basic bus
architectures, 4-bit shifter design, 4x4 barrel shifter, Regularity, Design of an ALU sub-system, Adder, Serial parallel multipliers,
System timing considerations, Dynamic register element, 4-bit dynamic shift registers, Three transistors and one transistor
memory cells, Dynamic & static flip-flops.
• Practical Aspects of Design Tools and Testability of CMOS Design: Transition delay calculations of inverters, CIF code &
geometric CIF primitives, CAD tools, Design rule checkers (DRC), Layout versus schematic (LVS), Rule of ten in VLSI systems
test costs, Sensitized path based testing, SA0 & SA1 faults in combinational logic testing.
• Ultra-Fast VLSI Circuits & Systems: Introduction to GaAs technology, Superior electron mobility of GaAs technology, GaAs
devices, FinFET & FDSOI technology.
• Introduction and Application of VHDL: VHDL background and basic concepts, Structural specifications of hardware design
organization and parameterization, VHDL design of finite state machines (FSM).
• FPGA:
• Internal architecture, Programming languages, FPGA programming using a standard language, and applications.

08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 2


Resources

Textbooks:

• Basic VLSI Design by Pucknell


• CMOS VLSI Design by David Harris

08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 3


08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 4
BiCMOS Techology

08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 5


08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 6
Construction

08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 7


08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 8
08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 9
BiCMOS Inverter

• When designing with BiCMOS in mind, the logical approach is


to use MOS switches to perform the logic function and bipolar
transistors to drive the output loads.

08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 10


Observations

08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 11


Improved biCMOS Inverter

08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 12


Improved biCMOS Inverter

08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 13


Improved biCMOS Inverter

08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 14


Latchup in BiCMOS

08-Oct-23 Sarjana Shabab, Lecturer. Dept. of EEE, RUET 15

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