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TuongAnhKiet Assessing Exercises of Chapter 2

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17 views3 pages

TuongAnhKiet Assessing Exercises of Chapter 2

article

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Tưởng Anh Kiệt
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2.1 What is a stored program computer?

A stored program computer is a type of computer where instructions to be executed


(program) are stored in the computer's memory alongside the data. This allows the computer
to read and execute the instructions sequentially or based on conditions, enabling automatic
control of the computation process. This concept, proposed by John von Neumann, forms
the basis of modern computers, allowing them to be more flexible and capable of executing
complex tasks without needing to be manually reprogrammed for each specific task.

2.2 What are the four main components of any general-purpose computer?

The four main components of any general-purpose computer are:

1. Central Processing Unit (CPU): Executes instructions and processes data.


2. Memory: Stores data and instructions temporarily (RAM) and permanently (ROM, hard
drives, SSDs).
3. Input/Output (I/O) Devices: Allow interaction with the computer, enabling data input
(keyboard, mouse) and output (monitor, printer).
4. System Bus: Facilitates communication between the CPU, memory, and I/O devices by
transferring data, addresses, and control signals.

2.3 At the integrated circuit level, what are the three principal constituents of a computer
system?

At the integrated circuit level, the three principal constituents of a computer system are:

1. Processor (CPU): The central unit that performs arithmetic and logic operations, controls
instructions, and processes data.
2. Memory: Integrated circuits that store data and instructions, including both volatile
memory (RAM) for temporary storage and non-volatile memory (ROM, flash memory) for
permanent storage.
3. Interconnects (Buses): Electrical pathways, such as data buses and control buses, that
facilitate communication and data transfer between the processor, memory, and other
peripheral devices.

2.4 Explain Moore’s law.

Moore's Law, observed by Gordon Moore in 1965, states that the number of transistors on a
microchip doubles approximately every two years, while the cost of computers is halved.
This prediction highlights the exponential growth in computing power and efficiency, leading
to more powerful, compact, and cost-effective electronic devices over time. Moore's Law has
driven the rapid advancements in technology, influencing the semiconductor industry and
setting expectations for continuous innovation and performance improvements.

2.5 List and explain the key characteristics of a computer family.

The key characteristics of a computer family include:

1. Architecture Consistency: All models in the family share a similar architecture, ensuring
software compatibility and allowing programs to run across different models without
modification.

2. Performance Range: The family includes models that range from low-end to high-end,
providing various levels of performance to meet different needs and budgets.
3. Backward Compatibility: Newer models are designed to be compatible with older software
and peripherals, protecting the investment in existing technology and easing upgrades.

4. Scalability: The ability to scale up by adding more processors, memory, or storage,


enabling users to enhance performance as needed without replacing the entire system.

5. Common Instruction Set: All models support a common set of instructions, ensuring that
software written for one model will work on others within the family.

6. Peripheral Compatibility: Shared interfaces and peripheral compatibility across the family
allow users to interchange devices like printers, storage devices, and input devices easily.

7. Consistent Operating System: Models within the family typically support the same or
similar operating systems, simplifying system management and user training.

2.6 What is the key distinguishing feature of a microprocessor?

The key distinguishing feature of a microprocessor is that it integrates the functions of a


computer's central processing unit (CPU) onto a single integrated circuit (IC) or a small
number of ICs. This includes arithmetic, logic, control, and input/output (I/O) operations. The
microprocessor's compact design allows for increased processing power, efficiency, and
versatility in a wide range of applications, from personal computers and smartphones to
embedded systems and industrial automation.

2.7

- Each instruction consists of two parts: the opcode (operation code) and the address.
- Each word in memory is 40 bits long, which can contain either a single instruction or two
20-bit instructions.

Address 08A: 010FA210FB

This 40-bit word contains two instructions, each 20 bits long.

1. First instruction (010FA):


- Opcode: `01` (Load MQ)
- Address: `0FA`

2. Second instruction (210FB):


- Opcode: `21` (Load MQ, M(X))
- Address: `0FB`

Address 08B: 010FA0F08D

This 40-bit word also contains two instructions.

1. First instruction (010FA):


- Opcode: `01` (Load MQ)
- Address: `0FA`

2. Second instruction (0F08D):


- Opcode: `0F` (Multiply)
- Address: `08D`
Address 08C: 020FA210FB

This 40-bit word contains two instructions.

1. First instruction (020FA):


- Opcode: `02` (Load MQ, M(X))
- Address: `0FA`

2. **Second instruction (210FB)**:


- Opcode: `21` (Load MQ, M(X))
- Address: `0FB`

Now let's assemble the code step-by-step starting at address 08A:

1. Address 08A:
- Instruction 1: `01 0FA` (Load MQ with the value at address 0FA)
- Instruction 2: `21 0FB` (Load MQ with the value at address 0FB)

2. Address 08B:
- Instruction 3: `01 0FA` (Load MQ with the value at address 0FA)
- Instruction 4: `0F 08D` (Multiply the MQ register by the value at address 08D)

3. Address 08C:
- Instruction 5: `02 0FA` (Load MQ with the value at address 0FA)
- Instruction 6: `21 0FB` (Load MQ with the value at address 0FB)

Assembly Code Explanation:

1. Load MQ with the value at address 0FA: The MQ (Multiplier-Quotient) register is loaded
with the value from memory location 0FA.
2. Load MQ with the value at address 0FB: The MQ register is loaded with the value from
memory location 0FB.
3. Load MQ with the value at address 0FA: The MQ register is again loaded with the value
from memory location 0FA.
4. Multiply the MQ register by the value at address 08D: The MQ register's value is
multiplied by the value at memory location 08D.
5. Load MQ with the value at address 0FA: The MQ register is once more loaded with the
value from memory location 0FA.
6. Load MQ with the value at address 0FB: The MQ register is loaded with the value from
memory location 0FB.

Summary

The assembly code primarily performs a series of load operations on the MQ register with
values from specified memory addresses and includes a single multiply operation.
Specifically, the code:
- Loads the MQ register with values from memory addresses 0FA and 0FB multiple times.
- Multiplies the MQ register value by the value at address 08D once.

The code demonstrates basic load and arithmetic operations, showcasing how the IAS
computer handles data manipulation and arithmetic operations in its instruction set
architecture.

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