ELECTRON DEVICES LAB

SEMESTER III

Submitted By

DEAPRTMENT OF

ELECTRONICS AND COMMUNICATION ENGINEERING

BABA MASTNATH UNIVERISTY

i
 EXP 1 P-N JUNCTION DIODE CHARACTERISTICS

Objective:
To study the Volt-Ampere Characteristics of Silicon P-N Junction Diode and
to find cut-in voltage, static and dynamic resistances.
Hardware Required:
S. No Apparatus Type Range Quantity

01 PN Junction Diode 1N4001 1

1k ohm, 10% tolerance,
02 Resistance 1/2 watt rating 1

03 Regulated power supply (0 – 30V), 2A Rating 1

04 Ammeter MC (0-30)mA, (0-500)μA 1
05 Voltmeter MC (0 – 1)V, (0 – 30)V 1

06 Bread board and

connecting wires

Introduction:
Donor impurities (pentavalent) are introduced into one-side and acceptor
impurities into the other side of a single crystal of an intrinsic semiconductor to form a
p-n diode with a junction called depletion region (this region is depleted off the charge
carriers). This region gives rise to a potential barrier Vγ called Cut- in Voltage. This
is the voltage across the diode at which it starts conducting. The P-N junction can
conduct beyond this Potential.
The P-N junction supports uni-directional current flow. If +ve terminal of the
input supply is connected to anode (P-side) and –ve terminal of the input supply is
connected to cathode (N- side), then diode is said to be forward biased. In this
condition the height of the potential barrier at the junction is lowered by an amount
equal to given forward biasing voltage.
Both the holes from p-side and electrons from n-side cross the junction
simultaneously and constitute a forward current ( injected minority current – due to
holes crossing the junction and entering N-side of the diode, due to electrons crossing
the junction and entering P-side of the diode). Assuming current flowing through the

1
diode to be very large, the diode can be approximated as short-circuited switch. If –ve
terminal of the input supply is connected to anode (p-side) and +ve terminal of the
input supply is connected to cathode (n-side) then the diode is said to be reverse
biased. In this condition an amount equal to reverse biasing voltage increases the
height of the potential barrier at the junction.
Both the holes on p-side and electrons on n-side tend to move away from the
junction thereby increasing the depleted region. However the process cannot continue
indefinitely, thus a small current called reverse saturation current continues to flow
in the diode. This small current is due to thermally generated carriers. Assuming
current flowing through the diode to be negligible, the diode can be approximated as
an open circuited switch.
The volt-ampere characteristics of a diode explained by following equation:

I = Io(exp(V/ ηVT)-1) I=current flowing in the diode Io=reverse saturation current

V=voltage applied to the diode

VT=volt-equivalent of temperature=kT/q=T/11,600=26mV(@ room temp). η=1 (for

Ge) and 2 (for Si)
Germanium diode has smaller cut-in-voltage than Silicon diode. The reverse
saturation current in Ge diode is larger in magnitude when compared to silicon diode.

Circuit diagram: 1.4.1 Forward Bias

1.4.2 Reverse Bias

2
 Precautions:
1. While doing the experiment do not exceed the ratings of the diode. This may
lead to damage of the diode.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit
diagram.
3. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.

Characteristics of PN junction diode:

1. Breakdown voltage can be traded with switching speed. A reduction in
recombination lifetime through addition of suitable impurities will increase
leakage current. This can be countered by decreasing diode area which however
will lead to reduced forward current rating unless doping is increased. This will
lead to a reduced breakdown voltage.
2. The breakdown voltage and reverse recovery are also related together in more
direct manner. Regions which have higher doping also have a lower
recombination lifetime so that a lower breakdown voltage diode is likely to have
lower lifetime and better switching speeds. So a single diode cannot meet the
diverse applications.

Procedure:
Forward Biased Condition:
1. Connect the PN Junction diode in forward bias i.eAnode is connected to positive
of the power supply and cathode is connected to negative of the power supply .
2. Use a Regulated power supply of range (0-30) V and a series resistance of 1kΏ.

3. For various values of forward voltage (Vf) note down the corresponding values

of forward current (If).

Reverse biased condition:
4. Connect the PN Junction diode in Reverse bias i.e; anode is connected to
negative of the power supply and cathode is connected to positive of the power
supply.
5. For various values of (Vr) note down the corresponding values of reverse current
( Ir ).

3
Tabular column:
Forward Bias:

S. No Vf (volts) If (mA)

Reverse Bias:

S. No Vr (volts) Ir (μA)

4
 Model Graph:

Result:
Thus the VI characteristic of PN junction diode was verified.
i. Cut in voltage = ……… V
ii. Static forward Resistance Rdc = (Vf/If) Ω

iii. Dynamic forward Resistance rac = (∆Vf/∆If) Ω

iv. Static Reverse Resistance Rdc = (Vr/Ir) Ω

v. Dynamic Reverse Resistance rac = (∆Vr/∆Ir) Ω

5
 EXP 2: ZENER DIODE CHARACTERISTICS

Objective:
To study the Volt-Ampere characteristics of Zener diode and to measure the
Zener break down voltage.

Hardware Required:
S.
No Apparatus Type Range Quantity

01 Zener Diode IZ 6.2 1

1k ohm, 10% tolerance, 1/2
02 Resistance watt rating 1
Regulated power
03 supply (0 – 30V), 2A rating 1
04 Ammeter mC (0-30)mA 1
05 Voltmeter mC (0 – 1)V, (0 – 10)V 1
Bread board and
06
connecting wires

Introduction:
An ideal P-N Junction diode does not conduct in reverse biased condition. A
Zener diode conducts excellently even in reverse biased condition. These diodes
operate at a precise value of voltage called break down voltage. A Zener diode when
forward biased behaves like an ordinary P-N junction diode. A Zener diode when
reverse biased can either undergo avalanche breakdown or Zener breakdown.
Avalanche breakdown:-If both p-side and n-side of the diode are lightly
doped, depletion region at the junction widens. Application of a very large electric
field at the junction may rupture covalent bonding between electrons. Such rupture
leads to the generation of a large number of charge carriers resulting in avalanche
multiplication.
Zener breakdown:-If both p-side and n-side of the diode are heavily doped,
depletion region at thejunction reduces. Application of even a small voltage at the

6
 junction ruptures covalent bonding and generates large number of charge carriers.
Such sudden increase in the number of charge carriers results in Zener mechanism.

Circuit diagram: 2.4.1 Forward Bias

Reverse Bias

Zener Diode Symbol:

Precautions:
1. While doing the experiment do not exceed the ratings of the diode. This may
lead to damage of the diode.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit
diagram.
3. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.

7
Characteristics of Zener Diode:
For IZ6.2 Zener diode,
Forward Bias:
At a given (constant) diode current, V exhibits an approximately linear shift in the VI
-characteristic due to the combined effect of the temperature dependences of both IS
and VT
Typically, the VI -characteristic shifts approximately -2 mV/°C.
Reverse Bias:
The temperature dependence of the reverse current is that of IS alone, which changes
exponentially as a function of temperature. Typically, IS approx. doubles for every 10
°C increase in Temperature. These variations may lead to significant changes in the
operation of a circuit over a large temperature range and, in many applications,
requires compensation strategies to be implemented in the design of some circuits.

Procedure:
Forward Biased Condition:
1. Connect the Zener diode in forward bias i.e; anode is connected to positive of
the power supply and cathode is connected to negative of the power supply as in
circuit
2. Use a Regulated power supply of range (0-30) V and a series resistance of 1kΏ.

3. For various values of forward voltage (Vf) note down the corresponding values

of forward Current (If).

Reverse biased condition:

1. Connect the Zener diode in Reverse bias i.e; anode is connected to negative of
the power supply and cathode is connected to positive of the power supply as in
circuit.
2. For various values of reverse voltage (Vr ) note down the corresponding values
of reverse current ( Ir ).

8
 Tabular column: 2.8.1 Forward Bias:

S. No Vf (volts) If (mA)

2.8.2 Reverse Bias:

S. No Vr (volts) Ir (mA)

9
 Model Graph:

Result:
The Zener diode characteristics have been verified and the following
parameters were calculated
i) Cut in voltage = ……… V
ii) Break down voltage =…..........V

10
 EXP 3: COMMON EMITTER CONFIGURATIONS

Objective:
To study the input and output characteristics of a bipolar junction transistor in
Common Emitter configuration and to measure h-parameters

Hardware Required:
S. No Apparatus Type Range Quantity

01 Transistor BC147 1

1k ohm, 10%
tolerance, 1/2 watt
02 Resistance rating 2

03 Regulated power supply (0 – 30V), 2A Rating 2

04 Ammeter MC (1-30)mA, (0-500)μA 1

05 Voltmeter MC (0 – 1)V, (0 – 30)V 1

Bread board and

06
connecting wires

Introduction:
Bipolar junction transistor (BJT) is a 3 terminal (emitter, base, collector)
semiconductor device. There are two types of transistors namely NPN and PNP. It
consists of two P-N junctions namely emitter junction and collector junction.
In Common Emitter configuration the input is applied between base and
emitter and the output is taken from collector and emitter. Here emitter is common to
both input and output and hence the name common emitter configuration.
Input characteristics are obtained between the input current and input voltage
taking output voltage as parameter. It is plotted between VBE and IB at constant VCE

11
 in CE configuration.
Output characteristics are obtained between the output voltage and output

current taking input current as parameter. It is plotted between V CE and IC at constant

IB in CE configuration.
Pin Assignment:

Circuit Diagram:

Precautions:
1. While doing the experiment do not exceed the ratings of the transistor. This may
lead to damage the transistor.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit
diagram.
3. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.
4. Make sure while selecting the emitter, base and collector terminals of the
transistor.

12
 Procedure:

Input Characteristics
1. Connect the transistor in CE configuration as per circuit diagram

2. Keep output voltage VCE = 0V by varying VCC.

3. Varying VBB gradually, note down both base current IB and base - emitter

voltage (VBE).

4. Repeat above procedure (step 3) for various values of VCE

Output Characteristics
1. Make the connections as per circuit diagram.

2. By varying VBB keep the base current I B = 20µA.

3. Varying VCC gradually, note down the readings of collector-current (IC) and

collector- emitter voltage (VCE).

4. Repeat above procedure (step 3) for different values of IE

Tabular Column:
Input Characteristics:

VCE = 0 V VCE = 4V

VBE (volts) IB (mA) VBE (volts) IB (mA)

13
 Output Characteristics:

IB = 30 μA IB = 60 μA

VCE (volts) Ic (mA) VCE (volts) Ic (mA)

Model Graph:

Input characteristics Output characteristics

Result
Thus the input and output characteristics of BJT in CE configuration was
verified and the graph was plotted.

a) Impedance (hie) = ∆VBE / ∆IB, VCE constant. =

b) Output admittance (hoe)= ∆Ic / ∆ VEC , IB constant=

14
 EXP 4 : JFET CHARACTERISTICS

Objective:
To study drain and transfer characteristics of a FET and measure the
parameters

Hardware Required:
S. No Apparatus Type Range Quantiy
01 JFET BFW10 1
1k ohm, 10%
tolerance, ½ watt
02 Resistance rating 1
03 Regulated power supply (0 – 30V), 2A Rating 1
04 Ammeter MC (0-30)mA 1
05 Voltmeter MC (0 – 30)V 2
Bread board and connecting
06
wires

Introduction:
The field effect transistor (FET) is made of a bar of N type material called the
SUBSTRATE with a P type junction (the gate) diffused into it. With a positive voltage
on the drain, with respect to the source, electron current flows from source to drain
through the CHANNEL. If the gate is made negative with respect to the source, an
electrostatic field is created which squeezes the channel and reduces the current.

15
 If the gate voltage is high enough the channel will be "pinched off" and the
current will be zero. The FET is voltage controlled, unlike the transistor which is
current controlled. This device is sometimes called the junction FET or IGFET or
JFET.
If the FET is accidentally forward biased, gate current will flow and the FET
will be destroyed. To avoid this, an extremely thin insulating layer of silicon oxide is
placed between the gate and the channel.
The device is then known as an insulated gate FET, or IGFET or metal oxide
semiconductor FET (MOSTFET) Drain characteristics are obtained between the drain
to source voltage (VDS) and drain current (ID) taking gate to source voltage (VGS) as
the parameter. Transfer characteristics are obtained between the gate to source voltage
(VGS) and Drain current (ID) taking drain to source voltage (VDS) as parameter.

Circuit diagram:

Pin assignment of JFET (BFW10):

BFW10 – Silicon- N channel Depletion mode FET manufactured by

MOTOROLA.

16
 Characteristics of JFET:
In BFW10 JFET,
1.
The transconductance gm of JFET at zero gate –source voltage is in the range of
0.1 to 10mA/V. (Since drain current is proportional to gm, for more
transconductance MOSFETs can be preferred).
2.
Gate leakage current of JFET is in the range of 100µA to 10nA, which consumes
power (whereas MOSFET has 100nA to 10pA).
3.
Greater susceptibility to damage in its handling.

Precautions:
1. While doing the experiment do not exceed the ratings of the FET. This may lead
to damage the FET.
2. Connect voltmeter and Ammeter in correct polarities as shown in the Circuit
diagram.
3. Do not switch ON the power supply unless you have checked the Circuit
connections as per the circuit diagram.
4. Make sure while selecting the Source, Drain and Gate terminals of the FET.

Tabular Column:
Drain Characteristics Transfer Characteristics

VGS = VGS = VDS = VDS =

VDS(V) ID(mA) VDS(V) ID(mA) VGS (V) ID(mA) VGS (V) ID(mA)

17
 Model Graph:
Drain Characteristics Transfer Characteristics:

Graph (Instructions):
1. Plot the drain characteristics by taking VDS on X-axis and ID on Y-axis at

constant VGS.

2. Plot the Transfer characteristics by taking VGS on X-axis and ID on Y-axis at

constant VDS.
Calculations from Graph:

Drain Resistance (rd):

It is given by the ration of small change in drain to source voltage (∆VDS) to

the corresponding change in Drain current (∆ID) for a constant gate to source voltage

(VGS), when the JFET is operating in pinch-off or saturation region.

Trans-Conductance (gm):
The ratio of small change in drain current (∆ID) to the corresponding change in

gate to source voltage (∆VGS) for a constant VDS {gm = ∆ID / ∆VGS at constant
VDS (from transfer characteristics)}.The value of gm is expressed in mhos or Siemens
(s).
Amplification Factor (µ):
It is given by the ratio of small change in drain to source voltage (∆VDS) to the

corresponding change in gate to source voltage (∆VGS) for a constant drain current.

µ = ∆VDS / ∆VGS.

µ = (∆VDS / ∆ID) X (∆ID /

∆VGS) µ = rd X gm.
18
 Result:
Thus the drain and transfer characteristics of a JFET was studied and verified,
the following parameters were calculated
i. Drain Resistance (rd) = ………….
ii. Transconductance (gm) = ………….
iii. Amplification factor (µ) = ……………

19
 EXP 5: CHARACTERISTICS OF LDR, PHOTODIODE,
PHOTOTRANSISTOR

Objective:
To study and verify the characteristics of LDR, Photodiode and Phototransistor

Hardware Required:
S. No Apparatus Type Range Quantity
1KΩ,10KΩ,100KΩ,
10% tolerance,1/2 watt
01 Resistors rating 1
02 Photodiode QSD 2030F 1
03 Phototransistor BPW77NA 1
04 Regulated power supply (0-30V), 2A Rating 1
(0-30)mA;(0-
05 Ammeter MC 30)microA 1
06 Voltmeter MC (0-10)V 1
Bread board and
connecting
07 1
wires
08 LDR 1

Introduction
LDR
A photoresistor or light dependent resistor or cadmium sulfide (CdS) cell is a
resistor hose resistance decreases with increasing incident light intensity. It can also be
referred to as a photoconductor.
A photoresistor is made of a high resistance semiconductor. If light falling on
the device is of high enough frequency, photons absorbed by the semiconductor give
bound electrons enough energy to jump into the conduction band. The resulting free
electron (and its hole partner) conduct electricity, thereby lowering resistance

Photodiode
A silicon photodiode is a solid state light detector that consists of a shallow
diffused P-N junction with connections provided to the out side world. When the top

20
surface is illuminated, photons of light penetrate into the silicon to a depth determined
by the photon energy and are absorbed by the silicon generating electron-hole pairs.
The electron-hole pairs are free to diffuse (or wander) throughout the bulk of the
photodiode until they recombine.
The average time before recombination is the “minority carrier lifetime”. At
the P-N junction is a region of strong electric field called the depletion region. It is
formed by the voltage potential that exists at the P-N junction. Those light generated
carriers that wander into contact with this field are swept across the junction.
If an external connection is made to both sides of the junction a photo induced
current will flow as long as light falls upon the photodiode. In addition to the
photocurrent, a voltage is produced across the diode. In effect, the photodiode
functions exactly like a solar cell by generating a current and voltage when exposed to
light.

Phototransistor:
Photo-Transistor is a bit like a Photo-Diode in the fact that it detects light
waves, however photo-transistors, like transistor are designed to be like a fast switch
and is used for light wave communications and as light or infrared sensors. The most
common form of photo-transistor is the NPN collector and emitter transistor with no
base lead. Light or photons entering the base (which is the inside of the photo-
transistor) replace the base - emitter current of normal transistors.

Circuit diagram:
LDR 5.4.2 Photodiode

21
5.4.3 Phototransistor:

Tabular Column :

LDR

Distance (cm) Voltage (V) Current (mA) Resistance(KΩ)

22
 Photodiode

Distance (cm) Current (µS)

Photo Transistor

Distance (cm) Current (µS)

23
 Characteristics of LDR, Photodiode, Phototransistor:
1. The dark resistance of an LDR is quite less compared with the reverse bias
resistance offered by photo diodes because of which it may consume
comparatively more power than its semiconductor counterparts.
2. Phototransistors made of silicon are not capable of handling voltages over 1,000
Volts.
3. Phototransistors are also more vulnerable to surges and spikes of electricity as
well as electromagnetic energy.
4. Phototransistors also do not allow electrons to move as freely as other devices
do, such as electron tubes.
5. The phototransistor has maximum sensitivity in the infrared (around a
wavelength of 940nm), which is typical for silicon photodiodes and
phototransistors.
6. Photoresistors are less light-sensitive devices
than photodiodes or phototransistors: the two latter components are true
semiconductor devices, while a photoresistor is a passive component and does
not have a PN-junction. The photoresistivity of any photoresistor may vary
widely depending on ambient temperature, making them unsuitable for
applications requiring precise measurement of or sensitivity to light.
7. Photoresistors also exhibit a certain degree of latency between exposure to light
and the subsequent decrease in resistance, usually around 10 milliseconds. The
lag time when going from lit to dark environments is even greater, often as long
as one second.
Precautions:
1. While doing the experiment do not exceed the ratings of the diode. This may
lead to damage the diode.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit
diagram.
3. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.

24
 Procedure:
LDR:
1. Connect circuit as shown in figure 5.4.1
2. Keep light source at a distance and switch it ON, so that it falls on the LDR
3. Note down current and voltage in ammeter and voltmeter.
4. Vary the distance of the light source and note the V & I.
5. Sketch graph between R as calculated from observed V and I and distance of
light source

Photodiode:
1. Connect circuit as shown in figure 5.4.2
2. Maintain a known distance between the bulb and photodiode say 5cm
3. Set the bulb voltage, vary the voltage of the diode in steps of 1V and note the
diode current Ir.
4. Repeat above procedure for VL=4V, 6V, etc.

5. Plot the graph: Vd Vs Ir for constant VL

Phototransistor:
1. Connect circuit as shown in figure 5.4.3
2. Repeat the procedure as that of the photodiode.

Model Graph:
LDR Photodiode
Phototransistor

25
 Result:
Thus the characteristics of LDR, Photodiode, Phototransistor were studied and
verified

26
 6 HALF WAVE RECTIFIER

Objective:
1. To plot Output waveform of the Half Wave Rectifier.
2. To find ripple factor for Half Wave Rectifier using the formulae.
3. To find the efficiency, Vr(pp), Vdc for Half Wave Rectifier.

Hardware Required:
S. No Apparatus Type Range Quantity

6-0-6 V, 500mA, 1A
01 Transformer Rating 1

470 ohm, 10%

tolerance, 1/2 watt
02 Resistance rating 1

03 Capacitor 470µF 1

04 Diode IN4001 1

Bread board and

05
connecting wires
Introduction:
A device is capable of converting a sinusoidal input waveform into a
unidirectional waveform with non-zero average component is called a rectifier. A
practical half wave rectifier with a resistive load is shown in the circuit diagram. In
positive half cycle, Diode D is forward biased and conducts. Thus the output voltage is
same as the input voltage. In the negative half cycle, Diode D is reverse biased, and
therefore output voltage is zero. A smoothing filter is induced between the rectifier
and load in order to attenuate the ripple component. The filter is simply a capacitor
connected from the rectifier output to ground. The capacitor quickly charges at the

beginning of a cycle and slowly discharges through R L after the positive peak of the
input voltage. The variation in the capacitor voltage due to charging and discharging is

27
called ripple voltage. Generally, ripple is undesirable, thus the smaller the ripple, the
better the filtering action.
Ripple factor is a measure of effectiveness of a rectifier circuit and defined as a
ratio of RMS value of ac component to the dc component in the rectifier output.
Theoretical calculations for Ripple Factor:
Without Filter:
Vrms = Vm / 2

Ripple factor (Theoretical)

Ripple Factor(practical) where

With Filter:

Ripple Factor (Theoretical)

Where f = 50Hz, R = 1K , C = 1000 F

Ripple Factor(practical)

Percentage Regulation %
VNL = DC voltage at the load without connecting the load (Minimum current).
VFL = DC voltage at the load with load connected.

Efficiency
PAC = V2rms / RL
PDC = Vdc / RL

The ripple factor can be lowered by increasing the value of the filter capacitor or
increasing the load capacitance.

28
 Circuit Diagram of Half Wave Rectifier

Characteristics of Half Wave Rectifier:

1. The output current in the load contains, in addition to dc component, ac
components of basic frequency equal to that of the input voltage frequency.
Ripple factor is high and an elaborate filtering is, therefore, required to give
steady dc output.
2. The power output and, therefore, rectification efficiency is quite low. This is due
to the fact that power is delivered only during one half cycle of the input
alternating voltage.
3. Transformer utilization factor is low.
4. DC saturation of transformer core resulting in magnetizing current and
hysteresis losses and generation of harmonics.
Precautions:
1. While doing the experiment do not exceed the ratings of the diode. This may
lead to damage the diode.
2. Connect CRO using probes properly as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.

29
Experiment:
1. Connections are given as per the circuit diagram without capacitor.
2. Apply AC main voltage to the primary of the transformer. Feed the rectified
output voltage to the CRO and measure the time period and amplitude of the
waveform.
3. Now connect the capacitor in parallel with load resistor and note down the
amplitude and time period of the waveform.
4. Measure the amplitude and time period of the transformer secondary (input
waveform) by connecting CRO.
5. Plot the input, output without filter and with filter waveform on a graph sheet.
6. Calculate the ripple factor.

Graph (instructions):
1. Take a graph sheet and divide it into 2 equal parts. Mark origin at the center of
the graph sheet.
2. Now mark x-axis as Time and y-axis as Voltage
3. Mark the readings tabulated for Amplitude as Voltage and Time in graph sheet.

Observations:
Output
Ripple Voltage
Input Waveform Waveform
(with filter)
(without filter)
Amplitude

Time Period

Frequency

Result:
The Rectified output Voltage of Half Wave Rectifier Circuit is observed and
the calculated value of ripple factor is

30
 7. FULL WAVE RECTIFIER
Objective:
1. To plot Output waveform of the Full Wave Rectifier.
2. To find ripple factor for Full Wave Rectifier using the formulae.
3. To find the efficiency, Vp(rect), Vdc for Full Wave Rectifier.

Hardware Required:
S. No Apparatus Type Range Quantity

01 Transformer 6-0-6 V 1

470 ohm, 10%

02 Resistance tolerance, 1/2 watt 1

03 Capacitor 470µF 1

04 Diode IN4001 2

Bread board and

05
connecting wires

Introduction:
A device is capable of converting a sinusoidal input waveform into a
unidirectional waveform with non zero average component is called a rectifier.
A practical half wave rectifier with a resistive load is shown in the circuit diagram. It
consists of two half wave rectifiers connected to a common load. One rectifies during
positive half cycle of the input and the other rectifying the negative half cycle. The
transformer supplies the two diodes (D1 and D2) with sinusoidal input voltages that
are equal in magnitude but opposite in phase. During input positive half cycle, diode
D1 is ON and diode D2 is OFF. During negative half cycle D1 is OFF and diode D2 is
ON. Peak Inverse Voltage (PIV) is the maximum voltage that has to be withstand by a

diode when it is reverse biased. Peak inverse voltage for Full Wave Rectifier is 2V m
because the entire secondary voltage appears across the non-conducting diode .
The output of the Full Wave Rectifier contains both ac and dc components. A
majority of the applications, which cannot tolerate a high value ripple, necessitates
further processing of the rectified output. The undesirable ac components i.e. the
ripple, can be minimized using filters.

31
Ripple Factor:
Ripple factor is defined as the ratio of the effective value of AC components to
the average DC value. It is denoted by the symbol ' '.

Efficiency:
The ratio of output DC power to input AC power is defined as efficiency.

= 81% (if R >> Rf, then Rf can be neglected).

The maximum efficiency of a Full Wave Rectifier is 81.2%.

Percentage of Regulation:
It is a measure of the variation of DC output voltage as a function of DC output
current (i.e., variation in load).

Percentage of regulation = %

VNL = Voltage across load resistance, when minimum current flows through it.
VFL = Voltage across load resistance, when maximum current flows through.
For an ideal Full-wave rectifier, the percentage regulation is 0 percent. The percentage
of regulation is very small for a practical full wave rectifier.
Peak- Inverse - Voltage (PIV):
It is the maximum voltage that the diode has to withstand when it is reverse biased.
PIV = 2Vm
Transformer Utilization Factor
Transformer utilization factor (TUF), which is defined as the ratio of power
delivered to the load and ac rating of the transformer secondary, So
TUF = dc power delivered to the load/ac rating of transformer secondary
Transformer Utilization Factor, TUF can be used to determine the rating of a
transformer secondary. It is determined by considering the primary and the secondary
winding separately and it gives a value of 0.693.

32
 Theoretical Calculations:
Without filter:

Ripple factor (Theoretical) =

Ripple Factor (Practical)

With filter:

Ripple factor (Theoretical)

Where f = 50Hz, R =1K , C = 1000 F.

Ripple Factor

Percentage Regulation = %
VNL = DC voltage at the load without connecting the load (Minimum current).
VFL = DC voltage at the load with load connected.

Efficiency %u200B
PAC = V2rms / RL
PDC = Vdc / RL

33
 Circuit Diagram:

MODEL GRAPH:

Characteristics of Full Wave Rectifier:

1. The peak voltage in the full-wave rectifier is only half the peak voltage in the
half-wave rectifier. This is because the secondary of the power transformer in the
full-wave rectifier is center tapped; therefore, only half the source voltage goes
to each diode.
2. A larger transformer for a given power output is required with two separate but
identical secondary windings making this type of full wave rectifying circuit
costly compared to the “Full Wave Bridge Rectifier” circuit equivalent.

34
 Precautions:
1. While doing the experiment do not exceed the ratings of the diode. This may
lead to damage the diode.
2. Connect CRO using probes properly as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.

Procedure:
1. Connections are given as per the circuit diagram without capacitor.
2. Apply AC main voltage to the primary of the transformer. Feed the rectified
output voltage to the CRO and measure the time period and amplitude of the
waveform.
3. Now connect the capacitor in parallel with load resistor and note down the
amplitude and time period of the waveform.
4. Measure the amplitude and time period of the transformer secondary(input
waveform) by connecting CRO.
5. Plot the input, output without filter and with filter waveform on a graph sheet.
6. Calculate the ripple factor.

Graph ( instructions)

1. Take a graph sheet and divide it into 2 equal parts. Mark origin at the center of
the graph sheet.
2. Now mark x-axis as Time y-axis as Voltage
3. Mark the readings tabulated for Amplitude as Voltage and Time in graph sheet.

7.11Observations:
Output
Ripple Voltage
Input Waveform Waveform
(with filter)
(without filter)
Amplitude

Time Period

Frequency

35
Result:
The Rectified output Voltage of Full Wave Rectifier Circuit is observed and
the calculated value of ripple factor is

36
 EXP 8: FULL WAVE BRIDGE RECTIFIER

Objective:
To study and verify the working of a full wave bridge rectifier with and
without filter and to measure its parameters

Hardware Required:
S. Apparatus Type Range Quantity
No
01 Transformer 6-0-6 V 1

470 ohm, 10%

02 Resistance tolerance, 1/2 watt 1

03 Capacitor 470µF 1

04 Diode IN4001 4
Bread Board and
05 connecting wires

Introduction:
A device is capable of converting a sinusoidal input waveform into a
unidirectional waveform with non zero average component is called a rectifier. The
Bridge rectifier is a circuit, which converts an ac voltage to dc voltage using both half
cycles of the input ac voltage. The Bridge rectifier has four diodes connected to form a
Bridge. The load resistance is connected between the other two ends of the bridge.
For the positive half cycle of the input ac voltage, diode D1 and D3 conducts
whereas diodes D2 and D4 remain in the OFF state. The conducting diodes will be in
series with the load resistance RL and hence the load current flows through RL. For
the negative half cycle of the input ac voltage, diode D2 and D4 conducts whereas
diodes D1 and D3 remain in the OFF state.
The conducting diodes will be in series with the load resistance RL and hence
the load current flows through RL in the same direction as in the previous half cycle.
Thus a bidirectional wave is converted into a unidirectional wave. Ripple factor is a
measure of effectiveness of a rectifier circuit and defined as a ratio of RMS value of ac
component to the dc component in the rectifier output.

37
 Theoretical calculations: 8.4.1 Ripple Factor
The ripple factor for a Full Wave Rectifier is given by

The average voltage ofr the DC voltage available across the load resistance is
Vdc=2Vm/π
The RMS value of the voltage at the load resistance is Vrms=Vm
Ripple factor 2

The ripple factor can be lowered by increasing the value of the filter capacitor or
increasing the load capacitance.

Efficiency
Efficiency, η is the ratio of dc output power to ac input power

The maximum efficiency of a Full Wave Rectifier is 81.2%.

Transformer Utilization Factor

Transformer utilization factor (TUF), which is defined as the ratio of power
delivered to the load and ac rating of the transformer secondary, So

TUF = dc power delivered to the load/ac rating of transformer secondary

Transformer Utilization Factor, TUF can be used to determine the rating of a
transformer secondary. It is determined by considering the primary and the secondary
winding separately and it gives a value of 0.812.

38
 Circuit Diagram:

Model Graph:

Precautions:
1. While doing the experiment do not exceed the ratings of the diode. This may
lead to damage the diode.
2. Connect CRO using probes properly as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.
Procedure:
1. Connections are given as per the circuit diagram without capacitor.
2. Apply AC main voltage to the primary of the transformer. Feed the rectified output
voltage to the CRO and measure the time period and amplitude of the waveform.
3. Now connect the capacitor in parallel with load resistor and note down the
amplitude and time period of the waveform.
4. Measure the amplitude and time period of the transformer secondary (input
waveform) by connecting CRO.

39
5. Plot the input, output without filter and with filter waveform on a graph sheet.
6. Calculate the ripple factor.
Formulae:
Vp(rect)
Peak to Peak Ripple Voltage, Vr(pp)= 2 fRLC

Where Vp(rect) - Unfiltered Peak Rectified Voltage

1/
Peak rectified voltage, Vdc=(1− 4fRLC)Vp(rect)
Ripple Factor = Vr(pp)/Vdc

Observations:
Output
Ripple Voltage
Input Waveform Waveform
(with filter)
(without filter)
Amplitude

Time Period

Frequency

Result:
The rectified output voltage of full wave bridge rectifier circuit is observed and the
calculated value of ripple factor is

40
 9. SERIES VOLTAGE REGULATOR

Objective:
1. To design a series voltage regulator
2. To find load regulation
3. To find line regulation
Hardware Required:
S. No Apparatus Type Range Quantity

1 Power transistor 2N3055 1

2 Transistor BC147 1

3 1Z6.2
Zener diode 1

947Ω, 2.48KΩ,
2.2kΩ,
2.75KΩ, 49.6Ω, 10%
4 Resistors 1
tolerance, ½ watt
5 Voltmeter MC (0 – 30)V 1

6 Bread board & wires

50Ω 1
7. Decade Resistance Box

Introduction:
The term regulation is the ability of the power supply source to maintain a
constant output voltage in spite of line voltage fluctuations and changes in load current
The factors of poor regulation are
1. The line voltage changes which causes a dc output change and the ripple content
of the dc input due to inadequate filtering.
2. The load current changes which causes a variable internal drop due to the
internal resistance of the regulator and the consequent change in the output
voltage and
3. The temperature coefficient of the device parameters which results in a change
of the output voltage.

41
Voltage regulators can be classified by the method of achieving regulation as linear
regulators and switching regulators. They are also classified by the way they are
connected to the load as series regulators and shunt regulators. Standard regulator
contains three basic elements namely a precision voltage reference, an error amplifier
and a power control element.

In this circuit the transistor Q 2 Functions both as a voltage comparator and dc

amplifier. Any increase in the output voltage Vo either due to the input-voltage

variation or change of load results in increase of V BE of the transistor Q2. Hence the

collector current IC2 increase. Due to this the total current following through R 3

increases. Hence the collector voltage of Q2 decreases.

Since the base of Q1 is tied to the collector of T 2, the base voltage of Q 1.with
respect to ground decreases thereby decreasing the forward bias of the emitter junction
of Q2. Hence the collector emitter voltage of Q1 has to increase in order to maintain

the same emitter current. If the change in VCE, of Q1 can be made equal to Vi then the

output voltage will remain constant. Since V CBI =VCEI. We can assume that if Vi

dropped across R3, then the output voltage will remain constant.
Line Regulation:
Line regulation is a measure of the ability of the power supply to maintain its output
voltage given changes in the input line voltage. Line regulation is expressed as percent
of change in the output voltage relative to the change in the input line voltage.
Line regulation = (output voltage at High line input voltage - output voltage at low line input
voltage) x100 (High line input voltage - low line input voltage)
Load Regulation
Load regulation is a measure of the ability of an output channel to remain constant
given changes in the load. Depending on the control mode enabled on the output
channel, the load regulation specification can be expressed in one of two ways In
constant voltage mode, variations in the load result in changes in the output current.
This variation is expressed as a percentage of range per amp of output load and is
synonymous with a series resistance. In constant voltage mode, the load regulation
specification defines how close the series resistance of the output is to 0 ohms - the
series resistance of an ideal voltage source.

42
 In constant current mode, variations in the load result in changes to the current
through the load. This variation is expressed as a percentage of range change in
current per volt of change in the output voltage and is synonymous with a resistance in
parallel with the output channel terminals. In constant current mode, the load
regulation specification defines how close the output shunt resistance
is to infinity—the parallel resistance of an ideal current. In fact, when load regulation
is specified in constant current mode, parallel resistance is expressed as 1/load
regulation.
Load Regulation can be defined as a percentage by the equation:

Where:

• FullLoad (EfL) is the load that draws the greatest current (is the lowest specified
load resistance - never short circuit)

• MinimumLoad (EnL) is the load that draws the least current (is the highest
specified load resistance - possibly open circuit for some types of linear supplies,
usually limited by pass transistor minimum bias levels)

• NominalLoad (EfL) is the typical specified operating load

Circuit Diagram - Series Voltage Regulator

R3 R4 R1

R2

Design Specifications Series pass Transistor 2N3055:

hfe =20-70
Iemax =15 amperes
Vce =70V
BC 170

43
 Ie =2 mA
hfe =125-500
ASSUMPTIONS
VI =12.4 V
=250 mA
=2.5 mA
=10mA
β1 =28
β2 =188
DESIGN
= VL/2 = 12.4 / 2 = 6.2 V
-3
= VL/IL = 12.4 / 250*10 = 49.6Ω

= 0.01 * IL = 12.4 / 250 mA

= VL – VZ / ID = 12.4 – 6.2 / 2.5* 10-3 = 2.48 KΩ

3
R1 = VL – (V BE2+VZ) = (12.4-(0.7 + 6.2) =5.5 / 2.5 * 10 =
2.2KΩ I1 -3
2.5*10

VR2 = VBE2 + VZ * (R2 / R1+R2)

-3
0.7 + 6.2 = 12.4 * (R2/ (2.2*10 +R2))
R2 = 2.75 KΩ

I2 = (V2+VBE2) / R2 = 6.9 / 2.75 *103 =2.5mA

IE1 = (ID+I1 + IL) = (2.5 + 2.5 + 250) mA = 255mA

IB1 = IE1 / β1 =255 / 28 = 9.107 mA

I3 = IB1 + IC2 = 9.107 mA = 19.107 mA

R3 + [VINMX – (VBE1 + V2)] / I3 = 25-(0.7*6.2) = 947Ω

3
19.107*10-

Characteristics of Series Voltage Regulator:

This series voltage regulator is suitable only for low output voltages because of
the following reasons
1. With the increase in room temperature, the values of Vbe and Vzener tend to
decrease. Thus the output voltage cannot be maintained a constant. This will
44
 further increase the transistor base emitter voltage and thus the load.
2. There is no option to change the output voltage in the circuit.
3. Due to small amplification process provided by only one transistor(BC147), the
circuit cannot provide good regulation at high currents.
4. The power dissipation of a pass transistor is large because it is equal to VccIc
and almost all variation appears at Vce and the load current is approximately
equal to collector current. Thus for heavy load currents pass transistor has to
dissipate a lot of power and, therefore, circuit becomes hot. So some heat sink is
required.
Procedure:
Connect the circuit as per the circuit diagram.

1. For load regulation characteristics, keep the input voltage constant, find VL for

different values of RL. Plot the graph by taking RL in the axis and VL in the Y
axis.

2. For line regulation characteristics, keep R L constant and for different values of

input Vin find VL. Plot the graph by taking Vin in x axis and VL in the y axis
Tabulation
Line regulation RL =---------------------------(Ω)

S. No Vi (V) Vo (V)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10
11
12

45
 Load regulation Vi =--------------(V)

S.No RL(Ω) Vo(V)

1.

2.

3.

4.

5.

6.

Model Graph

VL Vin = Constant VL

RL Vin

LOAD REGULATION LINE REGULATION

Result:
The series voltage regulator was designed and constructed and the
characteristics were plotted.
1. The regulated output voltage was found to be-------------V
.2. Line regulation was found to be ---------------------
3. Load regulation was found to be ----------------------

46
 10.SHUNT VOLTAGE REGULATOR

Objective:
1. To design a shunt voltage regulator
2. To find load regulation
3. To find line regulation

Hardware Required:
S.No Apparatus Type Range Quantity
1 Regulated power supply MC (0-30 V), 2 A rating 1

1K Ω, 10%
2 Resistors tolerance, ½ watt 1

3 Zener diode 1z 5.1 1

4 Voltmeter (0-30)V 1
5 Breadboard & wires

6 Decade Resistance Box 1 10K Ω 1

Introduction:
The function of a voltage regulator is to provide a stable dc voltage to
electronic circuits and capable of providing substantial output current. Since the
lement or component used for voltage regulation is connected across the load, it is
called as shunt voltage regulator. There are two types of shunt voltage regulator
1. Zener diode shunt voltage regulator
2. Transistor shunt voltage regulator

A zener diode is connected in parallel with the load; a resistance (R 2) is connected in

series with the zener to limit the current in the circuit. Hence the resistance is called as
series current limiting resistor. The output voltage (Vo) is taken across the load

resistance (R1). Since the reverse bias characteristics of sener diode are used in
voltage regulation, the input voltage is always maintained greater than zener voltage
(Vz).
Line Regulation:
Line regulation is a measure of the ability of the power supply to maintain its

47
output voltage given changes in the input line voltage. Line regulation is expressed as
percent of change in the output voltage relative to the change in the input line voltage.
Load Regulation
Load regulation is a measure of the ability of an output channel to remain
constant given changes in the load. Depending on the control mode enabled on the
output channel, the load regulation specification can be expressed in one of two ways:
In constant voltage mode, variations in the load result in changes in the output current.
This variation is expressed as a percentage of range per amp of output load and is
synonymous with a series resistance. In constant voltage mode, the load regulation
specification defines how close the series resistance of the output is to 0 ohms - the
series resistance of an ideal voltage source.
In constant current mode, variations in the load result in changes to the current
through the load. This variation is expressed as a percentage of range change in
current per volt of change in the output voltage and is synonymous with a resistance in
parallel with the output channel terminals. In constant current mode, the load
regulation specification defines how close the output shunt resistance is to infinity—
the parallel resistance of an ideal current. In fact, when load regulation is specified in
constant current mode, parallel resistance is expressed as 1/load regulation.
Load Regulation can be defined as a percentage by the equation:

Where:

 FullLoad (EfL) is the load that draws the greatest current (is the lowest
specified load resistance - never short circuit)

 MinimumLoad (EnL) is the load that draws the least current (is the highest
specified load resistance - possibly open circuit for some types of linear
supplies, usually limited by pass transistor minimum bias levels)
 NominalLoad (EfL) is the typical specified operating load Ω
Circuit Diagram – Shunt Voltage Regulator

48
Design
Let lz max = 10 mA, Vz = VL = 5.1 V Load current lL = 50 mA.
-3
Therefore RL = VL= / lL = 5.1 V/ 50 * 10 A = 120 Ω RL = 102Ω

RL should be greater than or equal to 102 ΩI1 = IZ + IL

= 10mA + 50 mA I1 = 60 mA
-3
Rs = ( Vi-Vz) / I1 = (7-5.1) / (60*10 =
31.66Ω Rs = 31.66Ω

Characteristics of Shunt Voltage Regulator:

The series resistor causes a huge amount of power loss.
1. The circuit may have problems regarding over voltage mishaps.

Procedure:
Line regulation
1. Connections are made as per as the circuit diagram.

2. The load resistance (RL) is kept constant and input voltage is varied and the
corresponding output voltage (Vo) are noted.

3. A graph is drawn by taking input voltage (Vi) in x axiz and output voltage (Vo) in
y axis.

Load regulation
1. The same circuit is used for finding load regulation. In the case, the input voltage
(Vi) is kept constant.

2. The load resistance RL is varied and the corresponding output voltage are noted.

3. A graph is plotted by having RL in x axis and Vo in y axis.

49
Tabulation
Line regulationRL =-----------------------------(Ω)

S. No Vi (V) Vo (V)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.

Load regulation Vi =-------------(V)

S.No RL(Ω) Vo(V)

1.
2.
3.
4.
5.
6.

Model Graph

VL VL

Vin = Constant

RL Vin

LOAD REGULATION RL LINE REGULATION

50
 Result
The shunt voltage regulator was designed and constructed and the characteristics were
plotted.
1. The regulated output voltage was found to be------------- .
2. Line regulation was found to be ---------------------
3. Load regulation was found to be ----------------------

51