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UA04 - 4.3 Bit Manipulation

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16 views2 pages

UA04 - 4.3 Bit Manipulation

Uploaded by

excelphysics.tahmeed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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6

Unit 01: 4.3 Bit Manipulation

Name: Date: Marks: /15

7. The following table shows another part of the instruction set for the processor.

Paper | 1
<address> can be an absolute or symbolic address
# denotes a denary number, e.g. #123
B denotes a binary number, e.g. B01001101
The contents of memory addresses 50 and 51 are shown:
Memory address Data value
50 01001101
51 10001111

(a) (i) The current contents of the ACC are:


0 1 0 1 0 0 1 1
Show the contents of the ACC after the execution of the following instruction.
XOR B00011111
………………………..……………...……………………………………….…………….………...
………………………..……………...……………………………………….…………….………...

[1]
(ii) The current contents of the ACC are:
0 1 0 1 0 0 1 1
Show the contents of the ACC after the execution of the following instruction.
AND 50
………………………..……………...……………………………………….…………….………...
………………………..……………...……………………………………….…………….………...

[1]

© HEGICT 2023 9618 / P1 / Unit Assessment 01 /Summer 2023


7
(iii) The current contents of the ACC are:
0 1 0 1 0 0 1 1
Show the contents of the ACC after the execution of the following instruction.
LSL #3
………………………..……………...……………………………………….…………….………...
………………………..……………...……………………………………….…………….………...

Paper | 1
[1]
(iv) The current contents of the ACC are:
0 1 0 1 0 0 1 1
Show the contents of the ACC after the execution of the following instruction.
OR 51
………………………..……………...……………………………………….…………….………...
………………………..……………...……………………………………….…………….………...

[1]
(b) Write the register transfer notation for each of the stages in the fetch-execute cycle described in the table.
Description Register Transfer notation

Copy the address of the next instruction into the Memory Address Register.

Increment the Program Counter.

Copy the contents of the Memory Data Register into the Current Instruction Register.
[3]
8. (a) (i) A three-place logical shift to the left is performed on the following positive binary integer.
Show the result of this logical shift.
0 1 1 1 1 1 1 0
………………………..……………...…………………………………….…….………...….……...
………………………………..…………….………………………………………...…………....[1]
(i) A three-place logical shift to the right is performed on the following positive binary integer.
Show the result of this logical shift.
0 1 1 1 1 1 1 0
………………………..……………...…………………………………….…….………...….……...
………………………..……………...…………………………………….…….………...….……...
………………………………..…………….………………………………………...…………....[2]
(b) Describe the difference between arithmetic shifts and logical shifts.
………………………..……………...…………………………………….…….………...….……...
………………………………..…………….………………………………………...…………....[1]
9. (a) State the contents of the accumulator after the following instructions have been executed.
The accumulator contains B00011001
(i) LSL #4 …………………..…………….………………………………………...…………....[1]
(i) LSR #5 …………………..…………….………………………………………...…………....[1]
(b) Write an assembly language instruction to:
(i) set bit 4 in the accumulator :..…………….………………………………………...…………....[1]
(i) clear bit 1 in the accumulator.……..……….………………………………………...…………....[1]

© HEGICT 2023 9618 / P1 / Unit Assessment 01 /Summer 2023

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