Serial Communications

Embedded Systems 1
 16
C
VCC 1 15
A
J4 RED VCC
U5
LM317M JP5 P7_7 DB7 DB6 P7_6
DB5 14 13 DB4
1 3 2 1 2 P7_5 P7_4
Tip VIN VOUT 12 11 VCC
10 9

1
2 EXT
O 8 7

1
ADJ
3 Power R43 P1_7 E R/W
O 6 5

1
+ R41 + 680 P1_6 RS Vo
4 3

1
POWER JACK C18 C19 301 1% C20 C21
2 1

1
47uF 0.1uF 10uF 0.1uF

1 2
9VDC R45 TB2 R23 ACM0802B 2 Rx

In these notes . . .

2
positive 2 1 GND 1 10K 10K
center D7 R22

1
909 1% BLACK GREEN VCC 10K
C11

2
R44 Contrast

3
432 1% POWER 1 2
R18

2
JP7 50K 0.1uF

2
1 2 3 1

Voltage Select

2
OPEN: 5.0V VCC
C14
CLOSED: 2.5-5.0V
VCC 1 2

1
0.1uF
C15
U4
0.1uF

2
1
16 2
Vcc V+
JP1 1
C1+ C2+ 4 UART 0:

General Communications MCU C13 C17 RS-232C

P1

2
Power 1 2 3 5 2 1
C2 S6A C1- C2- 1
2 1 CT204222ST 0.1uF 0.1uF 6
U1 P6_2 1 16 P6_2M 10 7 2

Serial Communications
0.1uF to 50-pin T 7
2 15 connector 9 8 3
VCC VCC 11 3 P9_0 TB3 R TB5 8
JP6 C1 C3 Vcc P90/TB0in
2 P9_1 1 11 14 1 4
1 2 1 2 2 1 47
P91/TB1in
1 P6_3 3 14 P6_3M T 9
Vref P9_2
AVcc P92/TB2in

– RS232 standard
to 50-pin 48 P9_3 to 50-pin HOLE 12 13 HOLE 5
Vref connector 0.1uF 0.1uF 46
P93
4 13 connector
R
Vref TB4 TB6
15 6
44 UP = IO 1
GND V- 1 747250-4
AVss
33 P6_0 DOWN = RS232 MAX202/3232

– UART operation
P60/CTS0/RTS0
1

1
32 P6_1 HOLE HOLE
R21 R20 R19 R3 P61/CLK0 C16
31 P6_2
10K 10K 10K 7.32K 1% P62/RxD0
P10_0 45 30 P6_3 2 1
P100/AN0 P63/TxD0
P10_1 43 29 P6_4
P101/AN1 P64/CTS1/RTS1
1

P10_2 42 28 P6_5 0.1uF

– Polled Code
P102/AN2 P65/CLK1
2

P10_3 41 27 P6_6
P103/AN3 P66/RxD1
P10_7 P10_6 P10_5 2 P10_1 P10_0 P10_4 40 26 P6_7
KI3 KI2 KI1 AN1 AN0 P104/AN4/KI0 P67/TxD1
P10_5 39
P105/AN5/KI1
1

R46 P10_6 38
2K RT1 P106/AN6/KI2
P10_7 37

– SCI/I2C
P107/AN7/KI3
RL0503-5820-97-MS
P70/TxD2/TA0out
25 P7_0 UART 1:
3

S4 S3 S2 P1_5 36 24 P7_1
P15/INT3/ADtrg P71/RxD2/TA0in Debug port
EVQ-PAC04M EVQ-PAC04M t EVQ-PAC04M
er nt
P1_6 35
P16/INT4 P72/CLK2/TA1out/V
23 P7_2 VCC
Und pme Preliminary
P1_7 Specifications
34
P17/INT5 Rev.0.30 P73/CTS2/RTS2/TA1in/V
22 P7_3
Mitsubishi microcomputers
J2
2

elo 21 P7_4 1 2 READY P6_4

dev Specifications in this manual are tentative and subject to change.
P74/TA2out/W M16C/26 Group P6_5 SCLK 3 + +
20 P7_5 4 RxD P6_6
P75/TA2in/W P8_6 CE* + +
RESET* 7 19 P7_6
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER 5 6
Serial I/O RESET P76/TA3out
18 P7_7 7
+ +
8 RESET*
P77/TA3in + +

1
9 10 TxD P6_7
R7 + + R13
13 10K 103308-1 10K
VDC
17 P8_0
P80/TA4out/U
1

VCC VCC 10 16 P8_1

Xin P81/TA4in/U

2
C6 15 P8_2
0.1uF P82/INT0
8 14 P8_3
Xout P83/INT1
2
3

Clock
synchronous type VCC
D2 R15 4 12 P8_5
FMMD914CT 10K CNVss UART (7 bits)
P85/NMI
Clock UART (8 bits) 6 P8_6 1 2
synchronous P86/Xcout
UART (7 bits) UARTi receive register
9 PAR
type 5 P8_7
VCC
1SP Vss disabled P87/Xcin R1
SP SP PAR
RxDi
1

RESET* 2SP PAR UART

100K VCC
from enabled M30262
UART (9 bits)
Clock R14
1

UART1 synchronous type 10K

R16 connector UART (8 bits)
UART (9 bits)
1 2 1 2
2.2K
1

MANUAL S1 + C7 JP2 J1
RESET EVQ-PAC04M 4.7uF 16V C22 CNVss 1 2
2

UARTi receive
0.1uF 0 0 0 0 0 0 0 D8 D7 D6 D5 D4 D3 D2 D1 D0 buffer register Vref
3 4
2

P1_7 P1_6
5 6
1

Address 03A616
MSB/LSB conversion circuit Address 03A716 P1_5
7 8
Address 03AE16 P9_3 P9_2
R17 Address 03AF16 9 10
2 P9_1 P9_0
50K Data bus high-order bits 11 12
P10_7 P10_
frequency 13 14
P10_5 P10_
15 16
S5B Data bus low-order bits P10_3 P10_
S5A P8_6 P8_6M 17 18
5 12 P10_1 P10_
19 20
3

CT204222ST JP3 to 50-pin MSB/LSB conversion circuit P8_7M P8_6

21 22
16 1 1 2 6 11 connector P8_5
23 24
P8_3 P8_2
D8 D7 D6 D5 D4 D3 D2 D1 D0 UARTi†transmit 25 26
15 2 buffer register P8_1 P8_0
P8_7 P8_7M VCC 27 28
EXT OSC 7 10 Address 03A216
P6_7
29 30
P6_6
1

Y2
to 50-pin Y1 Address 03A316 P6_5 P6_4
C9 Address 03AA16 31 32
20MHz 14 3 8 9 connector 1 4 P6_3M P6_2
33pF
UART (8 bits) Address 03AB16 33 34
UART (9 bits) P6_1 P6_0
35 36
2

1
13 4 * open JP3 to use CT204222ST Clock synchronous 32.768KHz P7_7 P7_6
UART (9 bits)
D3 D4 D5 37 38
internal ring
type
P7_5 P7_4
UP = RC_OSC
PAR
UP = IO C4 C5 RED YELLOW GREEN 39 40
UART P7_3 P7_2
1
2
3

2SP enabled
oscillator P7_1 41 42
DOWN = XTAL SP SP PAR DOWN = XC 1 2 2 1 TxDi P7_0
43 44
1SP PAR Clock RESET*
UART (7 bits) UARTi transmit register 45 46

1
disabled synchronous
type 20pF 20pF
UART (7 bits)
47 48

2
UART (8 bits) R4 R5
0 Clock synchronous
SP: Stop bit 2.2K 2.2K 49 50
C8 C10 type PAR: Parity bit

1
25x2 Connector
1 2 2 1 S6B R24 R25 R26

2
CT204222ST 680 680 680
33pF 33pF P7_0 5 12

2
6 11
Figure 1.15.2. Block diagram of UARTi (i = 0, 1) transmit/receive unit
P7_1 7 10

8 9 P7_2

UP = IO
DOWN = LEDs

Embedded Systems 2
NOTE: All resistors are 0.1 W, 5%, unless designat

Mitsubishi Electric & Electronics US

Z1 Z2 Z3 Z4 Z5 Z6 MH1 MH2 MH3 MH4 Title

MDECE30262 Board Rev A

FIDUCIAL FIDUCIAL FIDUCIAL FIDUCIAL FIDUCIAL FIDUCIAL MTG_HOLE MTG_HOLE MTG_HOLE MTG_HOLE Size Document Number
C MDECE30262

Date: Tuesday, October 01, 2002 Sheet 1

 Data Communications
There was no standard for networks in the early days and as a result it was difficult for networks
to communicate with each other.
The International Organization for Standardization (ISO) recognized this and in 1984 introduced
the Open Systems Interconnection (OSI) reference model.
The OSI reference model organizes network functions into seven numbered layers.
Each layer provides a service to the layer above it in the protocol specification and
communicates with the same layer’s software or hardware on other computers.

Layers 5-7 are concerned

with services for the
applications.

Layers 1-4 are concerned

with the flow of data from
end to end through the
network

Embedded Systems 3
Physical Layer (1) – Serial Communications
The basic premise of serial communications is that one or
two wires are used to transmit digital data.
– Of course, ground reference is also needed (extra wire)
Can be one way or two way, usually two way, hence two
communications wires.
Often other wires are used for other aspects of the
communications (ground, “clear-to-send”, “data terminal
ready”, etc).

101101100111
Tx Rx
Machine 1 Machine 2
Rx Tx
001101101111

Embedded Systems 4
Serial Communication Basics

Data
bits
Send one bit of the
message at a time
Message fields Message
– Start bit (one bit)
– Data (LSB first or MSB, and size – 7, 8, 9 bits)
– Optional parity bit is used to make total number of ones in data even or odd
– Stop bit (one or two bits)
All devices on network or link must use same communications parameters
– The speed of communication must be the same as well (300, 600, 1200, 2400,
9600, 14400, 19200, etc.)
More sophisticated network protocols have more information in each message
– Medium access control – when multiple nodes are on bus, they must arbitrate for
permission to transmit
– Addressing information – for which node is this message intended?
– Larger data payload
– Stronger error detection or error correction information
– Request for immediate response (“in-frame”)

Embedded Systems 5
 Bit Rate vs. Baud Rate
Bit Rate: how many data bits are transmitted per second?
Baud Rate: how many symbols are transmitted per second?
– == How many times does the communication channel change state per
second?
– A symbol may be represented by a voltage level, a sine wave’s
frequency or phase, etc.
These may be different
– Extra symbols (channel changes) may be inserted for framing, error
detection, acknowledgment, etc. These reduce the bit rate
– A single symbol might encode more than one bit. This increases the
bit rate.
• E.g. multilevel signaling, quadrature amplitude modulation, phase
amplitude modulation, etc.

Embedded Systems 6
Serial Communication Basics
RS232: rules on connector, signals/pins, voltage levels, handshaking, etc.
RS232: Fulfilling All Your Communication Needs, Robert Ashby
Quick Reference for RS485, RS422, RS232 and RS423
Not so quick reference:
The RS232 Standard: A Tutorial with Signal Names and Definitions,
Christopher E. Strangio
Bit vs Baud rates:
http://www.totse.com/en/technology/telecommunications/bits.html

Embedded Systems 7
UART Concepts
UART
– Universal – configurable to fit protocol requirements
– Asynchronous – no clock line needed to de-serialize bits
– Receiver/Transmitter

Embedded Systems 8
RS232 Communications Circuit
Example RS-232 buffer (level-shifting) circuit

Max202/3232 includes
charge pump to generate
+10 V and -10V from
single 5V supply

Logic-level signals RS232-level signals

(Vcc or Ground) (> 3 V or < -3 V)

Embedded Systems 9
 General UART Concepts
UART subsystems
–Two fancy shift registers
• Parallel to serial for
transmit
• Serial to parallel for
receive
–Programmable clock
source
• Clock must run at 16x
desired bit rate
–Error detection
• Detect bad stop or
parity bits
• Detect receive buffer
overwrite
–Interrupt generators
• Character received
• Character
transmitted, ready to
send another

Embedded Systems 10
Block Diagram of RX62N Serial Comm Interface

Embedded Systems 11
SCI in UART Mode
To communicate from the RX62N chip, you need to set up several
registers, including:
• Mode There are two primary “Data Registers”
• Speed • SCIx.RDR (Receive Data Register)
• Parity • SCIx.TDR (Transmit Data Register)
• Stop bits
• Configuration

Embedded Systems 12
Serial Mode Register (SMR)

SCIx.SMR – Operational values of the UART

Each bit is encoded to make a special meaning

CKS: transmission speed (more later)
MP: Multi processor (set to 0)
STOP: Stop bits
PM: Parity mode
PE: Parity Enable
CHR: Length of data
CM: Communications mode

Embedded Systems 13
Reading a Manual (SMR)

Embedded Systems 14
Setting up the Serial Control Register
We will use SCI0
There are several “control” registers you need to set up
before you can communicate.
– First, you need to set up the speed of your port.
– Select 8 data bits, no parity, one stop bit (8N1)
– Asynchronous mode

What would the byte be set as?

SCI0.SMR.BYTE =

Embedded Systems 15
Serial Control Register

Embedded Systems 16
Serial Control Register – Serial Status Register
Check to see is communications was successful (SCIx.SSR)

Embedded Systems 17
Identifying Errors
char read_sci0_status;
read_sci0_status = SCI0.SSR.BYTE;

What does it mean if the value holds 0x04?

What does it mean if the value holds 0x0C?

What does it mean if the value holds 0x24?

What does it mean if the value holds 0x20?

Embedded Systems 18
Setting up Speed of the Serial Port
The speed of communications is a combination of
• PCLK
• Bits CKS in the SMR
• The Bit Rate Register (BRR)

Based on formula:
B=bit rate, N=BRR setting,
n=CKS setting

So, if you want to communicate at 38,400 bps, if your PCLK

is 50 MHz, set n=0 and N=40
SCI0.BRR.BYTE = 40;

Embedded Systems 19
Example – Change to Slower Clock
What about a slower clock?

Say, 2400 bps? What do you need to set n and N?

Embedded Systems 20
Class Exercise – Set up clock
Set up to 115,200, including writing the code for BRR.

Embedded Systems 21
Error rate
The error rate is associated to the settings of n and N, since
you will not get the exact value of xx.0.
So, if you want to communicate at 38,400 bps, if your PCLK
is 50 MHz, set n=0 and N=40, error is:

Embedded Systems 22
What is the Maximum Speed??

Embedded Systems 23
Example – Set up Communications
Write a function to set up SCI0 to 115,200 bps, 8 data bits,
odd parity, 1 stop bit:

Embedded Systems 24
Example – Send/receive data
Write a small function to send the string “Sending data”
through the SCI0 port. Make sure to wait for the previous
char to be transmitted before you send the next char:

Embedded Systems 25
Serial Communications and Interrupts
Now we have three separate
threads of control in the program
– main program (and subroutines
it calls)
– Transmit ISR – executes when
UART is ready to send another
character
– Receive ISR – executes when
UART receives a character
Need a way of buffering information
between threads
– Solution: circular queue with
head and tail pointers
– One for tx, one for rx

Embedded Systems 26
Code to Implement Queues
Enqueue at tail (tail_ptr points to next
free entry), dequeue from head older newer
(head_ptr points to item to remove) data data
#define the queue size to make it easy
to change
One queue per direction
– tx ISR unloads tx_q head tail
– rx ISR loads rx_q
Other threads (e.g. main) load tx_q and
unload rx_q
Need to wrap pointer at end of buffer to
make it circular, use % (modulus,
remainder) operator
Queue is empty if size == 0
Queue is full if size == Q_SIZE

Embedded Systems 27
Defining the Queues

! "" # # #$ $ %
& $ "" # # '
( "" ) # $ % )
* &

& ' )+ ' )

Embedded Systems 28
Initialization and Status Inquiries
,# & - )

# ./ 0 11
)23 . / "" # % $ # $ , 4 5
)23! . /
)23& $ . /
)23 ( . /
*

% & - )
)2
)23 ( .. /
*

6 $$ & - )
)2
)23 ( ..
*

Embedded Systems 29
Enqueue and Dequeue
"" ) 7 8 $$ 5 9:;& ; 7 # )
) & - )+
< 6 $$ ) "" = ) $$>
)23 )2
)23& $11 .
)23& $ ?.
)23 ( 11
@ ""
* $
/ "" $
*

"" ) 7 $$ 5 # % # 7 A #% )
) & - )
./
< % ) "" B A # ) % @
)2
. )23 )2
)23!
)23 )2
)23! 11 . / "" # % $ 5 + $
)23! ?.
)23 ( 22
*

Embedded Systems 30
Serial Peripheral Interface (SPI)
• SPI bus is a de facto
standard developed by
Motorola
• Can work with as few
as three wires, but more
needed to access additional devices
• Better method to access peripherals
than parallel I/O.
• Common clock means you can
transmit at 25.0 Mbps
• Intended for very short distances
(i.e. on-board)
• The RX62N has two SPI masters

Embedded Systems 31
SPI Details
•Serial Clock – RSPCK
•Master Out, Slave in – MOSI (transmission from RX62N)
•Master In, Slave Out – MISO (transmission from peripheral)
•Slave Select – SSLx (select one of the peripheral devices)
We will not investigate Multiple Master modes

Embedded Systems 32
SPI registers
• Serial Peripheral Control Register (SPCR)
• Serial Peripheral Control Register 2 (SPCR2)
• Serial Peripheral Pin Control Register (SPPCR) – set to
0x00
• Slave Select Polarity (SSLP)
• Serial Peripheral Status (SPS)

• Serial Peripheral Data Register (SPDR)

Embedded Systems 33
Serial Peripheral Control Register (SPCR)

Embedded Systems 34
Serial Peripheral Control Register 2 (SPCR2)

Slave Select Polarity (SSLP) – set these to 0 (active low)

Embedded Systems 35
Serial Peripheral Bit Rate Register (SPBR)
8 Bit value, used with SPCR

Embedded Systems 36
Serial Peripheral Command Register (SPCMDx)

Embedded Systems 37
Serial Peripheral Command Register (SPCMDx)

Embedded Systems 38
Serial Peripheral Status (SPS)

Embedded Systems 39
Code to set up SPI
void Init_RSPI(void){ RSPI0.SPPCR.BYTE = 0x00;
MSTP(RSPI0) = 0; RSPI0.SPBR.BYTE = 0x00;
IOPORT.PFGSPI.BIT.RSPIS = 0; RSPI0.SPDCR.BYTE = 0x00;
PORT.PFGSPI.BIT.RSPCKE = 1; RSPI0.SPCKD.BYTE = 0x00;
IOPORT.PFGSPI.BIT.SSL3E = 0; RSPI0.SSLND.BYTE = 0x00;
IOPORT.PFGSPI.BIT.MOSIE = 1; RSPI0.SPND.BYTE = 0x00;
PORTC.DDR.BIT.B4 = 1; RSPI0.SPCR2.BYTE = 0x00;
PORTC.DR.BIT.B4 = 1; RSPI0.SPCMD0.WORD = 0x0700;
PORTC.DDR.BIT.B7 = 1; RSPI0.SPCR.BYTE = 0x6B;
PORTC.DR.BIT.B7 = 1; RSPI0.SSLP.BYTE = 0x08;
PORTC.DDR.BIT.B6 = 1; RSPI0.SPSCR.BYTE = 0x00;
PORTC.DR.BIT.B6 = 1; }
PORTC.DDR.BIT.B5 = 1;
PORTC.DR.BIT.B5 = 1;

Embedded Systems 40
Code to communicate via SPI
void RSPI_Transmit_LWord(int16_t sLowWord, int16_t sHighWord){
PORTC.DR.BIT.B4 = 0;
while (RSPI0.SPSR.BIT.IDLNF);
RSPI0.SPDR.WORD.L = sLowWord;
RSPI0.SPDR.WORD.H = sHighWord;
while (RSPI0.SPSR.BIT.IDLNF);
(void)RSPI0.SPDR.WORD.L;
(void)RSPI0.SPDR.WORD.H;
PORTC.DR.BIT.B4 = 1 ; //CS OFF
}

Embedded Systems 41
I2C
Inter-Integrated Circuit •A two line bus for
Bus communicating data at high
speeds
•Multiple devices on the
same bus with only one
master controlling the bus
•Needs pull up resistors and
is kept at a digital high level
when idle

Device 1 Device 2 Device 3 Device 4 Vcc

Address Address Address Address
(0x80) (0xC0) (0xE1) (0x70)

SCL

SDA

Embedded Systems 42
I2C: Properties
Renesas Inter Integrated Chip Bus

Modes I2C mode or SM bus mode

Max Transfer Speed Up to 1Mbps (most devices won’t

support speeds beyond 400kbps)
Max. number of devices/slaves 128 (0 to 27 bits-1)
connected per bus
Number of wires required for 2
communication (not including ground)
Max. Length of wires[6] 10 meters @ 100kbps

Number of bits per unit transfer 8

(excluding start and stop)
Slave Selection method Through addressing

Embedded Systems 43
I2C: Working
Two wires:
• SCL (Serial Clock): Synchronizing data transfer
on the data line
• SDA (Serial Data): Responsible for transferring
data between devices
• Together they can toggle in a controlled fashion
to indicated certain important conditions that
determine the status of the bus and intentions of
the devices on the bus.

Embedded Systems 44
I2C: Working (Contd …) START CONDITION
• Before any form of data transfer takes place, a device
wanting to transfer data must take control of the bus
(Needs to monitor the bus).
• If the bus is held high, then it is free. A device may issue
a START condition and take control of the bus.
• If a START condition is issued, no other device will
transmit data on the bus (predetermined behavior for all
devices).

START

Embedded Systems 45
I2C: Working (Contd …) STOP CONDITION
• When device is ready to give up control of the bus, it
issues a STOP condition
• STOP condition is one in which the SDA line gets pulled
high while the SCL line is high.
• Other conditions: RESTART (combination of a START and
STOP signal)

STOP

Embedded Systems 46
I2C: Working (Contd …) After START
• Address the slave device with one byte of data
which consists of a 7 bit address + 1 bit (R/W)
• If this bit is low, it indicates that the master wants
to write to the slave device; if high, the master
device wishes to read from the slave. This
determines whether the next transactions are
going to be read from or written to the addressed
slave devices.
• A ninth bit (clock) is transmitted with each byte of
data transmitted (ACK(Logic 0)/NACK(logic 1) bit).
The slave device must provide an ACK within the
9th cycle to acknowledge receipt of data

Embedded Systems 47
For Real???? Let’s have a look ..

START ACK STOP

7 bit address(0x3A) R/W bit

Embedded Systems 48
I2C: Code: Simple example (START and STOP)
void RiicIni(unsigned char in_SelfAddr){ void RiicUnIni(void){
SYSTEM.MSTPCRB.BIT.MSTPB21 = 0; SYSTEM.MSTPCRB.BIT.MSTPB21 = 1;
RIIC0.ICCR1.BIT.ICE = 0; }
RIIC0.ICCR1.BIT.IICRST = 1;
RIIC0.ICCR1.BIT.IICRST = 0; unsigned char RiicSendStart(void){
RIIC0.SARU0.BIT.FS = 0; if(RIIC0.ICCR1.BIT.ICE){
RIIC0.SARL0.BYTE = in_SelfAddr; while(RIIC0.ICCR2.BIT.BBSY);
RIIC0.ICMR1.BIT.CKS = 7; RIIC0.ICCR2.BIT.ST=1;
RIIC0.ICBRH.BIT.BRH = 28;
RIIC0.ICBRL.BIT.BRL = 29; while(!(RIIC0.ICCR2.BIT.BBSY&&RIIC0.ICS
RIIC0.ICMR3.BIT.ACKWP = 1; R2.BIT.START));
RIIC0.ICIER.BIT.RIE = 1; RIIC0.ICSR2.BIT.START=0;
RIIC0.ICIER.BIT.TIE = 1; return 1;
RIIC0.ICIER.BIT.TEIE = 0; }
RIIC0.ICIER.BIT.NAKIE = 1; else return 0;
RIIC0.ICIER.BIT.SPIE = 1; }
RIIC0.ICIER.BIT.STIE = 0;
RIIC0.ICIER.BIT.ALIE = 0; unsigned char RiicSendStop(void){
RIIC0.ICIER.BIT.TMOIE = 0; if(RIIC0.ICCR1.BIT.ICE){
PORT1.ICR.BIT.B3 = 1; while(RIIC0.ICCR2.BIT.BBSY){
PORT1.ICR.BIT.B2 = 1; RIIC0.ICCR2.BIT.SP=1;
RIIC0.ICCR1.BIT.ICE = 1; }
} return 1;
}
else return 0;
}

Embedded Systems 49
I2C Code: Reading and writing ….
unsigned char RiicReadByte(unsigned char unsigned char RiicWriteByte(unsigned char
slave_addr, unsigned char slave_addr, unsigned char data_byte){
slave_register_num){
RIIC0.ICDRT=slave_addr&(0xFE);
RiicWriteByte(slave_addr,slave_register while(!RIIC0.ICSR2.BIT.TDRE);
_num); RIIC0.ICDRT=data_byte;
RiicSendStop(); while(!RIIC0.ICSR2.BIT.TEND){
RIIC0.ICSR2.BIT.STOP=0; if(RIIC0.ICSR2.BIT.NACKF){
RiicSendStart(); RIIC0.ICSR2.BIT.NACKF=0;
while(!RIIC0.ICSR2.BIT.TDRE); return 0;
RIIC0.ICDRT=slave_addr|(0x01); }
while(!RIIC0.ICSR2.BIT.RDRF); }
if(RIIC0.ICSR2.BIT.NACKF==0){ while(!RIIC0.ICSR2.BIT.TDRE);
RIIC0.ICMR3.BIT.WAIT=1; while(!RIIC0.ICSR2.BIT.TEND) {
RIIC0.ICMR3.BIT.ACKBT=1; if(RIIC0.ICSR2.BIT.NACKF){
read_byte=RIIC0.ICDRR; RIIC0.ICSR2.BIT.NACKF=0;
while(!RIIC0.ICSR2.BIT.RDRF); return 0;
RIIC0.ICSR2.BIT.STOP=0; }
RIIC0.ICCR2.BIT.SP=1; }
read_byte=RIIC0.ICDRR; return 1;
while(!RIIC0.ICSR2.BIT.STOP); }
return read_byte;
}
else return 0xFF;
}

Embedded Systems 50
I2C Code: the Glorious main()
void main(void){
RiicIni(0x10);
RiicSendStart();
RiicWriteByte2(0x3A,0x2D,0x00);
RiicSendStop();
RiicSendStart();
i=RiicReadByte(0x3A,0x00);
RiicSendStop();
RiicUnIni();
while(1);
}

Embedded Systems 51