NATIONAL UNIVERSITY OF SINGAPORE

EXAMINATION FOR THE DEGREE OF B.ENG.

(Semester I: 2003/2004)

EE3204 - COMPUTER COMMUNICATION NETWORKS I

Nov 2003 - Time Allowed: 2 Hours

INSTRUCTIONS TO CANDIDATES:

1. This paper contains SIX (6) questions and comprises TWENTY TWO (22) pages.

2. Answer any TWO (2) questions from Section I and any TWO (2) questions from Section
II

3. Each question carries 25 marks.

4. This is a CLOSED BOOK examination.

5. All your answers must be written neatly in the appropriate spaces provided in the
question paper.

6. Linear graph paper will be supplied on request. Answer booklets will also be provided
on request if your answer exceeds the space provided.

7. Write your matriculation number in the space provided below.

8. Write the question number that you have attempted in the Question Number box.

MATRICULATION NUMBER: QUESTION MARKS MAX.

NUMBER MARKS
25
25
25
25
TOTAL 100
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Section I
Q.1
(a) Suppose that host A sends a 10000 byte message to host C through a two-hop path
A→B→C. The message is split into 1000-byte frames and is transmitted by the data
link protocol. Let the frame error probability on a link be 0.01. Assume that the
length and bandwidth of each link is the same.

i. Suppose that the data link control just transfers frames without
implementing any error control. Find the probability that the message
arrives successfully without any errors at host C.

ii. Suppose that error recovery is carried out end to end and that if there are
any errors, the entire message is retransmitted. What is the percentage of
bandwidth wasted on each of the links due to retransmissions to transfer
the message from A to C?

iii. Suppose that error recovery is carried out at the data link layer on a frame
basis on each link. What is the percentage of bandwidth wasted on each
of the links due to retransmissions to transfer the message from A to C?
(15 marks)

(b) Host A is connected to host B via a store-and-forward switch S. The bandwidth of

each of the links A→S and S→B is 10 Mbps. The propagation delay on each link is
20 μs. Switch S begins retransmitting a received packet 35 μs after it has finished
receiving it. Calculate the total time required to transmit 10,000 bits from A to B

i. as a single packet.

ii. as two 5,000-bit packets sent one right after the other.
(10 marks)

Please write your answer to Q.1 on the following blank spaces.

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Q.2
(a) Suppose that the maximum utilization that can be achieved by a 1 km-long 10 Mbps
CSMA/CD broadcast LAN is 0.8 when 4 hosts are active. What is the throughput
(in Mbps) achieved when each of the 4 hosts attempts to transmit during a slot with
probability 0.3? Use the simplified model for the analysis and make necessary
assumptions.
(10 marks)

(b) Consider a token ring with a ring latency of 20 μs. Assuming that the “delayed
token release” strategy is used, what is the effective throughput rate that can be
achieved by a 16 Mbps ring? Assume that 5 hosts which are evenly placed in the
ring are active. Assume that token transmission time is negligible, but the token
propagation time between two successive hosts is not negligible. Further assume
that frame size is 200 bytes and for each frame transmission the token needs to be
captured and released by a host.
(10 marks)

(c) Describe a scenario wherein a host in a FDDI ring measures TRT as 2×TTRT.
(5 marks)

Please write your answer to Q.2 on the following blank spaces.

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Q.3
(b) Node A transmits 1000-bit frames to node C through node B. The link A-B is 4000
km long and link B-C is 1000 km long. The frame error probability is 0.1 for link
A-B and 0.2 for link B-C. The propagation delay is 5 μs/km for each of the links.
Between A and B, sliding window based selective-repeat ARQ is used. Between B
and C, stop-and-wait ARQ is used. The transmission time of ACK frames is
negligible. The bandwidths of links A-B and B-C are 100 kbps and 200 kbps,
respectively.

i. What is the best throughput that can be achieved by node B? Under what
condition does this happen?

ii. How many bits are required for the sequence number by node A so that the
utilization of link A-B is maximized subject to the condition that the buffers
of node B are not flooded. [Hint: In order not to flood the buffers of B, the
average number of frames entering B must not be larger than that leaving B
over a long interval.]
(7+8=15marks)

(c) Prove that two-dimensional parity can detect all 2-bit errors.
(5 marks)

(d) It is possible that when counter-based framing is used a framing error might cause
back-to-back frames to be incorrectly received. Justify your answer.
(5 marks)

Please write your answer to Q.3 on the following blank spaces.

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Section II
Q.4 With regard to the network shown in Figure Q4, answer the following questions.

(a) Determine the minimum value of x, i.e. the cost of link (2,7), for the proper routing
of packets. Justify your answer.
(5 marks)

(b) Using x as determined in Q.4(a), demonstrate at least 3 steps of Kruskal's algorithm

for obtaining the MST (minimum spanning tree) in the network shown in Figure
Q4. Without arranging the node positions, sketch the MST obtained. (10 marks)

(c) Using x as determined in Q.4(a), demonstrate at least 3 steps of Prim's algorithm for
obtaining the MST (minimum spanning tree) beginning at node 5. Without
arranging the node positions shown in Figure Q4, sketch the MST obtained.
(10 marks)
3 4
1 2 3
2 1 1 2
1 5 x 4 2
2 2 -1
3
6 7 8
3 3
1 -2
3

9
Figure Q4

Please write your answer to Q.4 on the following blank spaces.

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Q.5 (a) The following questions are in regard to crossbar switches.

i. Sketch an 8 x 2 (8 inputs, 2 outputs) crossbar switch using several 4 x 2
crossbar modules.
ii. What is the minimum number of 4 x 2 crossbar modules required in part
(i)?
iii. How many wins must an input chalk up for it to survive through the
switch?
(10+2+3 =15 marks)

(b) Sketch an 8 x 8 (8 inputs, 8 outputs) Banyan-Batcher self-routing fabric and

provide sufficient explanations and illustrations to describe the purpose and
mechanism of the Banyan and the Batcher sections and their overall purpose when
placed together.
(10 marks)

Please write your answer to Q.5 on the following blank spaces.

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Q.6 Let H bytes be the size of the standard ATM header and L bytes represent the payload
size of the ATM cell. The payload size L is to be designed and optimized. Now, a key
design criterion for L is often taken from the point of view of transmission efficiency
and overall delay.

(a) Assume that the payload of the ATM cells to be transmitted is completely filled by
information. Propose an expression for the transmission efficiency E of the cell in
terms of H and L. (5 marks)

(b) Let D represent the overall delay arising out of a multiple-hop, store and forward,
ATM circuit. Assume zero propagation delay, the transmission rate is 2 bytes per
second for each cell and is identical across each hop and the total amount of
information to be transmitted is S bytes. Determine optimal L values to minimize D
for a 1-hop, 2-hop and 3-hop ATM circuit. Write down the optimal L values for S
= 20000 bytes. What relationship can be drawn between the number of hops and
the transmission efficiency E when D is minimized? (Note: For simplicity, assume
that L need not be an integer.) (15 marks)

(c) Determine the number of hops required so that the standard ATM cell payload size
will minimize the overall delay for S = 20000 bytes. What happens if the
information size drops to S = 1000 bytes or smaller? Give a reasonable conclusion
as to what should the best payload size be. (5 marks)

Please write your answer to Q.6 on the following blank spaces.

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END OF PAPER