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MP ct1 Set 2

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30 views2 pages

MP ct1 Set 2

Uploaded by

nithya
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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SRM INSTITUTE OF SCIENCE & TECHNOLOGY d) Mixed direction is when lines into micro processor and some

RAMAPURAM CAMPUS other out of microprocesses.


DEPARTMENT OF ELECTRICAL AND ELECTRONICS 8. The device that enables the microprocessor to read data from the
ENGINEERING
external devices is
CYCLE TEST -I Date : 21.02.18
a) printer b) joystick c) display d) reader
Sub. Code :15EE305J Max. Marks : 75
Sub. Name : Duration : 130 MIN 9. In direct memory access mode, the data transfer takes place
MICROCONTROLLERS a) directly b) indirectly
Year / SEM : III/ VI c) directly and indirectly d) none of the mentioned
10. The pin that requests the access of the system bus is
PART A (10 x 1 = 10 Marks) a) HLDA b) HRQ c) ADSTB d) None of the mentioned
1. If the microprocessor has 10 address lines, then the number of 11. In the TRAP, RST 7.5, RST 6.5, RST 5.5, which is having top
memory locations it is able to address is Priority ?
a) 512 b)1024 c) 2048 d) 2402 a)TRAP b)RST 7.5 c)RST 6.5 d)RST 5.5
2. Which of the following signals are used when a peripheral request 12. The data that is entered from the left side of the display unit is of
the mp for a DMA operation a) left entry mode b) right entry mode
a)IO / M b) HOLD & HLDA c) READY d) Read & Write c) left and right entry modes d) none
3. WAIT states are used : 13. The registers that store the keyboard and display modes and
a) to give slow devices additional time operations programmed by CPU are
b) to insert a deliberate delay a) I/O control and data buffers b) Control and timing registers
c) During I/O operation d) During DMA operation c) Return buffers d) Display address registers
4. The RAM which is created using bipolar transistor is 14. In 8257 (DMA), each of the four channels has
a) Dynamic RAM b) Static Ram c) DRAM d) DDRAM a) a pair of two 8-bit registers b) a pair of two 16-bit registers
5. Whenever a large memory is required in a microcomputer system, c) one 16-bit register d) one 8-bit register
the memory subsystem is generally designed using 15. The register that stores all the interrupt requests in it in order to
a) Static RAM b) Dynamic RAM serve them one by one on priority basis is
c) Both static and dynamic RAM d) ROM a) Interrupt Request Register b) In-Service Register
6. The port that is used for the generation of handshake lines in mode 1 c) Priority resolver d) Interrupt Mask Register
or mode 2 is PART B
a) port A b) port B c) port C Lower d) port C Upper (ANSWER ANY 6) (6*4=24)
7. What is the direction of address bus ? 16. Define Microprocessor based bus system
a) Uni – directional into microprocessors 17. Explain the flag register of 8085
b) Uni – directional out of microprocessors 18. Tabulate machine cycle status and control signal of microprocessor.
c) Bi – directional 19. Explain Bit set reset mode of 8255
20. Explain DMA data transfer and the related signals.
21. Differentiate between static and dynamic memory
22. Define key debouncing
23. What is the need for interrupts ?
PART C
Answer All The Questions (2*12= 24 marks)
24. Draw and Explain the architecture of 8085
(OR)
25. Explain data transfer concepts and methods used in detail.

26. With a neat diagram explain the different modes of 8255.


OR
27. Explain the 8257 DMA controller with a neat block diagram
28. With a neat diagram explain the operation of 8279 keyboard /
Display controller
OR
29. With a neat diagram explain the operation of various blocks in
8279

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