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Addressing Modes

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23 views18 pages

Addressing Modes

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kishoreupk
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Computer

Architecture
Unit I – BASIC STRUCTURE OF
COMPUTERS
7. Addressing Modes
Dr.R.Kalaiselvi
Overview

➢From which storage unit operand has to be


retrieved for instruction execution?

➢ How to identify operand in a storage unit?


Addressing Modes

➢Different ways in which the location of an operand is


specified in an instruction is referred to as
addressing modes. Thus it specifies a rule for
interpreting the address field of the instruction
before the operand is fetched.

Note: operands may be stored in memory, registers or


stack
Addressing Modes Types
1. Immediate

2. Implied

3. Memory – Direct & Indirect

4. Register – Direct & Indirect

5. Auto increment and decrement

6. Indexed

7. Relative
Instruction Format

Opcode Source operand1 addr Source operand 2 addr Destination


Immediate Addressing
Mode
➢The operand (source) is specified (given) in the
instruction itself with preceding #

Literal
Mov 5 R1

Ex: Mov #5, R1


• The use of a constant in the inst, i.e. R1 ← 5
Ex: Add #10, R2
Add 10 R2

• The use of a constant in the inst, i.e. R2 ← [R2]+10


Implied Addressing Modes

➢As accumulator is a default register involved in the


execution its address need not to be explicitly
specified in the instruction

Ex : Add LOC Add LOC


• AC is implied in the instruction ie “One-Address”
instr.

Ex: Add Add

• TOS is implied in the inst ie “Zero-Address” instr.


Effective Address
➢Address of a data.

➢Data may be stored in register or in memory

Memory Register

1000 A R0 A x582
1001 B R1 B
1002 C R2 C
Register Addressing Modes

➢Register which hold the operand is specified in


the instruction. Thus instruction has the
effective address
Mov R1 R2

Ex: Mov R1,R2 R1 10 R2 10

• The content of R0 is copied to R1


Register Indirect Addressing Modes
➢Register holds the address of the effective
address
Mov R1 (R2)

Memory
Ex : MOV R1, (R2)
1000
1001
R1 10 1002 10

R2 1002
Memory Direct Addressing Mode
➢Memory location in which holds the operand is
specified in the instruction.

➢Thus instruction has the effective address


Memory
Ex : MOV A, C 1000 10 A
1001 20 B
1002 10 C
Memory Indirect Addressing Mode
➢Memory location holds the address of effective
address.
Memory

1000 10 A
20 B
Ex : MOV A, (C) 1001
1002 2000 C

2000 10
Memory

Addressing Mode Types


1000 190
1004 420
1008 310
➢Autoincrement / Autodecrement 100C 140
101C 505
• Access & update in 1 instr.

Mov #5, R0 R0 54 R2 1000


1004

R1 0190
610
1565
Mov #0, R1
L1 Add (R2)+, R1 Ans 1565
Dec R0
Branch>0 L1
Mov R1, Ans
Indexed Addressing mode
Mov #100,R3 Find the sum of all students mark for a course
Memory
Mov L, R0 Thus the operand address is obtained by adding a
1000 id1 L constant to an address
Mov #0,R1
1004 m1 Constant is stored in an index register, thus index
1008 m2 Mov #0,R2 register is added with an address to get the
operand address
100C id2 L Add 4(R0),R1
1010 m1 Add 8(R0),R2
…..
Add #12,R0
Dec R3
Branch > 0 L
Mov R1,m1tot
Mov R2, m2tot
Relative Addressing Mode
2000 Mov #100,R3
1000 Mov #100,R3
2004 Mov L, R0
1004 Mov L, R0
2008 Mov #0,R1
1008 Mov #0,R1
200C Mov #0,R2
100C Mov #0,R2
2010 L Add 4(R0),R1
1010 L Add 4(R0),R1
2014 Add 8(R0),R2
1014 Add 8(R0),R2
2018 Dec R3
1018 Dec R3
201C Branch > 0 L
101C Branch > 0 L
2020 Mov R1,m1tot
1020 Mov R1,m1tot
Mov R2, m2tot
Mov R2, m2tot

➢Address location is identified


relative to the program counter
Summary
➢How an operand address is calculated based on the
address field in an instruction?
Sources for this video
➢Carl Hamacher, Zvonko Vranesic and Safwat Zaky,
“Computer Organization”, 5th Edition, McGraw-Hill,
2014

➢https://www.slideshare.net/zuhaibroyzuhaib/compu
ter-architecture-62009686

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