Computer Science – II

Chapter 2

Instruction Set and Programming

Addressing I/O Devices :
• When addresses are used to select I/O devices these addresses are not used for any
memory location.
• This type of I/O addressing is known as “memory mapped I/O.
• Microprocessor 8085 uses I/O mapped I/O method is used for I/O devices.
• This address may be Memory or I/O depends on signal present at pin IO/M
Memory mapped I/O I/O mapped I/O

I/O is assigned to separate address space of memory I/O is assigned with same address of memory.

Separate control line is not required It require control signal like IO/M

Memory space is reduced due to insertion of I/O address. Full memory address space can be used.

It requires 16 bit address bus. It uses 8 bit address bus only.

T-STATE, MACHINE CYCLE, INSTRUCTION CYCLE.
T-state :
• The subdivision of an operation which is
performed in one clock period is called as T-State.

Machine cycle :
• Machine cycle is defined as the time required to
complete any operation of accessing either
memory or I/O which is the subpart of an
instruction cycle.
• In 8085 one machine cycle can consist of three to
six T-states.
Instruction cycle :
• An instruction cycle is defined as the time
required to complete the execution of one
instruction.
• In 8085 one Instruction cycle can consist of one to
five Machine cycles.
 Addressing Modes in 8085
• Addressing modes are the way of specifying data to be operated by an instruction.
• This data is an immediate data or an address.
• It also specifies whether the given operand is register or register pair.
• The instructions are classified according to type of addressing data.
The addressing modes are classified into five types.

1. Direct addressing
2. Register Addressing
3. Register Indirect Addressing
4. Immediate addressing
5. Implicit addressing
Direct Addressing mode
• The address of the operand is specified in the instruction.
• e.g. LDA 3000 H
• Load accumulator with contents of memory location 3000 H.
• All of the direct addressing mode instructions are 3 byte instructions.

Register Addressing Mode

• In this mode register name is specified in the instruction.
• Address is not required for this type.
• This is register to register or accumulator to register transfer.
• All of the register addressing mode instructions are 1 byte instructions.
• Eg: ADD B
Register Indirect addressing Mode
• In this mode register name is specified in the instruction.

• Address is not required for this type.

• This is register to register or accumulator to register transfer.

• All of the register indirect addressing mode instructions are 1 byte instruction.

• E.g. MOV A,M

Immediate Addressing Mode

• Data (operand) is specified immediate after Mnemonic within the instruction itself.
• All of the immediate addressing mode instructions are 2 or 3 byte instruction.
• E.g. MVI B,55 H
 Implicit Addressing Mode
• The address of data is contained with opcode itself and operand is absent.
• Many instructions of logical group belong to this mode.
• These instructions are 1 byte .
• E.g. CMA (Complement Accumulator)
Instruction Formats/Size
• The 8085 instruction set is classified into 3 categories by considering the length of the instructions.

• In 8085, the length is measured in terms of “byte”.

• Types of instruction are:

1-byte instruction

2-byte instruction

3-byte instruction
1-Byte Instruction
The opcode and the operand of an instruction are represented in one byte only.
Example-1: MOV B,A (Copy the contents of accumulator in register B.)

2-Byte Instruction
Two-byte instruction is the type of instruction in which the first 8 bits indicates the
opcode and the next 8 bits indicates the operand.
Example-1: MVI A,32H (Copy 32H to accumulator.)

3-Byte Instruction
Three-byte instruction is the type of instruction in which the first 8 bits indicates the
opcode and the next two bytes specify the 16-bit address/data.
The low-order address is represented in second byte and the high-order address is
represented in the third byte.
Example-1: LDA 2050H (Copy8 bit content of memory address 2050 H to accumulator.)
 INSTRUCTION SETS
The instruction set of 8085 microprocessor is divided into 5 different groups as following:

1) Data transfer group

2) Arithmetic group

3) Logic group

4) Branching group

5) Stack, I/O, Machine control group.

1) Data Transfer Group :
This group of instruction copies data from a location called source t another location called destination, without
modifying the content of the source.

1) MOV rd , rs
• This instruction will copy destination register with the content of source register. The content of source
register are not altered i.e. they remain unchanged. rd and rs can be of one of registers A, B, C, D, E, H, L.
• Let [A]=05H and [B]= 55H
• Instruction: MOV A, B
• After execution: [A]=55H and [B]= 55H
• Instruction length: 1- byte
• Addressing mode: Register Addressing Mode
• Flags affected : None
2) MOV r , M
• This instruction will load destination register with the content of memory location,
whose address is stored in H-L register pair.
• The content of memory location are not altered.
• r can be any one of register A, B, C, D, E.
• Let [HL]=C500H & [B]= 82H
Memory
• Instruction: MOV B, M C500H 35 H

• After execution: [B] = 35H [C500] = 35H

• Instruction length: 1- byte
• Addressing mode: Register indirect addressing mode
• Flags affected : None
3) MOV r , M
• This instruction will copies the content of register r to the memory location, whose
address is placed in H-L register pair.
• The content of register are not altered.
• r can be any one of register A, B, C, D, E.
• Let [HL]=C500H & [B]= 82H
• Instruction: MOV M, B
• After execution: [B] = 82H
Memory
C500H 82 H

• Instruction length: 1- byte

• Addressing mode: Register indirect addressing mode
• Flags affected : None
4) MVI r , 8-bit data

• This instruction will load the register r with 8- bit immediate data specified in second
byte of instruction.

• Let [A] = 82H

• Instruction: MVI A, 35H

• After execution: [A] = 35H

• Instruction length: 2- byte

• Addressing mode: Immediate addressing mode

• Flags affected : None

5) MVI M , 8-bit data
• This instruction will load the memory location, whose address is stored in H-L pair with
8-bit immediate data specified in the second byte of instruction.

• Let [HL] = C500H

• Instruction: MVI M, 82H

• After execution:
Memory
C500H 82 H

• Instruction length: 2- byte

• Addressing mode: Immediate addressing mode

• Flags affected : None

6) LDA 16-bit address
• This instruction will load accumulator with content of memory location, whose address
is given in the instruction itself.

• The content of memory location are not altered.

• Let C500] = 26 H
• Instruction: LDA C500
• After execution: [A] = 26 H [C500] = 26 H
• Instruction length: 3- byte
• Addressing mode: Direct addressing mode
• Flags affected : None
7) STA 16-bit address
• This instruction will load content of accumulator into the memory location, whose
address is specified in the instruction.

• The content of accumulator are note altered.

• Let [A] = 35 H

• Instruction: STA C500 H

• After execution: [C500] = 35 H [A] = 35 H

• Instruction length: 3- byte

• Addressing mode: Direct addressing mode
• Flags affected : None
8) LDAX Rp
• The content of memory location, whose address is stored in register pair rp are loaded
into A.

• The content of memory location remains unchanged.

Memory
• Let [B] = 25 H, C = 25 H and
2525 33 H
• Instruction: LDAX B

• After execution: [A] = 33 H

• Instruction length: 1- byte

• Addressing mode: Register indirect mode
• Flags affected : None
9) STAX Rp
• The content of accumulator are transferred to the memory location whose address is
stored in register pair rp.

• Let [D] = 25 H and [E] = 25 H, [A] = 55 H

• Instruction: STAX D

• After execution:
Memory
• [2525] = 55 H
2525 55 H
• Instruction length: 1- byte
• Addressing mode: Register indirect mode
• Flags affected : None
10) LXI Rp, 16-bit data/address
• 16 bit data is copied into the designated register pair. The register pairs can be BC, DE, HL
or SP.

• SP (stack pointer) is not a valid register pair, but it can be used in LXI instruction.

• LXI H, 3500 H

• After execution:

• H = 35 H and L = 00 H

• Instruction length: 3- byte

• Addressing mode: Immediate mode
• Flags affected : None
11) LHLD 16-bit data/address
• The content of memory location whose address is specified in the instruction are loaded
into register L and the content of next memory location loaded in register H.

• Let Memory
2100H 31H
2101H 52H
• Instruction : LHLD 2100 H

• After execution : H = 52 H and L = 31 H

• Instruction length: 3- byte

• Addressing mode: Direct addressing mode
• Flags affected : None
12) SHLD 16-bit data/address
• The content of register L are transferred to the memory location whose address is specified
by byte 2 and byte 3 of the instruction.
• The contents of register H are moved to succeeding memory location.
• Let [H] = 32H and [L]=35 H
• Instruction : SHLD 2100 H
• After execution : Memory
2100H 35H
2101H 32H
• Instruction length: 3- byte
• Addressing mode: Direct addressing mode
• Flags affected : None
13) XCHG
• The content of register H are exchanged with that of register D and the content of
register L are exchanged with that of register E.
• Let [H] = 23 H, [L] = 32 H, [D] = 53 H , [E] = 55 H
• Instruction: XCHG
• After execution:
[H]=53H and [L]=55 H
[D]=23H and [E]=32 H
• Instruction length: 1- byte
• Addressing mode: Register mode
• Flags affected : None
 Exercise :
1. Copy 8-bit data from reg D to reg B.

2. Move 05H to reg L.

3. Load 8-bit data from memory location D543H to Accumulator.

4. Transfer 8 bit data from C500H memory location to reg B.

5. Copy 8-bit data from B2B2H memory location to C3C3H memory location.

6. Load DE reg. pair with 23B2H.