EXPERIMENT -1 Aim:- Introduction to digital electronics lab- nomenclature of digital ICs, specifications, study of the data sheet, concept of Vcc and ground, verification of the truth tables of logic gates using TTL ICs, Apparatus Required: Digital lab kit, single strand wires, breadboard, TTL, Gates ICNO. “AND 7408 OR TaD NAND 7400 NOR 7402 NOT 7404 XOR 74136 theory Logic gates are idealized or physical devices implementing a Boolean function, which it performs a logical operation on one or more logical inputs and produce a single output. Depending on the context, the term may refer to an ideal logic gate, one that has for instance zero rise time and unlimited fan out or it may refer to anon-ideal physical device. The main hierarchy is as follows:- 1. Basie Gates, 2. Universal Gates 3. Advanced Gates 5 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.Basic Gates 1. AND gate: - Function of AND gate is to give the output true when both the inputs are true. In all the other remaining cases output becomes false. Following table justifies the statement:- input A input Output 7 T 7 T ° o ° T o ° ° o Dushin-Uine Package + C cc 1c 7408 2. OR gate: - Function of OR gate is to give output true when one of the either inputs are true .In the remaining case output becomes false, Following table justify the statement:- Input A Tnput 8 Output 0 0 0 0 T 1 T 0 T 1 7 T & | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.NOT gate: converts true input to false and vice versa. Following table justifies the statement :~ G re Py) fe Function of NOR gate is to reverse the nature of the input It Input ‘Output Ic 7404 7 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.Universal Gates 1, NAND gate: -Function of NAND gate is to give true output when one of the two provided input are false. In the remaining output is true case Following table justifies the statement Tnput A Taput B ‘Output r z ° 7 0 7 o z z ° 0 T Ye , a ovo Poros 4 3 1c. 7400 2. NOR gate: - NOR gate gives the output true when both the two provided input are false. In all the other cases output remains false. Following table justifies the statement :- Input A Input B ‘Output. i 7 0 1 0 ° 0 T 0 0 0 1 3 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.Voc vA Be Me va a2 At + PP P | & fe TP yo oat B1 v2 a2 a2 GND ie. 7402 Advanced Gates 1, XOR gate: - The function of XOR gate isto give output true only when both the inputs are true. Following table explain this:~ Input A Input B Output T T 0 1 0 1 0 T 7 0 0 0 1C 74136 9 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.Procedur ‘Place the breadboard gently on the observation table. Fix the IC which is under observation between the half shadow line of breadboard, so there is no shortage of voltage. * Connect the wire to the main voltage source (Ve) whose other end is connected to last pin of the IC (14 place from the notch). * Connect the ground of IC (7" place from the notch) to the ground terminal provided on the digital lab kit © Give the input at any one of the gate of the ICs i.e. 1*, 2", 3°, 4" gate by using connecting wires.(In accordance to IC provided). © Connect output pins to the led on digital lab kit. ‘+ Switch on the power supply. © If led glows red then output is true, if it glows green output is false, which is numerically denoted as 1 and 0 respectively. The Color can change based on the IC manufacturer it’s just verification of the Truth Table not the color change. Resul All gates are verified. Observed output matches theoretical concepts. ‘+ All connections should be made neat and tight. ‘+ Digital lab kits and ICs should be handled with utmost care. ‘* While making connections main voltage should be kept switched off. ‘+ Never touch live and naked wires Pre Experiment Question: 1. What is a logic gate? Ans: Logic gate is a physical device implementing a Boolean function and performs Logical operation on one or more logic inputs and produces a single logic output. 2. What are universal gates? ‘Ans: NAND and NOR gates are called universal gates as any type of logic gates or logic Functions can be implemented by these gates. ‘10 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.What are basic gates? Ans: AND, OR, Not are called basic gates. 4, State De-Morgan’s theorem, Ans: (x+y)!= xy! Gytaxity 5. What is the primary motivation for using Boolean algebra to simplify logic expressions? Ans: (1) Boolean algebra reduces the number of inputs required. (2) Ttwill reduce number of gates (3) It makes easier to understand the overall function of the circuit Post Experiment Questions: 1. Which of the logical operations is represented by the + sign in Boolean algebra? Ans: OR gate 2. Which of the two input logie gate can be used to implement an inverter ei ‘Ans: Ex-NOR gate 3. Which are the logic gates whose all output entries are logic 1 except for one entry there is logic 0? ‘Ans: NAND and NOR gate 4, TTL operates froma__5 volt supply. 5. When the output of a NOR gate is high? ‘Ans : [fall the inputs are low 11 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.EXPERIMENT- 2 “Implement of the given Boolean function using logic gates in both SOP and POS forms Two input SOP - A.B + A’.B" Two input POS: - (A+B) (B+C) (A+C") Apparatus required:-Digital Lab Kit, Single Strand Wires, ICs, breadboards, Connecting Wires. theory: a) SOP: - Itis the Sum of product form in which the terms are taken as 1. It is, denoted in the K-map expression by sigma (3) AB+A'B’ Logie Circuit OF this expression:- A —————_f ad B OR Truth Table for this SOP expression A B x BP AB ©.B | Y=AB+ AB 0 0 1 1 0 1 I 0 T 1 a a a 0 1 0 0 1 0 0 0 1 1 0 0 1 0 1 12 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.b) POS: - It is the product of the sums form in which the terms are taken as 0. It is denoted in the K-Map expression by the Sign pie () (AtB) (B+ (AEC) Circuit Diagram _———— : AND AND NoT oR Truth Table foe POS expression x 0 c AB BC | MC | mB Oat) 0 0 1 0 € 0 1 0 1 0 1 0 0 1 i 1 1 1 1 1 1 L 0 1 T L 0 0 1 1 0 0 1 0 T 1 T r T 1 1 For SOP for Place the Digital lab kit at one place. Take the one AND gate ICs i.e, IC no.7408, one NOT gate IC i.e. IC no, 7404 and one OR gate IC i.e, IC no, 7432 Place these 3 ICs in the breadboard one by one. Now, connect the AND gate with the inputs of A and B and other AND gate in the same ven by the complement input of the A and B i.e. A’ and B’ by using NOT gate with the help of connecting wires, Give the output voltage Vee and GROUND 1o all the ICs separately. 13 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.PeNe Bee When whole configuration is read, gently on the switch and note there output of different values of A and Bie. either 0 or | For POS form :- (A+B\(B+C)(A+C Place the Digital lab kit at one place. Take the 1 OR, 1 AND, 1 NOT gates IC Place these 3 ICs in the breadboard one by one, Now, connect the OR gate of Input A or B, B or C and last one is A or C’ (i.e. complement of C using NOT gate, Inputs are connected with the help of connecting wires ‘When whole circuit is complete, on the switch and note down the output with different values of A, Band C. Result:-Hence, given Boolean Expression is implemented by the Logic Gates. ie) ABTA'B’ Gil) (AFB) (B+C) (A¥C’) Precaution: ‘Connecting wires should be rubbed with sand papers so that there is no rust. Make sure that the apparatus is switched off while placing ICs and connecting of wires. ‘The connections should be tights. ICs are placed in a proper way in the breadboard. There is no short of current in the in ‘same inputs, Pre Experiment Question: 1) What is a combinational circuit? Ans: A combinational circuit is one where the output at any time depends only on the present combinations of inputs at that point of time, 2) What is a sequential cireuit? Ans: Sequential circuit consists of a combinational circuit to which storage elements are Connected to form a feedback path 14 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.3) What are the various methods of simplifying the Boolean function. Ans: (1) Algebraic method (2) Kamaugh method (3) Variable entered mapping technique (4) Quine ~ McCiuskey method 4) What do you mean by minterm? Ans: Minterms are the product terms which contain all variables either in normal or complement form. 5) What do you mean by maxterm? ‘Ans: Maxterms are the sum terms which contain all variables either in normal or complement form, Post Experiment Question: 1) Convert the expression Y=AC'+ AB4AC into SOP form. Ans : Y= AC(B+B!) + AB (C+C)) + BC (A+A}) ABC! ABC's ABC + ABC'ABC + A'BC = ABC's AB'C'+ ABC + A'BC 2) Convert the POS expression Y= (A+B) (B+C) (A+C) into canonical POS expression. Ans: Y= (A+B+CC) (B+C+AA) (A+C +B!) ( A¥BHC) (A¥B+C) (A¥B+C) (AB=C) (A*B+C) ( A¥B'HC) = (ABC) (A+BHC) (A+B+C) ( A'4B-C) 3) Define POS. Ans: POS form expresson contains two or more OR terms which are ANDed together to form POS expression, 4) Define SOP. ‘15 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.Ans: SOP form expression contains two or more AND terms which are ORed together. 5) Define canonical form representation of Boolean function, ‘Ans: Ifeach term in SOP and POS form contains all the literals that are known then these are known as canonical form, ‘6 | DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, DRONACHARYA GROUP OF INSTITUTIONS, GR. NOIDA.