10/1/2023

CS 207 Computer Organization and Architecture

(Section-B)

Central Processing Unit

CPU Organization
A instruction is of various length depending upon the number of addresses it contain.
Generally CPU organization are of three types on the basis of number of address fields:
• Single accumulator organization
• General register Organization
• Stack organization

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Single Accumulator Organization

Example: 1
One-Address Instructions:
• Instruction format requires only one
address field.
• One address can be a register name or
memory address.
• It uses implied AC register for all data Example: 2 X = (A+B)*(C+D)
manipulation. One operand is in
accumulator and other is in register or
memory location.
• Implied means that the CPU already
know that one operand is in
accumulator so there is no need to
specify it.

General register Organization

Instruction format requires two or three address fields.
Two address instruction format: Three address instruction format:
• Specify either two registers or one • Two registers and one memory or
register and a memory location. three registers and two memory
Assumes that the destination address is locations and one register are
the same as that of the first operand specified.
Example 1: • Assumes that the destination address is
ADD R1 , R2 the same as that of the first operand
Micro-operation: R1 R1+R2 Example 1:
ADD R1 , R2 , R3
Example 2: X = (A+B)*(C+D)
Micro-operation: R1 R2+R3
Example 2:
X = (A+B)*(C+D)

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Stack Organization
• The computers which use Stack-based CPU Organization are
based on a data structure called stack. The stack is a list of
data words. It uses Last In First Out (LIFO) access method
which is the most popular access method in most of the CPU.
• A register is used to store the address of the topmost element
of the stack which is known as Stack pointer (SP).
• In this organization, ALU operations are performed on stack
data. It means both the operands are always required on the
stack. After manipulation, the result is placed in the stack.
Zero Address instructions:
• Can be found in a stack-organized computer.
Push Operation: Pop Operation:

Stack Organization
• A stack based computer do not use address field in instruction. To evaluate a expression
first it is converted to revere Polish Notation i.e. Post fix Notation.
• Expression: X = (A+B)*(C+D)
• Postfix : X = AB+CD+*
• TOS means top of stack
• M[X] is any memory location

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Problem and Discussion

Addressing Modes
• Addressing modes are the ways by which the operand of an instruction is
specified. It is a rule for interpreting or modifying the address field of the
instruction before the operand is actually executed.
• Implied Mode: (Stack Oriented Addressing Mode)
 Operands implicitly specified in the definition of the instruction.
 All register reference instruction that use accumulator are implied-mode
instruction.
 Zero address instructions in a stack organized computer are implied mode
instructions.
Example: CLA, CMA, INC,CLE

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Addressing Modes
• Immediate Mode:
• Operands is specified in the instruction itself.
• Immediate mode instruction has an operand field rather
than an address field.
• Useful for initializing registers to a constant value.
• Operand field: Actual Operand + Operation
Example: 1
MOV AL, 35H (move the data 35H into AL register)
ADD, 7

Addressing Modes
• Register Mode:
• Operands are in Registers that reside with in the CPU.
• Any one of 2k Registers are selected from the k-bit of the
register field in the instruction.
Example: AC ← AC + [R]

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Addressing Modes
• Register Indirect Mode:
• Instruction specifies a register in the CPU whose
content give the address of the operand in the memory.
• Selected register contains the address of the operand
rather than the operand itself.
• Example: AC ← AC + M[R]

Addressing Modes
• Auto-increment or Auto-decrement Mode:
• Register is incremented (after) or decremented (before) its value is used to
access memory (the execution of the instruction).
• Special mode that automatically increments or decrements the register
content.
• Add R1, -(R2) // OR R2 = R2 - d , R1 = R1 + M[R2]
• Add R1, (R2)+ // OR R1 = R1 +M[R2], R2 = R2 + d

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Addressing Modes
• Direct Addressing Mode:
• The operand resides in memory and its address is given
directly by the address field of the instruction (Effective
address).
• Single memory reference to access data.
• Effective address is equal to the address part of the
instruction.

Example: ADD R1, 4000

Addressing Modes
• Indirect Address Mode:
• Address field of the instruction gives the address where the
effective address is stored in memory.
• Two references to memory are required to fetch the
operand.

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Addressing Modes
• Displacement addressing Mode:
• In this the contents of the indexed register is added to the Address part of the
instruction, to obtain the effective address of operand.
• EA = A + (R), In this the address field holds two values, A(which is the base
value) and R(that holds the displacement), or vice versa.

Addressing Modes
• Relative Addressing Mode:
• It is a modified version of Displacement addressing mode.
• In this the contents of PC(Program Counter) is added to address part of
instruction to obtain the effective address.
• EA = A + (PC), where EA is effective address and PC is program counter.
(Relative to the address of the next instruction).
• The operand is A cells away from the current cell (the one pointed to by PC)

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Addressing Modes
• Base register addressing mode:
• It is again a version of Displacement addressing mode.
• Effective address : address part of the instruction + content of a
base register.
• This can be defined as EA = A + (R), where A is displacement
and R holds pointer to base address.

Problem and Discussion

In this figure, two-word instruction at address 201 and 201 is a load to AC instruction with
an address field equal to 500. Determine the effective address and the content of AC.
Addressing Mode:
Direct Address:
Immediate Operand:
Indirect address:
Relative address:
Indexed address: Register:
Register indirect:
Auto-increment:
Auto-decrement:

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