Multi-Core Computer Architecture

Lecture 1B
Instruction Set and Addressing Modes

John Jose
Associate Professor
Department of Computer Science & Engineering
Indian Institute of Technology Guwahati
Processor Memory Interaction
 Inside the CPU

memory
memory data
address register
register

accumulator
(work
instruction register)
register

program arithmetic
system logic unit
counter clock
FETCH & DECODE operations
5

The Von Neumann Model

MEMORY
Mem Addr Reg
Mem Data Reg

INPUT PROCESSING UNIT OUTPUT

Keyboard, Monitor,
Mouse, ALU TEMP Printer,
Disk… Disk…

CONTROL UNIT

PC or IP Inst Register
 The Instruction

❖ An instruction the most basic unit of command

❖ Instructions are words in the language of a computer
❖ Instruction Set Architecture (ISA) is the vocabulary
❖ The language of the computer can be written as
❖ Machine language: Computer-readable representation
❖ High Level language: Human-readable representation
❖ Assembly language: Human-readable representation
 Stored Program & Sequential Execution
❖ Instructions and data are stored in memory
❖ Typically the instruction length is the word length
❖ The processor fetches instructions from memory sequentially
❖ Fetches one instruction
❖ Decodes and executes the instruction
❖ Continues with the next instruction
❖ The address of the next instruction is stored in the PC.
❖ PC is incremented by length of current instruction [Eg: PC=PC+4]
 Types of Instructions
❖ Arithmetic and Logical Instructions
❖ Data Movement Instructions
❖ Control Flow Instructions
 Types of Instructions
❖ Arithmetic and Logical Instructions [Execute in ALU]
❖ integer arithmetic
❖ comparing two quantities
❖ shifting, rotating bits in a register
❖ testing, comparing, and converting bits
 Types of Instructions
❖ Data Movement Instructions [Between Memory Hierarchy]
❖ moving data from memory to the CPU registers [Load]
❖ moving data from CPU registers to memory [Store]
❖ moving data from memory to memory
❖ input and output [I/O]
 Types of Instructions
❖ Control Flow Instructions
❖ starting a program
❖ halting a program
❖ skipping to other instructions
❖ testing data to decide whether to skip over some instructions
 Example Addition Instruction
High-level code Assembly
a = b + c; add a, b, c

❖add: indicate the operation

❖b, c: source operands Variable-Register Mapping
b = R1, c = R2, a = R0
❖a: destination operand
❖a ← b + c
Assembly Vs Machine Language
ADD R0, R1, R2
1010 0000 0001 0010
 ISA vs Microarchitecture
❖ ISA Program/Application
❖ Agreed upon interface between software and ISA
hardware Microarchitecture
❖ SW/compiler assumes, HW promises Circuits
❖ Software writer needs to know ISA to write and
debug system/user programs
❖ Microarchitecture
❖ Specific implementation of an ISA
❖ Not visible to the software
❖ Microprocessor = ISA, Micro-arch, circuits
 ISA vs Microarchitecture
❖ ISA vs Micro-arch Program/Application
❖ ISA is the Interface ISA

❖ Micro-arch is the Implementation Microarchitecture

Circuits
❖ Example: Engine acceleration
❖ Accelerate pedal (interface)
❖ Internal of Engine (implementation)
❖ Add instruction vs Adder implementation
❖ Add instruction (interface)
❖ Ripple carry / carry lookahead adder (types of implementations)
 Instruction Set Architecture

❖Instruction: Opcode, Operand

❖Classification of ISA
❖Stack architecture
❖Accumulator architecture
❖Register-Memory architecture
❖Register-Register/Load Store architecture
Instruction Set Architecture
 Instruction Set Architecture

❖ A=D*(B+C)-E

Stack machine Accumulator machine Load Store machine

❖ Push D ❖ Load B ❖ Load R1, D

❖ Push B ❖ Add C ❖ Load R2, B
❖ Push C ❖ Mul D ❖ Load R3, C

❖ Add ❖ Sub E ❖ Add R4, R2, R3

❖ Mul ❖ Store A ❖ Mul R5, R1, R4

❖ Load R6,E
❖ Push E
❖ Sub R7, R5, R6
❖ Sub
❖ Store R7, A
❖ Pop A
 Addressing Modes
❖ The way in which the operand of an instruction is specified.
❖ Implicit
❖ Immediate
❖ Direct
❖ Indirect
❖ Register
❖ Register Indirect
❖ Indexed
❖ Stack
❖ Auto increment/Auto decrement
 Implicit Addressing
❖ Operand is implied, No need to specify the operand
❖ Instruction contain opcode only
❖ Eg 1: CMA (Complement Accumulator)
❖ Eg 2: SLCA (Shift Left and Count Accumulator)
 Immediate Addressing
❖ Operand is part of instruction
❖ Operand = address field Instruction

❖ Eg: ADD #5 Opcode Operand

❖ Add 5 to contents of Accumulator

❖ 5 is the operand
❖ No memory reference for fetching operand. Hence it is fast
❖ Limited range
 Direct Addressing
❖ Address field contains address of operand
❖ Effective address EA = A
❖ Eg: ADD A
❖ Add contents of memory address A to accumulator
❖ Look in memory at address A for operand
❖ Single memory reference to access data
❖ No additional calculations to work out effective address
❖ Limited address space
 Indirect Addressing
❖ Memory cell pointed to by address field contains the address of
(pointer to) the operand
❖ EA = (A)
❖ Look in A, find address (A) and look there for operand
❖ Eg: ADD (A)
❖ Add contents of cell pointed to by contents of A to accumulator
 Direct Addressing vs Indirect Addressing
Instruction Instruction
Opcode Address Opcode Address B
A
Memory Memory
❖EA = ❖EA =
A (B) Pointer to operand

Operand Operand

Direct Addressing Indirect Addressing

 Register Addressing
❖ Operand is held in register named in address field
❖ EA = R Instruction
Opcode Register Address R
❖ Limited number of registers
❖ Very small address field needed Register File

❖ Shorter instructions
❖ Faster instruction fetch
❖ No memory access Operand

❖ Very fast execution

❖ Very limited address space
 Register Indirect Addressing
❖ EA = (R)
❖ Operand is in memory cell pointed to by contents of register R
❖ Large address space (2n)
❖ One fewer memory access than indirect addressing
Register Indirect Addressing
Instruction ❖ EA = (R)
Opcode Register Address R
Memory

Registers

Pointer to Operand Operand

 Displacement Addressing
❖ EA = A + (R)
❖ Address field hold two values
❖ A = base value
❖ R = register that holds displacement
❖ or vice versa
 Displacement Addressing

❖ EA = A +
(R)
Instruction
Opcode Register R Address
A Memory

Register

Pointer to Operand + Operand

 Relative Addressing
❖ A version of displacement addressing
❖ R = Program counter, PC
❖ EA = A + (PC)
❖ Get operand from A location from current PC value [Jumps]
❖ Locality of reference
 Relative Addressing

Instruction ❖EA = A +
Opcode Address (PC)
A

Memory

+ PC

Operand
 Base-Register & Indexed Addressing

❖ Base-Register ❖ Indexed Addressing

❖ A holds displacement ❖ A = base
❖ R holds pointer to base ❖ R = displacement
address
❖ EA = A + R
❖ R may be explicit or implicit
❖ Good for accessing arrays
❖ EA = A + R
❖ R++
 Stack Addressing
❖ Operand is (implicitly) on top of stack
❖ Eg: ADD // Pop top two items from stack and add
 Auto increment and Auto decrement
❖ Operand is incremented or decremented after execution
❖ Eg 1: ADD R1, [R2]+ // R1🡨 R1+ M[R2], R2++
❖ Eg 2: ADD R1, -[R2] // R2--, R1🡨 R1+M[R2]
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