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VLSI

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VLSI

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"VLSI-optimized on-board charger integrates with BMS and smart connectivity, enhancing EV charging

management and real-time battery monitoring."

Abstract:-

India’s shift toward electric vehicles (EVs) necessitates efficient charging solutions. The proposed VLSI-
optimized on-board charger (OBC) with an integrated battery management system (BMS) focuses on energy
efficiency and system reliability. Utilizing an interleaved boost-SEPIC converter, the charger reduces current
ripple and minimizes power losses, ensuring faster and more efficient charging. The VLSI architecture enables
real-time control, optimizing the charging cycle and extending battery life. Integrated communication protocols,
including CAN and wireless interfaces, connect to a mobile app, providing users with real-time charging
updates and enhancing the efficiency of charging infrastructure utilization.

Explanation:-

We propose the development of an onboard smart charger that interfaces with a BMS to optimize the charging
process by leveraging real-time SOC and SOH data. This system dynamically adjusts charging parameters to
ensure energy efficiency while safeguarding battery longevity. The integration of VLSI is pivotal in
consolidating complex signal processing and power management functions into a compact, highly efficient
module, thereby enhancing the overall reliability and performance of the charger. Upon completion of charging,
the system sends a notification via an app to the vehicle owner, prompting timely vehicle removal to facilitate
optimal charging station utilization. This comprehensive approach not only improves the charging process but
also maximizes station throughput, contributing to a more efficient and intelligent charging infrastructure.

On-Board Charger:-

The onboard charger, integrated into an 8 kW charging station with three outlets, enables simultaneous charging
of up to three vehicles. This configuration efficiently manages power distribution, allowing all three vehicles to
be charged concurrently from a single station.

Converter:-

The proposed Boost-SEPIC Interleaved Power Factor Correction (BSI-PFC) converter improves power
conversion efficiency and reduces ripple by integrating Boost and SEPIC converters.

Structure:-

 Input Stage: AC voltage is rectified to DC vrecv_{rec}vrec by a diode bridge.

 Boost-SEPIC Interleaved Converter: This voltage is processed by an interleaved Boost-SEPIC


converter to produce a regulated DC output voltage VoV_oVo. The Boost converter includes
L1,S1,D1,L_1, S_1, D_1,L1,S1,D1, and C1C_1C1, while the SEPIC converter features
L2,S2,C2,L3,L_2, S_2, C_2, L_3,L2,S2,C2,L3, and D2D_2D2, with L2L_2L2 and L3L_3L3
magnetically coupled to minimize size.

Operation:-

 The converter functions in four modes, with S1S_1S1 and S2S_2S2 operating 180° out of phase to
reduce input current ripple.
Modes of Operation:-
1. Mode 0: S1S_1S1 and S2S_2S2 ON; C1C_1C1 discharges and C2C_2C2 charges.

2. Mode 1: S1S_1S1 and D2D_2D2 ON; C1C_1C1 and C2C_2C2 discharge into the load.

3. Mode 2: D1D_1D1 and D2D_2D2 ON; C1C_1C1 charges from L1L_1L1, and C2C_2C2 discharges
through D2D_2D2.

4. Mode 3: S2S_2S2 and D1D_1D1 ON; C1C_1C1 and C2C_2C2 charge through different paths.

This design optimizes efficiency and reduces ripple through effective interleaving and switching techniques.

Circuit Diagram:-

Flow:-

Simulation:-
Battery Management System:-

Establishing communication between a BMS and smart charger requires a systematic approach. Initially, critical
parameters such as SoC, SoH, voltage, current, and safety alerts must be defined. Protocol implementation
ensures robust MCU-BMS interfacing with accurate data framing, error detection, and message integrity.
Sophisticated data routines streamline information transmission, while error-correction mechanisms enhance
reliability. Integrated safety protocols manage real-time alerts for overheating and overvoltage, preventing
overcharging or deep discharge. Rigorous validation under diverse conditions ensures system robustness and
communication efficacy, with verification performed through advanced diagnostic tools like logic analyzers.

App Interface:-

We have developed an app that integrates with a BMS using VLSI technology to monitor battery health, SoC,
and SoH. The BMS processes and transmits real-time data, which the app receives via a wireless connection.
The app also detects when the charger is disconnected and alerts users on when to remove the vehicle, based on
the battery's charging status and health.

Application:-

As campuses, especially government ones, transition to greener practices, integrating EV charging solutions
directly on-site can significantly streamline the process for students and employees. By providing on-board
chargers within these environments, the need for external charging stations is minimized, allowing for a
seamless transition to electric vehicles (EVs). This system not only eliminates the hassle of finding nearby
charging points but also accommodates multiple users simultaneously, enhancing convenience. In office settings
where the shift towards EVs is becoming more prevalent, this approach offers a practical solution for employees
to charge their vehicles effortlessly. The integration of a smart app with these charging stations further optimizes
the experience by providing real-time notifications. Users receive alerts when it's time to remove their vehicle,
ensuring efficient utilization of charging spots. This novel solution not only supports the growing adoption of
EVs but also fosters a more sustainable and user-friendly environment, making it an innovative advancement in
campus and office infrastructure.

Benefits & Value Addition:-

 Seamless EV Transition: Integrating VLSI-optimized on-board chargers into green campuses


eliminates the need for external charging stations, simplifying the EV adoption process for students and
employees.
 Enhanced Convenience: By enabling simultaneous charging of up to three vehicles from a single 8
kW station, the system addresses the challenge of locating available charging points, providing greater
accessibility.
 Optimized Charging Efficiency: The interleaved Boost-SEPIC converter design enhances power
conversion efficiency and minimizes ripple, resulting in faster, more reliable charging while extending
battery life.
 Real-Time Monitoring: The app interface, powered by VLSI technology, offers real-time data on
battery health, SoC, and SoH. It also provides timely notifications when to remove the vehicle,
optimizing the use of charging stations and preventing overcharging.
 Sustainable Infrastructure: This approach supports the transition to greener practices by integrating
EV charging solutions directly into campus and office environments, contributing to a more sustainable
and eco-friendly infrastructure.
 Increased Utilization: The smart app and VLSI integration ensure efficient turnover of charging spots,
maximizing station throughput and enhancing overall charging infrastructure efficiency.

References:-

 “AIS-138(part 2)”, Electric Vehicle Conductive DC Charging System, January2018.


 Dhianeshwar, P . Kaur and S. Nagarajan, “ EV: Communication Infrastructure Management System”,
First International Conference on Sustainable Green Buildings and Communities (SGBC), pp. 1-6,
2016.
 “ GB/T 27930-2015”, Communication Protocols between Off -Board Conductive Charger and Battery
Management System for Electric Vehicle, December, 2015.
 CHAdeMO Association and Protocol, 2019. [Online]. Available: https://www.chademo.com/about -
us/brochures.
 M.P Archomiuk, A.Moradewicz and H.Gawinski, “ An Overview of Electric Vehicle Fast Charging
Infrastructure”, 2019 Progress in Applied Electrical Engineering (PAEE),pp. 1-6, 2019.
 K. Bao, S. Li and H. Zheng, "Battery charge and discharge control for energy management in EV and
utility integration," 2012 IEEE Power and Energy Society General Meeting, 2012, pp. 1-8, DOI:
10.1109/PESGM.2012.6344719.
 J. P. Noon, "Designing high-power factor off-line power supplies," in Proc. Unitrode Design Sem.,
2003.
 O. Garcia, J. Cobos, R. Prieto, P. Alou and J. Uceda, "Single Phase Power Factor Correction: A
Survey," IEEE Trans. Power Electron., vol. 18, no. 3, pp. 749- 755, May 2003.
 G. Liu, M. Wang, W. Zhou, Q. Wu and Y. Fu, "A Sensorless Current Balance Control Method for
Interleaved Boost Converters Based on Output Voltage Ripple," IEEE Trans. Power Electron., vol. 36,
no. 6, pp. 7138-7149, Jun. 2021.
 H. Xu, D. Chen, F. Xue and X. Li, "Optimal Design Method of Interleaved Boost PFC for Improving
Efficiency from Switching Frequency, Boost Inductor, and Output Voltage," IEEE Trans. Power
Electron., vol. 34, no. 7, pp. 6088-6107, Jul. 2019.
 Y. S. Roh, Y. J. Moon, J. Park and C. Yoo, "A TwoPhase Interleaved Power Factor Correction Boost
Converter With a Variation-Tolerant Phase Shifting Technique," IEEE Trans. Power Electron., vol. 29,
no. 2, pp. 1032-1040, Feb. 2014.

Contact Details:-

Team:-

1)Tripti Sharma (7016015766)

 E-mail- [email protected]
 Department of Electrical Engineering
 B.Tech – 3rd year(u22ee033)

2) Kamal Bisht (8791372185)-

 E-mail- [email protected]
 Department of Electrical Engineering
 M.Tech – 2ND year
 Address- Sardar Vallabhbhai National Institute of Technology, Surat – 395007
 Tripti Sharma(7016015766)
[email protected]

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