PEE FE I Student Lab Manual 1 (2) 2
PEE FE I Student Lab Manual 1 (2) 2
F.E. PRINCIPLES OF
SEM-I
DEPARTMENT OF
ELECTRONICS ENGINEERING SCIENCES
1
ENGINEERING LAB
Institutional Vision, Mission and Quality Policy
F.E._SEM I
Our Vision
To foster and permeate higher and quality education with value added engineering, technology
programs, providing all facilities in terms of technology and platforms for all round development with
societal awareness and nurture the youth with international competencies and exemplary level of
employability even under highly competitive environment so that they are innovative adaptable and
capable of handling problems faced by our country and world at large.
RAIT’s firm belief in new form of engineering education that lays equal stress on academics and
leadership building extracurricular skills has been a major contribution to the success of RAIT as one
of the most reputed institution of higher learning. The challenges faced by our country and world in the
21 Century needs a whole new range of thought and action leaders, which a conventional educational
system in engineering disciplines are ill equipped to produce. Our reputation in providing good
engineering education with additional life skills ensure that high grade and highly motivated students
join us. Our laboratories and practical sessions reflect the latest that is being followed in the Industry.
The project works and summer projects make our students adept at handling the real life problems and
be Industry ready. Our students are well placed in the Industry and their performance makes reputed
companies visit us with renewed demands and vigour.
Our Mission
The Institution is committed to mobilize the resources and equip itself with men and materials of
excellence thereby ensuring that the Institution becomes pivotal center of service to Industry, academia,
and society with the latest technology. RAIT engages different platforms such as technology enhancing
Student Technical Societies, Cultural platforms, Sports excellence centers, Entrepreneurial
Development Center and Societal Interaction Cell. To develop the college to become an autonomous
Institution & deemed university at the earliest with facilities for advanced research and development
programs on par with international standards. To invite international and reputed national Institutions
and Universities to collaborate with our institution on the issues of common interest of teaching and
learning sophistication.
RAIT’s Mission is to produce engineering and technology professionals who are innovative and
inspiring thought leaders, adept at solving problems faced by our nation and world by providing quality
education.
The Institute is working closely with all stake holders like industry, academia to foster knowledge
generation, acquisition, dissemination using best available resources to address the great challenges
being faced by our country and World. RAIT is fully dedicated to provide its students skills that make
them leaders and solution providers and are Industry ready when they graduate from the Institution.
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We at RAIT assure our main stakeholders of students 100% quality for the programmes we deliver.
This quality assurance stems from the teaching and learning processes we have at work at our campus
and the teachers who are handpicked from reputed institutions IIT/NIT/MU, etc. and they inspire the
students to be innovative in thinking and practical in approach. We have installed internal procedures
to better skills set of instructors by sending them to training courses, workshops, seminars and
conferences. We have also a full fledged course curriculum and deliveries planned in advance for a
structured semester long programme. We have well developed feedback system employers, alumni,
students and parents from to fine tune Learning and Teaching processes. These tools help us to ensure
same quality of teaching independent of any individual instructor. Each classroom is equipped with
Internet and other digital learning resources.
The effective learning process in the campus comprises a clean and stimulating classroom environment
and availability of lecture notes and digital resources prepared by instructor from the comfort of home.
In addition, student is provided with good number of assignments that would trigger his thinking
process. The testing process involves an objective test paper that would gauge the understanding of
concepts by the students. The quality assurance process also ensures that the learning process is
effective. The summer internships and project work based training ensure learning process to include
practical and industry relevant aspects. Various technical events, seminars and conferences make the
student learning complete.
OurQuality Policy
Itisourearnestendeavourtoproducehighqualityengineeringprofessionalswhoare
innovative andinspiring, thought and action leaders, competent to solve problems
facedbysociety,nationandworldatlargebystrivingtowardsveryhighstandardsin
learning,teaching andtrainingmethodologies.
3
Program Outcomes
Program Description
Outcome
PO1 Engineering knowledge: Apply the knowledge of mathematics, science,
engineering fundamentals, and an engineering specialization to the solution of
complex engineering problems.
PO2 Problem analysis: Identify, formulate, review research literature, and analyze
complex engineering problems reaching substantiated conclusions using first
principles of mathematics, natural sciences, and engineering sciences.
PO3 Design/development of solutions: Design solutions for complex engineering
problems and design system components or processes that meet the specified
needs with appropriate consideration for the public health and safety, and the
cultural, societal, and environmental considerations.
PO4 Conduct investigations of complex problems: Use research-based knowledge and
research methods including design of experiments, analysis and interpretation of
data, and synthesis of the information to provide valid conclusions.
PO5 Modern tool usage: Create, select, and apply appropriate techniques, resources,
and modern engineering and IT tools including prediction and modelling to
complex engineering activities with an understanding of the limitations.
PO6 The engineer and society: Apply reasoning informed by the contextual
knowledge to assess societal, health, safety, legal and cultural issues and the
consequent responsibilities relevant to the professional engineering practice.
PO7 Environment and sustainability: Understand the impact of the professional
engineering solutions in societal and environmental contexts, and demonstrate
the knowledge of, and need for sustainable development.
PO8 Ethics: Apply ethical principles and commit to professional ethics and
responsibilities and norms of the engineering practice.
PO9 Individual and team work: Function effectively as an individual, and as a
member or leader in diverse teams, and in multidisciplinary settings.
PO10 Communication: Communicate effectively on complex engineering activities
with the engineering community and with society at large, such as, being able to
comprehend and write effective reports and design documentation, make
effective presentations, and give and receive clear instructions.
PO11 Project management and finance: Demonstrate knowledge and understanding of
the engineering and management principles and apply these to one’s own work,
as a member and leader in a team, to manage projects and in multidisciplinary
environments.
PO12 Life-long learning: Recognize the need for, and have the preparation and ability
to engage in independent and life-long learning in the broadest context of
technological change.
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Program Specific Outcomes
Description
PSO-2 To formulate the engineering problems, obtain its solution with various tools,
analyze and interpretation of the results.
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Index
Sr. No. Contents Page No.
1. List of Experiments 7
2. Experiment Plan and Course Outcomes 8
3. Study and Evaluation Scheme 9
4. Experiment No. 1 10
5. Experiment No. 2 16
6. Experiment No. 3 19
7. Experiment No. 4 24
8. Experiment No. 5 30
9. Experiment No. 6 35
10. Experiment No. 7 40
11. Experiment No. 8 44
12. Experiment No. 9 49
13. Appendix I- Study of Various Components 55
6
List of Experiments
Sr. Module
Experiments Name
No.
1 To plot forward and reverse characteristics of PN Junction Diode. 1
To design and analyse Fixed bias and voltage divider bias for CE 2
2
amplifier using PSpice.
3 To perform CE as Amplifier, observe output and calculate voltage gain. 2
To perform drain and transfer characteristics of FET and measure trans- 3
4 conductance and drain resistance.
5 To perform drain and transfer characteristics of MOSFET using PSpice. 3
6 To analyze the performance of RC phase shift oscillator. 4
7 To Perform Inverting, Non inverting Amplifiers and virtual ground. 5
Experiment on design of linear application using op amp (e.g. adder, 5
8
differential, integrator circuits) using PSpice
To analyze the performance of Full wave and Half wave rectifier circuits 1
9
(VLab)
10 Appendix I- Study of Various Components
7
Experiment Plan & Course Outcome
Course Outcomes: Students will be able to
8
Study and Evaluation Scheme
Course
Course Name Teaching Scheme Credits Assigned
Code
Principles of Theory Practical Tutorial Theory Practical Tutorial Total
AIDSL103
Electronics
Engineering
-- 02 -- -- 01 -- 01
Lab
9
Experiment No. : 1
10
Experiment No. : 1
1. Aim: To plot forward and reverse characteristics of Semiconductor Diode
Characteristics.
3. Apparatus Required:
4. Theory:
Operation:
Applying external D.C. voltage to any electronic device is called biasing. There is no
current in the unbiased PN junction at equilibrium.
Depending upon the polarity of the D.C. voltage externally applied to diode, the
biasing is classified as Forward biasing and Reverse biasing.
The P-N junction supports uni-directional current flow. If +ve terminal of the input
supply is connected to anode (P-side) and –ve terminal of the input supply is
connected the cathode. Then diode is said to be forward biased. In this condition the
11
height of the potential barrier at the junction is lowered by an amount equal to given
forward biasing voltage. Both the holes from p-side and electrons from n-side cross
the junction simultaneously and constitute a forward current from n-side cross the
junction simultaneously and constitute a forward current (injected minority current –
due to holes crossing the junction and entering P- side of the diode). Assuming
current flowing through the diode to be very large, the diode can be approximated as
short- circuited switch.
If negative terminal of the input supply is connected to anode (p-side) and –ve
terminal of the input supply is connected to cathode (n-side) then the diode is said to
be reverse biased. In this condition an amount equal to reverse biasing voltage
increases the height of the potential barrier at the junction. Both the holes on P-side
and electrons on N-side tend to move away from the junction there by increasing the
depleted region. However the process cannot continue indefinitely, thus a small
current called reverse saturation current continues to flow in the diode. This current is
negligible; the diode can be approximated as an open circuited switch.
12
5. Circuit Diagram:
Forward Bias
Reverse Bias
6. Procedure:
7. Observation Table:
1 0.1
2 0.2
3 0.3
4 0.4
5 0.5
6 0.6
7 0.7
8 0.8
9 0.9
10 1
11 1.5
12 2
13 2.5
14 3
15 3.5
16 4
17 4.5
18 5
14
8. Plots / Graphs
1. Take a graph sheet and divide it into 4 equal parts. Mark origin at the center of the
graph sheet.
2. Now mark +ve X-axis as Vf, -ve X-axis as Vr, +ve Y-axis as If and –ve Y-axis as Ir.
3. Mark the readings tabulated for Si forward biased condition in first Quadrant and Si
reverse biased condition in third Quadrant.
Result and Discussion: In forward bias condition current will increase exponentially
after cut in voltage.
10. References:
1. Donald A. Neamen, “Semiconductor Physics and Devices” Tata MCGraw Hill, Third
Edition
2. David Bell, “Electronic Devices and Circuits”, Oxford, Fifth Edition.
3. S Slivahanan and N. Suresh Kumar, “Electronic Devices and Circuits”, McGraw Hill,
Third Edition
4. http://matse1.matse.illinois.edu/sc/d.html
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Experiment No. : 2
16
Experiment No. : 2
1. Aim: To design and analyse Fixed bias and voltage divider bias for CE amplifier using
PSpice.
2. Software Required: PSpice Student Version 9.1.
3. Theory:
4. Procedure:
17
9. Run the simulate and observe the simulated result.
18
Experiment No: 3
19
Experiment No: 3
1. Aim: To perform the CE Amplifier and calculate Voltage Gain.
3. Apparatus Required:
4. Theory:
To study and find the useful range of frequency over which the overall gain of the capacitively
coupled Common Emitter - BJT amplifier as shown in circuit diagram remains constant, this
experiment is performed to find the bandwidth of an amplifier.
The coupling & bypass capacitors used in this circuit considered to be ideal shorts and internal
transistors capacitances were considered to be ideal open. This is valid only in the mid-range
of frequency as shown in graph. As we know that capacitive reactance decreases with
increasing frequency & vice versa when the frequency is low enough the coupling & bypass
capacitors can no longer be considered as shorts because their reactance are large enough to
have a significant effect. Also, when the frequency is high enough the internal transistor
capacitances can no longer be considered as open because their reactance become small enough
to have a significant effect on the amplifier operation.
(i) Biasing circuit: The resistances R1, R2and RE form the biasing and stabilization circuit.
The biasing circuit must establish a proper operating point, otherwise a part of the negative
half-cycle of the signal may be cut-off in the output.
20
(ii) Input capacitor, C1: An electrolyte capacitor C1is used to couple the signal to the base of
the transistor. If it is not used, the signal source resistance, rs will come across R2and thus
change the bias. C1allows only ac signal to flow but isolates the signal source from R2.
(iii) Emitter bypass capacitor, CE: An Emitter bypass capacitor, CE is used parallel with RE to
provide low reactance path to the amplified ac signal. If it is not used, then ac amplified ac
signal following through RE will cause a voltage drop across it, thereby reducing the output
voltage.
(iv) Coupling capacitor, C2: The coupling capacitor, C2 couples one stage of amplification to
the next stage. If it is not used, the bias conditions of the next stage will be drastically changed
due to the shunting effect of RC. This is because RC will come in parallel with the upper
resistance R1of the biasing network of the next stage, thereby altering the biasing conditions
of the latter. In short, the coupling capacitor C2 isolates the dc of one stage from the next stage,
but allows the passage of ac signal.
5. Circuit Diagram:
Fig 1: CE Amplifier
6. Procedure:
• Connect the above component on the breadboard as shown in the ckt diagram
• Connect the voltage source of VCC = +10V from DC regulated power supply
with proper polarity.
• Using signal generator, obtain a sinusoidal signal of amplitude 10mVp-p with
the frequency of 1 KHz on the given CRO. Connect/apply this signal at the i/p
of the amplifier.
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• Using CRO, measure peak to peak voltage of i/p (Vi) and o/p (V0) from circuit.
6. Expected waveform:
7. Observation Table:
AC analysis:
1) Vi=10mV
2) Vo(at 1 Khz)=
3) AV =
4) AV(dB)=
8. Plots / Graphs
22
Fig 2: Simulation Graph from Pspice.
• Draw input and output voltage (Vs and Vo) waveforms on a simple graph paper.
9. Conclusion:
• Is the voltage gain and phase what you expected from theory of the common
emitter amplifier?
• What is the input and output impedance of your amplifier.
• Explain any frequency dependence of the voltage gain.
• Is it possible to modify the circuit to give a gain of 1000.
11. References:
23
Experiment No. : 4
24
Experiment No. : 4
1. Aim: To perform Drain and Transfer Characteristics of JFET and measure
Transconductance and Drain resistance
3. Apparatus Required:
4. Theory:
A FET is a three terminal device, having the characteristics of high input impedance
and less noise, the Gate to Source junction of the FET s always reverse biased. In
response to small applied voltage from drain to source, the n-type bar acts as sample
resistor, and the drain current increases linearly with VDS. With increase in ID the ohmic
voltage drop between the source and the channel region reverse biases the junction and
the conducting position of the channel begins to remain constant. The VDS at this instant
is called “pinch of voltage”.
If the gate to source voltage (VGS) is applied in the direction to provide additional
reverse bias, the pinch off voltage ill is decreased. In amplifier application, the FET is
always used in the region beyond the pinch-off.
𝑉𝐺𝑆 2
𝐼𝐷𝑆 = 𝐼𝐷𝑆𝑆 (1 − )
𝑉𝑃
25
5. Circuit Diagram:
6. Procedure:
A) Output characteristics:
B) Transfer Characteristics
1) For the same circuit, obtain the transfer characteristics. i.e. ID versusVGS.
2) Set a particular value of voltage for VDS, i.e. 3V. Start with a gate voltage VGS of 0
V, and measure the corresponding drain current (ID).
3) Then increase VGS in steps of 0.5 V until ID=0.
4) At each step record the drain current.
5) Plot the graph with ID versus VGS.
6) Calculate the transconductance parameter from the graph .
26
7. Observation Table:
1) Output characteristics:
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
11 11
12 12
2) Transfer characteristics:
VDS = 3V VDS = 6V
0 0
0.4 0.4
0.8 0.8
1.2 1.2
1.6 1.6
1.8 2
27
8. Plots / Graphs
1. Plot the drain characteristics by taking VDS on X-axis and ID on Y-axis at a constant
VGS.
2. Plot the transfer characteristics by taking VGS on X-axis and taking ID on Y-axis at
constant VDS.
1. Drain Resistance (rd): It is given by the relation of small change in drain to source
voltage( VDS) to the corresponding change in Drain Current( ID) for a constant gate
to source voltage ( VGS), when the JFET is operating in pinch-off region.
2. Trans Conductance (gm): Ratio of small change in drain current( ID) to the
corresponding change in gate to source voltage ( VGS) for a constant VDS.
3. Amplification factor (µ): It is given by the ratio of small change in drain to source
voltage ( VDS) to the corresponding change in gate to source voltage ( VGS) for a
constant drain current (ID).
Drain characteristics of a JFET shows ohmic region in which drain current will vary
linearly with the voltage VDS till pinch off condition, then drain current becomes
constant in the saturation region.
Transfer characteristics of a JFET shows, maximum value of ID, when VGS =0V and ID
reduces to the zero with increasing value of VGS .
11. References:
i) http://www.electronics-tutorials.ws/transistor/tran_5.html
ii) http://www.allaboutcircuits.com/textbook/semiconductors/chpt-5/junction-field-
effect-transistors-jfet/
iii) http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/fet.html
29
Experiment No. : 5
30
Experiment No. : 5
1. Aim: To plot V-I characteristics of DMOSFET using PSpice software.
6. Theory:
7. Procedure:
31
32
9. Run the simulate and observe the simulated result.
The drain to source voltage will influence the magnitude of Drain current as shown in
graph.
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9. QUIZ / Viva Questions:
i) When not in use, MOSFET pins are kept at the same potential through the use of:
vi) The overall input capacitance of a dual-gate D-MOSFET is lower because the
devices are usually connected:
10. References:
i) https://www.google.co.in/?gws_rd=ssl#q=dmosfet
ii) www.iue.tuwien.ac.at/phd/ayalew/node95.html
iii) https://definedterm.com/dmosfet
34
Experiment No: 6
Oscillator
35
Experiment No: 6
1. Aim: To determine the frequency of RC phase oscillator.
3. Apparatus Required:
4. Theory:
Working
• If we use a common emitter amplifier with a resistive collector load, there will be
180˚ phase shift between the voltages at the base and at the collector. It will also
amplify the signal.
• Feedback circuit section must produce another 180˚ shift to meet the Barkheusan
criterion.
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• Three sections of phase shift networks are used which is constituted by resistive-
capacitor combination. In that each section introduces 60˚ phase shift at resonant
frequency.
• The positive feedback from output to input will lead the circuit to operate as an
oscillator.
• Phase shift oscillator is a particular type of audio frequency oscillator. Output
signal is obtained across 1µF capacitor and ground terminal as shown in circuit
schematic.
𝟏
𝒇=
𝑹
𝟐𝝅𝑹𝑪√𝟔 + 𝟒 ( 𝑹𝑪 )
5. Circuit Diagram:
37
Expected Waveform
7. Observation Table
8. Plots/ Graphs:
• Draw the graph of output voltage (V) vs time on a simple graph paper.
9. Conclusion:
As per experiment we can conclude that sinusoidal wave of required frequency can be
generated by using CE amplifier with positive feedback.
.
10. QUIZ / Viva Questions:
• What is an oscillator?
• What is Barkhausen criterion for oscillation?
• Which feedback is used in oscillators?
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• Give the frequency of oscillation for RC-phase shift oscillator?
• Give the disadvantages of phase shift oscillator?
11. References:
• Robert L. Boylestad , DhurbesBiswas, Electronic Devices and Circuit Theory,
McGraw-Hill; 4th edition (January 18, 2011)
• Adel S. Sedra, Kenneth C. Smith and Arun N Chandorkar,” Microelectronic
Circuits Theory and Applications”, International Version, OXFORD International
Students Edition, Fifth Edition.
• David A. Bell, “Electronic Devices and Circuits”, Oxford, Fifth Edition.Donald A.
Neamen, “Electronic Circuit Analysis and Design”, TATA McGraw Hill, 2Nd
Edition.
39
Experiment No: 7
40
Experiment No: 7
1. Aim: To demonstrate the Inverting and Non-Inverting Amplifier using IC 741
3. Apparatus Required:
Equipment Details
Sr.No. Equipment Specification Quantity
1. Regulated Power Supply 0-30V, Dual DC 1
2. Cathode Ray Oscillator 30MHz, dual trace CRO 1
0-2 MHz,0-20V (Sine,
3. Function Generator 1
Triangular, Square wave form)
Component Details
4. Bread-Board 1
4. Theory:
Inverting Amplifier: - This is the most widely used application of the Op-amps. The output V
fr is fed back to the inverting input through the feedback resistor network R f – R in network
as shown in Fig.1, where R f is the feedback resistor and R in is the input resistance. The input
signal V i is applied to the inverting input terminal through R in and noninverting input terminal
of Op-amp is grounded. The output V 0 is given by Magnitude of the gain of amplifier is -and
the negative sign is an indication of a change in phase of 180 degrees between input and output
signals. An inverting amplifier uses negative feedback to invert and amplify a voltage.
Non - Inverting Amplifier:- The operational amplifier can also be used to construct a non-
inverting amplifier as shown in Fig.2. The input signal is applied to the non-inverting input
terminal of the operational amplifier, and a portion of the output signal is fed back to the
negative input terminal. The output is applied back to the inverting (-) input through the
feedback circuit (closed loop) formed by the input resistor R 1 and the feedback resistor R F .
This creates -ve feedback.
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5. Circuit Diagram:
6. Procedure:
1. Connect the above component on the breadboard as shown in the circuit diagram.
2. Connect the voltage source of biasing voltage ±12V from DC regulated power supply
with proper polarity.
3. Using signal generator obtain a sinusoidal signal of amplitude 1V p is applied to the
circuit.
4. Using CRO, measure peak to peak voltage of input (V i ) and output (V o ) from
circuit.
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7. Observation Table:
Non-Inverting Amplifier
8. Results:
10. References:
iv) http://www.electronics-tutorials.ws/transistor/tran_5.html
v) http://www.allaboutcircuits.com/textbook/semiconductors/chpt-5/junction-field-
effect-transistors-jfet/
vi) http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/fet.html
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Experiment No: 8
44
Experiment No. 8
1. Aim: To stimulate Integrator circuit using OP-AMP in Pspice.
4. Theory:
An op-amp integrator simulates mathematical integration which is basically a summing
process that determines the total area under the curve of a function i.e. the integrator does
integration of the input voltage waveform. Here the input element is resistor and the
feedback element is capacitor as shown in the figure.
Where VC (t=0) is the initial voltage on the capacitor. For proper integration, RC has to be
much greater than the time period of the input signal. It can be seen that the gain of the
integrator decreases with the increasing frequency so, the integrator circuit does not have
any high frequency problem unlike a differentiator circuit. However, at low frequencies
such as at dc, the gain becomes infinite. Hence the op-amp saturates (i.e., the capacitor is
fully charged and it behaves like an open circuit). In order to limit the gain of the integrator
at low frequencies, usually the feedback capacitor is shunted by a resistance Rf, and hence
saturation problems can be avoided. A practical integrator circuit is shown in Figure.
45
Fig.2: Practical OP-AMP integrator circuit.
5. Circuit Diagram-
Setup Analysis > Transient > Print Step: 0ns, Final Time:0.005s > Simulate
6. Procedure/ Program:
1. Design your circuit in schematics. This can be divided into following sub steps.
2. First insert all the parts without considering their values (for example, place a resistor
without considering the resistance value of it, etc.).
46
3. Make the necessary rotations for the parts, and move the parts to appropriate
locations.
4. Make all the necessary wire connections.
5. Mark the nodes you are interested in with labels.
6. Set the values for all the parts, for example, the resistance values of resistors, the
width (W) and length (L) of transistor, etc.
7. Define the SPICE model for OP-AMP.
8. Setup analysis to tell PSPICE what simulation you need (transient analysis (print
step = 0ns, final step = 0.01s), DC sweep, etc.)
9. Run the simulation.
10. Observe the simulation results (traces of signals) in Or CAD PSpice A/D Demo.
11. Refer the above experiments steps for drawing the circuit diagram.
7. Simulation Results
47
10. Viva Questions:
11. References:
1. Ramakant A. Gayakwad, “Op-Amps and Linear Integrated Circuits”, Pearson
Prentice Hall, 4thEdition.
2. D. Roy Choudhury and S. B. Jain, “Linear Integrated Circuits”, New Age
International Publishers, 4thEdition.
3. David A. Bell, “Operation Amplifiers and Linear Integrated Circuits”, Oxford
University Press, Indian Edition.
48
Experiment No: 9
49
Experiment No: 9
1. Aim:- To analyse the performance of full wave rectifier circuit using VLab
3. Link:- http://vlabs.iitkgp.ernet.in/be/exp7/index.html#
4. Circuit Diagram:-
5. Theory:
50
Full Wave Rectifier
A full-wave rectifier is exactly the same as the half-wave, but allows unidirectional
current through the load during the entire sinusoidal cycle (as opposed to only half the
cycle in the half-wave). A full-wave rectifier converts the whole of the input waveform to
one of constant polarity (positive or negative) at its output. Let us see our half wave
rectifier example and deduce the circuit.
Bridge Rectifier
51
Bridge Rectifier – Positive Half Cycle
During the positive half cycle of the supply diodes D1 and D2 conduct in series while
diodes D3 and D4 are reverse biased (ideally they can be replaced with open circuits) and
the current flows through the load as shown below.
For Positive Half Cycle D1 and D2 is Forward Biased and D3 and D4 is Reverse Biased.
VI−VO=0
⇒VO=VI
VO=VI−2×Vb
VO=VI−2×Vb−2×Ird
52
where,
VI is the input voltage,
Vb is barrier potential,
rd is diode resistance
During the negative half cycle of the supply, diodes D3 and D4 conduct in series, but
diodes D1 and D2 switch of as they are now reverse biased. The current flowing through
the load is the same direction as before.
For Negative Half Cycle D1 and D2 is Reverse Biased and D3 and D4 is Forward Biased.
VI−VO=0
⇒VO=VI
Procedure
Bridge Rectifier - Experiment
53
Measure the Vm
Vrms=Vm√2
Vdc=2×Vmπ
Ripple Factor=VacVdc Since, Vac=(V2rms−V2dc)−−−−−−−−−−√
6. Calculation
54
Appendix I
To identify the different component symbols.
1. Resistors:
Opposition to flow of currents is called resistance. The elements having resistance are
called resistors. They are of two types
1. Fixed Resistor
2. Variable Resistor
Specifications:
1. Resistance value: This is the value of the resistance expressed in ohms. Ex: 10O,
1MO
2. Tolerance: This is the variation in the value of the resistance i.e. expected from
exact indicated value usually tolerance is represented in % ex: 1%, 2%, 20%.
3. Power rating: The power rating is very important in the sense that it determines the
maximum correct that a resistor can withstand without being destroyed. The power
rating of resistor is specified as so many watts at a specific temperature such as one or
two watts at 70 degree.
2. Capacitors:
1. Disk capacitor
2. Fixed capacitor
3. Variable capacitor
3. Inductors:
Inductor value:
55
The inductance is defined as the ability of an inductor which opposes the change in
current. It is denoted by the letter “L” and its unit is Henry (H).Ex:1H.2H…
Mutual inductance:
M = K√ (L1XL2) H
Coefficient if coupling:
It is defined as the ratio of flux linkages between L1 and L2. To total flux produced
by L1. It is represented by K and its typical value is 1.
K = Lm/√ (L1XL2)
Permeability:
4. Transformers:
1. Step up transformer
2. Step down transformer
5. Diodes
P N junction diode
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A p–n junction is a boundary or interface between two types of semiconductor
material, p-type and n-type, inside a single crystal of semiconductor. It is created
bydoping, for example by ion implantation, diffusion of dopants, or
by epitaxy (growing a layer of crystal doped with one type of dopant on top of a layer
of crystal doped with another type of dopant). If two separate pieces of material were
used, this would introduce a grain boundary between the semiconductors that severely
inhibits its utility by scattering the electrons and holes.
6. Zener Diode
A Zener diode is a diode which allows current to flow in the forward direction in the
same manner as an ideal diode, but will also permit it to flow in the reverse direction
when the voltage is above a certain value known as the breakdown voltage, "zener knee
voltage", "zener voltage" or "avalanche point".
The device was named after Clarence Zener, who discovered this electrical property.
Many diodes described as "zener" diodes rely instead on avalanche breakdown as the
mechanism. Both types are used. Common applications include providing a reference
voltage for voltage regulators, or to protect other semiconductor devices from
momentary voltage pulses.
7. Transistors
The term transistor was coined by John R. Pierce as a portmanteau of the term
"transfer resistor.
The transistor is the fundamental building block of modern electronic devices, and is
ubiquitous in modern electronic systems. Following its development in the early 1950s,
the transistor revolutionized the field of electronics, and paved the way for smaller and
cheaper radios, calculators, and computers, among other things.
Transistors types
Bipolar transistors are so named because their operation involves both electrons and
holes. These two kinds of charge carriers are characteristic of the two kinds of doped
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semiconductor material. Charge flow in a BJT is due to bidirectional diffusion of charge
carriers across a junction between two regions of different charge concentrations. The
regions of a BJT are called emitter, collector, and base.
A BJT consists of three differently doped semiconductor regions, the emitter region,
the base region and the collector region. These regions are, respectively, p type, n type
and p type in a PNP transistor, and n type, p type and n type in an NPN transistor. Each
semiconductor region is connected to a terminal appropriately labeled emitter (E), base
(B) and collector (C).
The field-effect transistor (FET) is a transistor that uses an electric field to control the
shape and hence the conductivity of a channel of one type of charge carrier in a
semiconductor material.
1. Source (S), through which the carriers enter the channel. Conventionally, current
entering the channel at S is designated by IS.
2. Drain (D), through which the carriers leave the channel. Conventionally, current
entering the channel at D is designated by ID. Drain to Source voltage is VDS.
3. Gate (G), the terminal that modulates the channel conductivity. By applying
voltage to G, one can control ID.
Types of FET
1. Junction FET(JFET).
i) N-Channel JFET
ii) P-Channel JFET
MOSFET types:-
1) Depletion MOSFET
i) N-Channel MOSFET
ii) P-Channel MOSFET
2) Enhancement MOSFET
i) N-Channel MOSFET
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ii) P-Channel MOSFET
9. Symbols
Resistor symbols
Capacitor Symbols
Inductor symbols
Transformer symbols
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Switches
Diodes symbols
Transistors symbols
BJT types
FET types
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10. Breadboard
Because the solderless breadboard does not require soldering, it is reusable. This makes
it easy to use for creating temporary prototypes and experimenting with circuit design.
Older breadboard types did not have this property. A stripboard (veroboard) and similar
prototypingprinted circuit boards, which are used to build permanent soldered
prototypes or one-offs, cannot easily be reused. A variety of electronic systems may be
prototyped by using breadboards, from small analog and digital circuits to
complete central processing units(CPUs).
Series connection
Parallel connection
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Resistor color code
Capacitor Specifications
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When a capacitor is being discussed, it is referred to with certain
"specifications" or characteristics. Capacitors are usually "specified" in the following
manner-
A regulated power supply is an embedded circuit, or stand alone unit, the function of
which is to supply a stable voltage (or less often current), to a circuit or device that
must be operated within certain power supply limits. The output from the regulated
power supply may be alternating or unidirectional, but is nearly always DC (Direct
Current) .
The type of stabilization used may be restricted to ensuring that the output remains
within certain limits under various load conditions, or it may also include
compensation for variations in its own supply source. The latter is much more
common today.
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A function generator is usually a piece of electronic test equipment or software used
to generate different types of electrical waveforms over a wide range of frequencies.
Some of the most common waveforms produced by the function generator are the
sine, square, triangular and sawtooth shapes. These waveforms can be either repetitive
or single-shot (which requires an internal or external trigger source). Integrated
circuits used to generate waveforms may also be described as function generator ICs.
Although function generators cover both audio and RF frequencies, they are usually
not suitable for applications that need low distortion or stable frequency signals.
When those traits are required, other signal generators would be more appropriate.
Function generators are used in the development, test and repair of electronic
equipment. For example, they may be used as a signal source to test amplifiers or to
introduce an error signal into a control loop.
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Quantities measured
Contemporary multimeters can measure many quantities. The common ones are:
• Capacitance in Farads.
• Conductance in Siemens.
• Decibels.
• Duty cycle as a percentage.
• Frequency in Hertz.
• Inductance in Henrys.
• Temperature in degrees Celsius or Fahrenheit, with an appropriate
temperature test probe, often a thermocouple.
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14. Cathode Ray Oscilloscope
Oscilloscopes are commonly used to observe the exact wave shape of an electrical
signal. Oscilloscopes are usually calibrated so that voltage and time can be read as
well as possible by the eye. This allows the measurement of peak-to-peak voltage of a
waveform, the frequency of periodic signals, the time between pulses, the time taken
for a signal to rise to full amplitude (rise time), and relative timing of several related
signals.
Before the advent of digital electronics oscilloscopes used cathode ray tubes as their
display element (hence were commonly referred to as CROs) and linear amplifiers for
signal processing. More advanced storage oscilloscopes used special storage CRTs to
maintain a steady display of a single brief signal. CROs were later largely superseded
by digital storage oscilloscopes (DSOs) with thin panel displays, fast analog-to-digital
converters and digital signal processors. DSOs without integrated displays (sometimes
known as digitizers) are available at lower cost, and use a general-purpose digital
computer to process and display waveforms.
15. CRO
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The main parts are
FRONT PANNEL:
AC-DC: GROUND:
X-MAG: It expands length of time base from 15 times continuously and to maximum
time base to 40 ns/cm.
SQUARE: This provides square wave 2v (pP) amplitude and enables to check y
calibration of scope.
SAWTOOTH WAVE FORM: This provides saw tooth wave form output coincident
to sweep speed with an output of saw tooth wave (pp)
HORIZANTAL SECTION:
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TRIGGERING LEVEL: It selects mode of triggering.
VERNUIS: This control the fine adjustments associated with time base sweep.
OBSERVATIONS:
Amplitude = no. of vertical divisions * Volts/div.
Time period = no. of horizontal divisions * Time/div.
Frequency = 1/T
Amplitude taken on vertical section (y).
Time period taken on horizontal section(x)
Model waveforms
Measurement of Phase
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QUIZ / Viva Questions:
i) What is Electronic?
ii) What is an Amplifier?
iii) What is an Integrated Circuit?
iv) What is resistor?
v) What is Color code system?
vi) What are types of resistors?
vii) What are specifications of resistors?
viii) What is inductor?
ix) What is conductor?
x) What is a semiconductor?
xi) What is diode?
xii) What is transistor?
References:
i) http://jnec.org/Lab-manuals/ECT/SE/Electronic%20Workshop%20I.pdf
ii) http://placement.freshersworld.com/electronics-interview-
questions/33121838183
iii) http://www.careerride.com/electronics-communications-interview-
questions.aspx
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