EE537 Circuit Simulation Lab

Experiment 2

Name: Ahmad Raza Ansari

ID Number: 2024EEM1016 August 14, 2024

AIM: To study transient and AC simulation in Cadence Spectre.

1 Getting Started
1.1 Transient Analysis
Transient analysis is an analysis of time response and is a set of techniques for understanding the
dynamical behavior of a system, particularly for understanding how a system transitions between
two states. Transient analysis starts with a simple task: calculate and visualize the response of the
system in the time domain. Transient analysis generates a system of non-linear ordinary differential
equations. There is no known method to solve these equations directly. Breakpoints are set where
pre-known discontinuities are simulated, such as at VPULSE or VPWL points.

1.2 AC Analysis
AC analysis is the analysis of frequency response. An AC analysis needs a bias point equivalent
to a DC Operating Point. One thing to do to eliminate some of these differences is not to set the
DC voltage to 0 on Vpulse/VAC sources. AC analysis is crucial for designing filters (high-pass,
low-pass, band-pass) that allow specific frequency ranges to pass while blocking others.

2 Performing transient simulations

2.1 Determine the time constant of this circuit shown in Fig. 1. Verify the
analytical value obtained by hand calculation with the simulation result.
Using the Cadence Virtuoso schematic, we draw a transient circuit and give a pulse voltage to the
circuit, as shown in Figure 1.

Figure 1: Transient Circuit

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 Time Constant Calculation
τ = (Req ∗ C eq ) (1)

Ceq = 1nF
500K ∗ 200K
Req =
500K + 200K
100000K ∗ K
Req =
700K
1000K
Req =
7

τ = 0.142 msec (2)

Plot of the circuit

I obtained the output of the transient circuits on each other to visualize the change in the cir-
cuit’s output diagram as shown in Figure 2. The red line indicates the input, and the green
line indicates the output of the circuit. The simulation time constant verifies the analytical hand
calculation of the time constant.

Figure 2: Transient Circuit

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2.2 Simulate the circuit and explain the result.
Using the Cadence Virtuoso schematic, we draw a transient circuit and give a pulse voltage to the
circuit, as shown in Figure 3.

Figure 3: Transient Circuit

Initially, the capacitor starts charging when the voltage is 5V and when the voltage is 0V then
capacitor start discharging that’s the reason why we get voltage negative as shown in Figure 4.

Result of this circuit.

Figure 4: Output plot

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3 Plotting frequency response
3.1 Low pass filter with a cut-off frequency of 10 kHz.
Using the Cadence Virtuoso schematic, we draw a Low Pass Filter after some hand calculation
with cutoff frequency, giving the value of resistance and capacitor as shown in Figure 5.

Figure 5: Low pass filter

Cutoff Frequency
1
FL = (3)
2 ∗ π ∗ RC

Assume C = 1 nF
1
R=
2 ∗ π ∗ FL ∗ C

1
R=
2 ∗ π ∗ 10 ∗ 103 ∗ 1 ∗ 10−9

R = 15.9 KΩ (4)

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 Result of Low Pass Filter
The output of the Low Pass Filter is verify the 3dB frequency condition as shown in Figure 6.

Figure 6: Low Pass Filter Output

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3.2 High pass filter with a cut-off frequency of 10 Hz.
Using the Cadence Virtuoso schematic, we draw a Low Pass Filter after some hand calculation
with cutoff frequency, giving the value of resistance and capacitor as shown in Figure 7. Cutoff

Figure 7: Output plot

Frequency
1
FH = (5)
2 ∗ π ∗ RC

Assume R = 100 KΩ
1
C=
2 ∗ π ∗ FH ∗ R

1
C=
2 ∗ π ∗ 10 ∗ 100 ∗ 104

C = 159.15 nF (6)

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 Result
The output of the High Pass Filter is verify the 3dB frequency condition as shown in Figure 8.

Figure 8: High Pass Filter Output

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3.3 Band pass filter with lower cut-off frequency of 10 Hz and upper cut-off
frequency of 10 kHz. The filter should provide a gain of magnitude 20 dB
in the pass-band

Using the Cadence Virtuoso schematic, we draw a Band Pass Filter after some hand calculation
with cutoff frequency, giving the value of resistance and capacitor as shown in Figure 9.

Figure 9: Output plot

Result of Band Pass Filter

Figure 10: Band Pass Filter Output

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3.4 Band reject filer with lower cut-off frequency of 10 Hz and upper cut-off
frequency of 10 kHz. The filter should provide an attenuation of 20 dB in
the stop-band.
Using the Cadence Virtuoso schematic, we draw a Band Reject Filter after some hand calculation
with cutoff frequency, giving the value of resistance and capacitor as shown in Figure 11.

Figure 11: Band Pass Filter Output

Result of Band Reject Filter

Figure 12: Band Reject Filter Output

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4 Simulating a voltage amplifier
4.1 Inverting amplifier
Using the Cadence Virtuoso schematic, we draw an inverting amplifier as shown in Figure 13.

Figure 13: Inverting Amplifier

After Calculation

Bandwidth = 14.25 M Hz (7)

Resistance = 10.88 Ω (8)

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 Result of Inverting Amplifier

Figure 14: Output of Inverting Amplifier

4.2 Non-inverting amplifier

Using the Cadence Virtuoso schematic, we draw a non-inverting amplifier as shown in Figure 15.

Figure 15: Cicuit of inverting Amplifier

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 After Calculation

Bandwidth = 1.25 M Hz (9)

Result of Non-Inverting Amplifier

Figure 16: Output of Inverting Amplifier

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