Multiplexer - Module 6
Multiplexer - Module 6
MP3 Player
Docking Station
D0
Laptop
D1
MUX
Sound Card Y
D2
D3
MUX
Inputs Output
• MUX Types (sources) (destination)
→ 2-to-1 (1 select line)
→ 4-to-1 (2 select lines)
→ 8-to-1 (3 select lines) N
→ 16-to-1 (4 select lines) Select
Lines
3
MULTIPLEXERS (Data Selectors)
4
Multiplexers
Data
inputs
Z = A′.I0 + A.I1
Control
input
D0 S D1 D0 Y
Y
D1 2*1 mux 0 0 0 0
0 0 1 1
S 0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1
Design of 2*1 Mux Continued
• K-Map
SA 00 01 11 10
B
0 1
1 1 1 1
O = S’A + SB
Two-input multiplexer
8
Functional diagram of MUX
9
4-to-1 Multiplexer (MUX)
D0
MUX
D1
Y
D2
D3
B A
B A Y
0 0 D0
0 1 D1
1 0 D2
1 1 D3
Y= A’B’D0+A’BD1 +AB’D2+ABD3
10
Uses of Multiplexers
A B C F
0
0 0 0 0 8*1 mux
0
0 0 1 0
1
0 1 0 1
0
0 1 1 0 0 F
1 0 0 0
1
1 0 1 1 1
1 1 0 1 1
1 1 1 1
S2 S1 S0
A B C
F(x,y,z) = Sm(1, 2, 6, 7) using 4*1 mux
Function Generation using Multiplexers
• Given the following truth table use an 4*1 Mux to generate F
A B C F
0 0 0 0 0
0 0 1 0 4*1 MUX
C’
0 1 0 1
0 1 1 0 C
1 0 0 0 1
1 0 1 1
1 1 0 1 S1 S0
1 1 1 1 A B
Using an 8-to-1 multiplexer, design a logic circuit to realize the following
Boolean function
F(A,B,C) = Sm(2, 3, 5, 6, 7)
0
0 8*1 MUX
1
1
0 F
1
1
1
A B C
Implement the Half-adder circuit by using suitable
multiplexer.
Example: F(A,B,C,D) = Sm(1,3,4,11,12–15) using 8*1 mux
Exercise 1:
Implement the logic circuit function specified in the table given below by using 74LS151
8-input data selector/multiplexer.
Input Output
A2 A1 A0 Y
0 0 0 0 0
0 0 1 1 1
0 1 0 0 2
0 1 1 1 3
1 0 0 0 4
1 0 1 1 5
1 1 0 1 6
1 1 1 0 7
20
Solution :
21
LOGIC FUNCTION GENERATION USING 4 * 1 MUX
0
1
2
3
22
LOGIC FUNCTION GENERATION USING 8*1 MUX
Implement the Boolean function
F=A’B’C’D+A’B’CD+A’BC’D’+AB’CD+ABC’D’+ABC’D+ABCD’+ABCD
using a suitable MUX and 8*1 Mux.
0
1
2
3
4
5
6
23
7
Find out the Boolean expression of given block diagram
0
0
1
0
0 F
1
1
1
S2 S1 S0
A B C
Medium Scale Integration MUX
4-to-1 MUX 8-to-1 MUX 16-to-1 MUX
Select
Enable
25
Cascading multiplexers/Mux Tree
Using three 2-1 MUX to make one 4-1 MUX
The enable input is also known as controlling input
which is used to cascade two or more multiplexer ICs
to construct a multiplexer with larger number of
inputs.
S1 S0 F
0 0 I0
0 1 I1
1 0 I2
1 1 I3
Construct an 8-to-1 multiplexer using 2-to-1 multiplexers.
I0
I1
S2 S1 S0 F
0 0 0 I0 I2
I3
0 0 1 I1 2-1 F
MUX
0 1 0 I2 S E
0 1 1 I3 I4 S2 E
I5
1 0 0 I4
1 0 1 I5
1 1 0 I6
I6
1 1 1 I7 I7
Example: Construct 8-to-1 multiplexer using one 2-to-1 multiplexer and
two 4-to-1 multiplexers
S2 S1 S0 F
0 0 0 I0
0 0 1 I1
0 1 0 I2
0 1 1 I3
1 0 0 I4
1 0 1 I5
1 1 0 I6
1 1 1 I7