Fully Integrated Microstepping Motor Driver: Applications
Fully Integrated Microstepping Motor Driver: Applications
Applications
Bipolar stepper motor
Description
The L6474 device, realized in analog mixed
POWERSO36 HTSSOP28 signal technology, integrates a dual low RDS(on)
DMOS full bridge with all power switches
equipped with an accurate on-chip current
sensing circuitry suitable for non-dissipative
Features current control and overcurrent protections.
Operating voltage: 8 - 45 V Thanks to a new current control, a 1/16
microstepping is achieved through an adaptive
7.0 A output peak current (3.0 A r.m.s.) decay mode which outperforms traditional
Low RDS(on) power MOSFETs implementations.
Programmable power MOS slew rate All data registers, including those used to set
Up to 1/16 microstepping analogue values (i.e.: current control value,
current protection trip point, deadtime, etc.) are
Current control with adaptive decay
sent through a standard 5 Mbit/s SPI.
Non-dissipative current sensing
A very rich set of protections (thermal, low bus
SPI interface voltage, overcurrent) makes the L6474 device
Low quiescent and standby currents “bullet proof” as required by the most demanding
Programmable non-dissipative overcurrent motor control applications.
protection on all power MOS
Two-level overtemperature protection
Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5 Typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.1 Device power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.2 Logic I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.3 Charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.4 Microstepping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.5 Absolute position counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.6 Step sequence control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.7 Enable and disable commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.8 Internal oscillator and oscillator driver . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.8.1 Internal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.8.2 External clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.9 Overcurrent detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.10 Undervoltage lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.11 Thermal warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.12 Reset and standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.13 Programmable DMOS slew rate, deadtime and blanking-time . . . . . . . . 25
6.14 Integrated analog to digital converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.15 Internal voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8 Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
9 Programming manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
9.1 Registers and flags description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
9.1.1 ABS_POS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.1.2 EL_POS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.1.3 MARK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.1.4 TVAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.1.5 T_FAST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.1.6 TON_MIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.1.7 TOFF_MIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
9.1.8 ADC_OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
9.1.9 OCD_TH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
9.1.10 STEP_MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
9.1.11 ALARM_EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
9.1.12 CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
9.1.13 STATUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
9.2 Application commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
9.2.1 Command management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9.2.2 NOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
9.2.3 SetParam (PARAM, VALUE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
9.2.4 GetParam (PARAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
9.2.5 Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
9.2.6 Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
9.2.7 GetStatus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
10 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
10.1 HTSSOP28 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
10.2 POWERSO36 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
List of tables
List of figures
1 Block diagram
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2 Electrical data
HTSSOP28(1) 22
RthJA Thermal resistance junction-ambient °C/W
POWERSO36(2) 12
1. HTSSOP28 mounted on EVAL6474H Rev 1.0 board: four-layer FR4 PCB with a dissipating copper surface
of about 40 cm2 on each layer and 15 via holes below the IC.
2. POWERSO36 mounted on EVAL6474PD Rev 1.0 board: four-layer FR4 PCB with a dissipating copper
surface of about 40 cm2 on each layer and 22 via holes below the IC.
3 Electrical characteristics
General
Charge pump
Source-drain diodes
fosc,i Internal oscillator frequency Tj = 25 °C, VREG = 3.3 V -3% 16 +3% MHz
fosc,e Programmable external oscillator frequency 8 32 MHz
Internal oscillator 3.3 V
VOSCOUTH OSCOUT clock source high level voltage VREG externally supplied; 2.4 V
IOSCOUT = 4 mA
Internal oscillator 3.3 V
VOSCOUTL OSCOUT clock source low level voltage VREG externally supplied; 0.3 V
IOSCOUT = 4 mA
trOSCOUT
OSCOUT clock source rise and fall time Internal oscillator 20 ns
tfOSCOUT
textosc Internal to external oscillator switching delay 3 ms
tintosc External to internal oscillator switching delay 1.5 µs
SPI
Current control
Overcurrent protection
Standby
4 Pin connection
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Pin list
Table 6. Pin description
Number
Name Type Function
POWERSO HTSSOP
1 27
PGND Ground Power ground pin
19 13
2, 3 1 OUT1A Power output Full bridge A output 1
35, 36 28 OUT2A Power output Full bridge A output 2
17, 18 14 OUT1B Power output Full bridge B output 1
20, 21 15 OUT2B Power output Full bridge B output 2
12 9 AGND Ground Analog ground
7 4 DIR Logical input Direction input
28 21 DGND Ground Digital ground
29 22 SYNC Open drain output Synchronization signal.
25 18 SDO Logic output Data output pin for serial interface
27 20 SDI Logic input Data input pin for serial interface
26 19 CK Logic input Serial interface clock
30 23 CS Logic input Chip select input pin for serial interface
5 Typical applications
CVS 220 nF
CVSPOL 100 µF
CREG 100 nF
CREGPOL 47 µF
CDD 100 nF
CDDPOL 10 µF
D1 Charge pump diodes
CBOOT 220 nF
CFLY 10 nF
RPU 39 k
RSW 100
CSW 10 nF
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6 Functional description
6.4 Microstepping
The driver is able to divide the single step into up to 16 microsteps. Stepping mode can be
programmed by STEP_SEL parameter in STEP_MODE register (see Table 19 on page 38).
Step mode can only be changed when bridges are disabled. Every time the step mode is
changed, the electrical position (i.e. the point of microstepping sinewave that is generated)
is reset to the first microstep and the absolute position counter value (see Section 6.5)
becomes meaningless.
8 MHz 25 pF (ESRmax = 80 )
16 MHz 18 pF (ESRmax = 50 )
24 MHz 15 pF (ESRmax = 40 )
32 MHz 10 pF (ESRmax = 40 )
1. First harmonic resonance frequency.
2. Lower ESR value allows driving greater load capacitors.
If a direct clock source is used, it must be connected to the OSCIN pin and the OSCOUT pin
supplies the inverted OSCIN signal (see Figure 7).
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The L6474 performs a peak current control technique described in detail in Section 7.1.
Furthermore, the L6474 automatically selects the best decay mode in order to follow the
current profile.
Current control algorithm parameters can be programmed by T_FAST, TON_MIN,
TOFF_MIN and CONFIG registers (see Section 9.1.5 on page 35, Section 9.1.6 on page
35, Section 9.1.7 on page 36 and Section 9.1.12 on page 39 for details).
The current amplitude can be set through the TVAL register (see Section 9.1.4 on page 34).
The output current amplitude can also be regulated by ADCIN voltage value (see
Section 6.14).
Each bridge is driven by an independent control system that shares with the other bridge the
control parameters only.
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When two or more fast decays are performed with present target current, the control system
adds a fast decay at the end of every OFF time, keeping the OFF state duration constant
(tOFF is split into tOFF,SLOW and tOFF,FAST). When the current threshold is increased by
a microstep change (rising step), the system returns to normal decay mode (slow decay
only) and the tFAST value is halved.
Reaching the current sinewave zero crossing causes the current control system to return to
the reset state.
Figure 11. Adaptive decay - switch from normal to slow + fast decay mode and vice versa
nd
fast decay
1st fast decay switch to fast + slow decay mode
2
reference current
Time
tOFF tOFF
tFAST
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Time
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8 Serial interface
The integrated 8-bit serial peripheral interface (SPI) is used for a synchronous serial
communication between the host microprocessor (always master) and the L6474 (always
slave).
The SPI uses chip select (CS), serial clock (CK), serial data input (SDI) and serial data
output (SDO) pins. When CS is high, the device is unselected and the SDO line is inactive
(high-impedance).
The communication starts when CS is forced low. The CK line is used for synchronization of
data communication.
All commands and data bytes are shifted into the device through the SDI input, most
significant bit first. The SDI is sampled on the rising edges of the CK.
All output data bytes are shifted out of the device through the SDO output, most significant
bit first. The SDO is latched on the falling edges of the CK. When a return value from the
device is not available, an all zero byte is sent.
After each byte transmission, the CS input must be raised and be kept high for at least tdisCS
in order to allow the device to decode the received command and put the return value into
the shift register.
All timing requirements are shown in Figure 13 (see respective Section 3: Electrical
characteristics on page 10 for values).
Multiple devices can be connected in a daisy chain configuration, as shown in Figure 14.
9 Programming manual
9.1.1 ABS_POS
The ABS_POS register contains the current motor absolute position in agreement to the
selected step mode; the stored value unit is equal to the selected step mode (full, half,
quarter, etc.). The value is in 2's complement format and it ranges from -221 to +221-1.
At power-on the register is initialized to “0” (HOME position).
9.1.2 EL_POS
The EL_POS register contains the current electrical position of the motor. The two MSbits
indicate the current step and the other bits indicate the current microstep (expressed in
step/128) within the step.
STEP MICROSTEP
When the EL_POS register is written by the user the new electrical position is instantly
imposed. When the EL_POS register is written its value must be masked in order to match
with the step mode selected in the STEP_MODE register in order to avoid a wrong
microstep value generation (see Section 9.1.10 on page 38); otherwise the resulting
microstep sequence is incorrect.
Any attempt to write the register when the outputs are enabled causes the command to be
ignored and the NOTPERF_CMD flag to rise (see Section 9.1.13 on page 41).
9.1.3 MARK
The MARK register contains an absolute position called MARK, according to the selected
step mode; the stored value unit is equal to the selected step mode (full, half, quarter, etc.).
It is in 2's complement format and it ranges from -221 to +221-1.
9.1.4 TVAL
The TVAL register contains the current value that is assigned to the torque regulation DAC.
The available range is from 31.25 mA to 4 A with a resolution of 31.25 mA, as shown in
Table 2 on page 8.
0 0 0 0 0 0 0 31.25 mA
0 0 0 0 0 0 1 62.5 mA
…
…
1 1 1 1 1 1 0 3.969 A
1 1 1 1 1 1 1 4A
9.1.5 T_FAST
The T_FAST register contains the maximum fast decay time (TOFF_FAST) and the
maximum fall step time (FALL_STEP) used by the current control system (see Section 7.2
on page 28 and Section 7.3 on page 29 for details):
0 0 0 0 2 µs
0 0 0 1 4 µs
…
1 1 1 0 28 µs
1 1 1 1 32 µs
Any attempt to write to the register when the outputs are enabled causes the command to
be ignored and the NOTPERF_CMD to rise (see Section 9.1.13 on page 41).
9.1.6 TON_MIN
The TON_MIN register contains the minimum ON time value used by the current control
system (see Section 7.2).
The available range for both parameters is from 0.5 µs to 64 µs.
0 0 0 0 0 0 0 0.5 µs
0 0 0 0 0 0 1 1 µs
…
…
1 1 1 1 1 1 0 63.5 µs
1 1 1 1 1 1 1 64 µs
Any attempt to write to the register when the outputs are enabled causes the command to
be ignored and the NOTPERF_CMD to rise (see Section 9.1.13 on page 41).
9.1.7 TOFF_MIN
The TOFF_MIN register contains the minimum OFF time value used by the current control
system (see Section 7.1 on page 27 for details).This parameter imposes the OFF time of the
current control system only if its value is greater than the TSW one.
The available range for both parameters is from 0.5 µs to 64 µs.
0 0 0 0 0 0 0 0.5 µs
0 0 0 0 0 0 1 1 µs
…
…
1 1 1 1 1 1 0 63.5 µs
1 1 1 1 1 1 1 64 µs
Any attempt to write to the register when the outputs are enabled causes the command to
be ignored and the NOTPERF_CMD to rise (see Section 9.1.13).
9.1.8 ADC_OUT
The ADC_OUT register contains the result of the analog to digital conversion of the ADCIN
pin voltage.
Any attempt to write to the register causes the command to be ignored and the
NOTPERF_CMD flag to rise (see Section 9.1.13 on page 41).
0 0 0 0 0 0 125 mA
1/32 0 0 0 0 1 250 mA
…
…
30/32 1 1 1 1 0 3.875 A
31/32 1 1 1 1 1 4A
9.1.9 OCD_TH
The OCD_TH register contains the overcurrent threshold value (see Section 6.9 on page 23
for details). The available range is from 375 mA to 6 A, steps of 375 mA as shown in
Table 17.
0 0 0 0 375 mA
0 0 0 1 750 mA
…
1 1 1 0 5.625 A
1 1 1 1 6A
9.1.10 STEP_MODE
The STEP_MODE register has the following structure:
0 0 0 Full step
0 0 1 Half step
0 1 0 1/4 microstep
0 1 1 1/8 microstep
1 X X 1/16 microstep
Every time the step mode is changed, the electrical position (i.e. the point of microstepping
sinewave that is generated) is reset to the first microstep.
Any attempt to write the register when the outputs are enabled causes the command to be
ignored and the NOTPERF_CMD flag to rise (see Section 9.1.13 on page 41).
The SYNC output provides a synchronization signal according to SYNC_SEL parameter.
The synchronization signal is obtained starting from electrical position information (EL_POS
register) according to Table 10 on page 34:
0 0 0 EL_POS [7]
0 0 1 EL_POS [6]
0 1 0 EL_POS [5]
0 1 1 EL_POS [4]
1 0 0 EL_POS [3]
1 0 1 UNUSED(1)
1 1 0 UNUSED(1)
1 1 1 UNUSED(1)
1. When this value is selected the BUSY output is forced low.
9.1.11 ALARM_EN
The ALARM_EN register allows to select which alarm signals are used to generate the
FLAG output. If the respective bit of the ALARM_EN register is set high, the alarm condition
forces the FLAG pin output down.
0 (LSB) Overcurrent
1 Thermal shutdown
2 Thermal warning
3 Undervoltage
4 RESERVED
5 RESERVED
6 Switch turn-on event
7 (MSB) Wrong or not performable command
9.1.12 CONFIG
The CONFIG register has the following structure:
0 TOFF POW_SR
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
OC_SD RESERVED EN_TQREG 0 EXT_CLK OSC_SEL
The OSC_SEL and EXT_CLK bits set the system clock source:
0 0 0 0
0 0 0 1
Internal oscillator: 16 MHz Unused Unused
0 0 1 0
0 0 1 1
Supplies a 2 MHz
1 0 0 0 Internal oscillator: 16 MHz Unused
clock
Supplies a 4 MHz
1 0 0 1 Internal oscillator: 16 MHz Unused
clock
Supplies a 8 MHz
1 0 1 0 Internal oscillator: 16 MHz Unused
clock
Supplies a 16 MHz
1 0 1 1 Internal oscillator: 16 MHz Unused
clock
Crystal/resonator Crystal/resonator
0 1 0 0 External crystal or resonator: 8 MHz
driving driving
Crystal/resonator Crystal/resonator
0 1 0 1 External crystal or resonator: 16 MHz
driving driving
Crystal/resonator Crystal/resonator
0 1 1 0 External crystal or resonator: 24 MHz
driving driving
Crystal/resonator Crystal/resonator
0 1 1 1 External crystal or resonator: 32 MHz
driving driving
Ext. clock source: 8 MHz Supplies inverted
1 1 0 0 Clock source
(Crystal/resonator driver disabled) OSCIN signal
Ext. clock source: 16 MHz Supplies inverted
1 1 0 1 Clock source
(Crystal/resonator driver disabled) OSCIN signal
Ext. clock source: 24 MHz Supplies inverted
1 1 1 0 Clock source
(Crystal/resonator driver disabled) OSCIN signal
Ext. clock source: 32 MHz Supplies inverted
1 1 1 1 Clock source
(Crystal/resonator driver disabled) OSCIN signal
The OC_SD bit sets whether or not an overcurrent event causes the bridges to turn off; the
OCD flag in the status register is forced low anyway:
The POW_SR bits set the slew rate value of power bridge output:
0 0 320
0 1 75
1 0 110
1 1 260
1. See SRout_r and SRout_f parameters in Table 5: Electrical characteristics on page 10 for details.
The TQREG bit sets if the torque regulation (see Section 7.4 on page 30) is performed
through the ADCIN voltage (external) or TVAL register (internal):
0 Internal registers
1 ADC input
The TOFF time is used by current control system. If its value is lower than the TOFF_MIN
one, the OFF time is equal to TOFF_MIN.
0 0 0 0 0 4 µs
0 0 0 0 1 4 µs
0 0 0 1 0 8 µs
…
1 1 1 1 1 124 µs
Any attempt to write the CONFIG register when the outputs are enabled causes the
command to be ignored and the NOTPERF_CMD flag to rise (see Section 9.1.13).
9.1.13 STATUS
When HiZ flag is high, it indicates that the bridges are in high impedance state. Enable
command makes the device exit from High Z state unless error flags forcing a High Z state
are active.
The UVLO flag is active low and is set by an undervoltage lockout or reset events (power-up
included). The TH_WRN, TH_SD, OCD flags are active low and indicate, respectively,
thermal warning, thermal shutdown and overcurrent detection events.
The NOTPERF_CMD and WRONG_CMD flags are active high and indicate, respectively,
that the command received by SPI can't be performed or does not exist at all.
The UVLO, TH_WRN, TH_SD, OCD, NOTPERF_CMD and WRONG_CMD flags are
latched: when the respective conditions make them active (low or high), they remain in that
state until a GetStatus command is sent to the IC.
The DIR bit indicates the current motor direction:
1 Forward
0 Reverse
Any attempt to write to the register causes the command to be ignored and the
NOTPERF_CMD to rise (see Section 9.1.13).
By default, the device returns an all zeroes response for any received byte, the only
exceptions are GetParam and GetStatus commands. When one of these commands is
received, the following response bytes represent the related register value (see Figure 16).
Response length can vary from 1 to 3 bytes.
When a byte that does not correspond to a command is sent to the IC it is ignored and the
WRONG_CMD flag in the STATUS register is raised (see Section 9.1.13).
9.2.2 NOP
0 0 0 0 0 0 0 0 From host
Nothing is performed.
The SetParam command sets the PARAM register value equal to VALUE; PARAM is the
respective register address listed in Table 16 on page 37.
The command should be followed by the new register VALUE (most significant byte first).
The number of bytes composing the VALUE argument depends on the length of the target
register (see Table 16).
Some registers cannot be written (see Table 16); any attempt to write one of those registers
causes the command to be ignored and the WRONG_CMD flag to rise at the end of
command byte, the same is true when an unknown command code is sent (see
Section 9.1.13 on page 41).
Some registers can only be written in particular conditions (see Table 16); any attempt to
write one of those registers when the conditions are not satisfied causes the command to be
ignored and the NOTPERF_CMD flag to rise at the end of last argument byte (see
Section 9.1.13).
Any attempt to set an inexistent register (wrong address value) causes the command to be
ignored and the WRONG_CMD flag to rise at the end of command byte, the same is true
when an unknown command code is sent.
This command reads the current PARAM register value; PARAM is the respective register
address listed in Table 16 on page 37.
The command response is the current value of the register (most significant byte first). The
number of bytes composing the command response depends on the length of the target
register (see Table 16).
The returned value is the register one at the moment of GetParam command decoding. If
register values change after this moment the response is not accordingly updated.
All registers can be read anytime.
Any attempt to read an inexistent register (wrong address value) causes the command to be
ignored and the WRONG_CMD flag to rise at the end of command byte, the same is true
when an unknown command code is sent.
9.2.5 Enable
1 0 1 1 1 0 0 0 From host
9.2.6 Disable
1 0 1 0 1 0 0 0 From host
The Disable command immediately disables the power bridges (high-impedance state) and
raises the HiZ flag.
This command can be given anytime and is immediately executed.
9.2.7 GetStatus
1 1 0 1 0 0 0 0 From host
STATUS MSByte To host
STATUS LSByte To host
The GetStatus command returns the Status register value. The GetStatus command resets
the STATUS register warning flags. The command forces the system to exit from any error
state. The GetStatus command DOES NOT reset the HiZ flag.
10 Package information
A 1.2
A1 0.15
A2 0.8 1.0 1.05
b 0.19 0.3
c 0.09 0.2
(1)
D 9.6 9.7 9.8
D1 5.5
E 6.2 6.4 6.6
(2)
E1 4.3 4.4 4.5
E2 2.8
e 0.65
L 0.45 0.6 0.75
L1 1.0
K 0° 8°
aaa 0.1
1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
do not exceed 0.15 mm per side.
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions do not exceed
0.25 mm per side.
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A 3.60 0.1417
a1 0.10 0.30 0.003 0.0118
a2 3.30 0.1299
a3 0 0.10 0 0.0039
b 0.22 0.38 0.008 0.0150
c 0.23 0.32 0.009 0.0126
D 15.80 16.00 0.622 0.6299
D1 9.40 9.80 0.370 0.3858
E 13.90 14.50 0.547 0.5709
E1 10.90 11.10 0.429 0.4370
E2 2.90 0.1142
E3 5.8 6.2 0.228 0.2441
e 0.65 0.025
e3 11.05 0.435
G 0 0.10 0.000 0.0039
H 15.50 15.90 0.610 0.6260
h 1.10 0.0433
L 0.80 1.10 0.031 0.0433
N 10° 10°
S 0° 8° 0° 8°
11 Revision history
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