Program Control Microinstructions:

These microinstructions control the flow of instructions in a program.

• Branch Instructions: Change the sequence of instructions based on a condition.
• Jump Instructions: Unconditionally transfer control to a different part of the program.
• Subroutine Call and Return Instructions: Used for invoking and returning from
subroutines.
 CHAPTER 2 SECTION A
COMPUTER INSTRUCTIONS :
1. Memory Reference Instructions:
Memory reference instructions involve accessing data from or storing data into memory.
These instructions are crucial for manipulating variables, arrays, and other data structures.
In assembly language, memory reference instructions typically involve specifying memory
addresses.

2. Register Reference Instructions:

Register reference instructions involve operations that directly manipulate data stored in
registers. These instructions are often more efficient than memory reference instructions
because registers are faster to access than main memory.

3. Input/Output Instructions:
Input and output instructions are needed for transferring information to and from AC
register, for checking the flag bits, and for controlling the interrupt facility. Input–output
instructions have an operation code 1111 and are recogonized by the control when D7
1
and I
1. The remaining bits of the instruction specify the particular operation.
Input and output instructions are needed for transferring information to and from AC
register, for checking the flag bits, and for controlling the interrupt facility. Input–output
instructions have an operation code 1111 and are recogonized by the control when D7
1
and I
1. The remaining bits of the instruction specify the particular operation.
INTERRUPT
CHAPTER 3 SEC A
1. Programming Language:
High-Level Languages:
High-level programming languages are designed to be more abstract and user-friendly. They
provide a higher level of abstraction from the hardware, allowing programmers to focus on
solving problems without dealing with the intricacies of the underlying architecture. High-
level languages are generally portable across different platforms, meaning that the same
code can run on different machines with minimal or no modification.
Examples of High-Level Languages:
• Python: Known for its readability and ease of use.
• Java: Designed for platform independence with its "write once, run anywhere"
philosophy.
• C++: A powerful and versatile language often used for systems programming and
game development.
Low-Level Languages:
Low-level programming languages are closer to the hardware and provide more direct
control over the computer's architecture. They are specific to a particular computer
architecture and are not easily portable. Low-level languages include assembly language
and machine code.

2. Assembly Language:
Assembly language is a low-level programming language that is specific to a particular
computer architecture. It uses mnemonics (short, human-readable symbols) to represent
the machine instructions of a computer's CPU. Each assembly language instruction
corresponds to a single machine instruction. Assembly language is considered a bridge
between high-level languages and machine code.
Characteristics of Assembly Language:
• Symbolic Representation: Mnemonics represent machine instructions.
• One-to-One Mapping: Each assembly instruction typically corresponds to one
machine instruction.
• Direct Access to Hardware: Provides direct control over the hardware resources.
Example of Assembly Language (x86):
MOV AX, 5 ; Move the value 5 into register AX
ADD BX, AX ; Add the value in register AX to the value in register BX
3. The Assembler:
An assembler is a software tool that translates assembly language code into machine code.
It is the second step in the compilation process, following the creation of the source code.
The assembler reads the assembly code, translates each instruction into its machine code
equivalent, and produces an object file. The object file contains the binary representation of
the program and may include information about memory addresses and symbols.
Tasks Performed by the Assembler:
• Parsing: Breaks down the assembly code into individual instructions.
• Translation: Converts assembly instructions into machine code.
• Address Resolution: Resolves memory addresses and symbolic names.

4. Program Loops:
Conditional Loops (While and Do-While):
Conditional loops execute a block of code as long as a specified condition is true. The
condition is checked before entering the loop, and if it evaluates to true, the loop body is
executed.
Example (x86 Assembly - While Loop):
WHILE: CMP CX, 0 ; Compare CX to 0
JLE END_WHILE ; Jump to END_WHILE if CX is less than or equal to 0
; Loop body
...
DEC CX ; Decrement CX
JMP WHILE ; Jump back to WHILE
END_WHILE:

Counting Loops (For and Repeat-Until):

Counting loops execute a block of code a specific number of times. The loop control variable
is initialized, and the loop body is executed until a specified condition is met.
Example (x86 Assembly - For Loop):
FOR: MOV CX, 10 ; Initialize CX with loop count
; Loop body
...
DEC CX ; Decrement CX
JNZ FOR ; Jump back to FOR if CX is not zero

4. Programming Arithmetic and Logic Operations:

Arithmetic include the chapter 2 of section b i.e multiply flowchar, divide flowchart,
addition and subtraction so study these from there. Logical and shift instructions have been
studied earlier so repeat the same here also
 CHAPTER 4 SECTION A
PROCESSOR BUS ORGANISATION
The bus organization of the 8085 microprocessor is the way in which the microprocessor
communicates with other devices in a computer system. The 8085 microprocessor has a
16-bit address bus, an 8-bit data bus, and various control signals that are used to
manage data transfer and other operations.

There are three types of buses.

Address bus –
The address bus is a unidirectional bus that is used to carry the memory or I/O device
address to which the data is to be transferred. The address bus in the 8085
microprocessor is 16-bit wide.
It is a group of conducting wires which carries address only.Address bus is
unidirectional because data flow in one direction, from microprocessor to memory or
from microprocessor to Input/output devices (That is, Out of Microprocessor). Length of
Address Bus of 8085 microprocessor is 16 Bit (That is, Four Hexadecimal Digits),
ranging from 0000 H to FFFF H, (H denotes Hexadecimal). The microprocessor 8085
can transfer maximum 16 bit address which means it can address 65, 536 different
memory location. The Length of the address bus determines the amount of memory a
system can address.Such as a system with a 32-bit address bus can address 2^32
memory locations.If each memory location holds one byte, the addressable memory
space is 4 GB.However, the actual amount of memory that can be accessed is usually
much less than this theoretical limit due to chipset and motherboard limitations.

Data bus –
The data bus is an 8-bit bidirectional bus that is used to transfer data between the
microprocessor and other components such as memory and I/O devices. It is used to
carry data to or from the memory or input/output devices.
It is a group of conducting wires which carries Data only.Data bus is bidirectional
because data flow in both directions, from microprocessor to memory or Input/Output
devices and from memory or Input/Output devices to microprocessor. Length of Data
Bus of 8085 microprocessor is 8 Bit (That is, two Hexadecimal Digits), ranging from 00
H to FF H. (H denotes Hexadecimal). When it is write operation, the processor will put
the data (to be written) on the data bus, when it is read operation, the memory
controller will get the data from specific memory block and put it into the data bus. The
width of the data bus is directly related to the largest number that the bus can carry,
such as an 8 bit bus can represent 2 to the power of 8 unique values, this equates to the
number 0 to 255. A 16 bit bus can carry 0 to 65535.
Control bus –
The control bus is a bidirectional bus that is used to carry control signals between the
microprocessor and other components such as memory and I/O devices. It is used to
transmit commands to the memory or I/O devices for performing specific operations.
It is a group of conducting wires, which is used to generate timing and control signals to
control all the associated peripherals, microprocessor uses control bus to process data,
that is what to do with selected memory location. Some control signals are:
Memory read
Memory write
1. I/O read
2. I/O Write
3. Opcode fetch

Uses of Bus organization in 8085 microprocessor ?

There are several reasons why bus organization is used in the 8085 microprocessor:
1. Memory access: The bus organization is used for accessing memory by
transferring the address of the memory location through the address bus and
the data to be stored or retrieved through the data bus. This enables the
microprocessor to read and write data to and from memory, which is essential
for executing instructions and storing data.
2. I/O operations: The bus organization is used for performing input/output (I/O)
operations by transferring the input/output device address through the address
bus and the data to be input or output through the data bus. This enables the
microprocessor to communicate with peripheral devices such as keyboards,
displays, and sensors.
 3. Interrupt handling: The bus organization is used for interrupt handling, where
the microprocessor uses the address bus to fetch the interrupt vector and the
data bus to fetch the interrupt service routine. This enables the microprocessor
to respond to external events and perform time-critical operations.
4. DMA operations: The bus organization is used for performing Direct Memory
Access (DMA) operations, where the data transfer between the memory and
I/O devices takes place without the intervention of the microprocessor. This
enables high-speed data transfer between devices and reduces the load on the
microprocessor.
5. Control signal transfer: The bus organization is used for transferring control
signals between the microprocessor and other components of the system. This
enables the microprocessor to control the operation of devices and coordinate
the execution of instructions.

Advantages:

Flexibility: The bus organization used in the 8085 microprocessor allows it to

communicate with a wide range of devices. This flexibility makes it well-suited for use in
a variety of computer systems, including embedded systems, personal computers, and
other devices.
Scalability: The bus organization used in the 8085 microprocessor is scalable, which
means that it can be used in systems of varying sizes and complexity. This scalability
makes it well-suited for use in systems that require a wide range of performance levels.
Low Cost: The bus organization used in the 8085 microprocessor is relatively simple
and inexpensive to implement. This makes it an attractive option for low-cost,
embedded applications.

Disadvantages:

Limited Bandwidth: The bus organization used in the 8085 microprocessor has a
limited bandwidth, which can limit the performance of the processor in high-
performance applications.
Latency: The bus organization can introduce latency, which is the delay between the
time a command is issued and the time the response is received. This latency can be a
problem in real-time applications that require immediate responses.
Data Integrity: The bus organization used in the 8085 microprocessor is vulnerable to
data corruption due to electromagnetic interference and other sources of noise. This can
lead to errors in data transmission and processing.
Complexity: The bus organization used in the 8085 microprocessor can be complex to
implement and troubleshoot, which can increase the cost and time required to develop
and maintain computer systems.
 Characteristic Stack Organization General Register Organization
Data Storage Operates as a Last-In-First-Out (LIFO) Holds data in a set of general-purpose
structure. registers (GPRs).
Access Accessed using push (for storing) and pop (for Direct access to registers by their
Mechanism retrieving) operations. designated names.
Usage Commonly used for function calls, local Used for temporary storage, arithmetic
variables, and managing program flow. operations, and holding intermediate
values.
Special May have a stack pointer (SP) register to keep May include program counter (PC),
Registers track of the top of the stack. instruction pointer (IP), and other special-
purpose registers.
Data Data is pushed onto the stack or popped off Data movement involves direct transfer
Movement the stack. between registers.
Efficiency Efficient for managing function calls and local Efficient for quick access and
variables but may involve more instructions manipulation of data without additional
for accessing data. push/pop operations.
Usage Scenario Well-suited for managing program flow, Ideal for frequently accessed data and
subroutine calls, and local variables. temporary storage during computation.

Memory Usage Typically uses a portion of the memory Registers are part of the CPU and directly
designated as the stack. accessible without accessing external
memory.
Example PUSH AX (Push value in AX onto the stack) <br> MOV AX, BX (Move value from BX to AX)
(Assembly) POP BX (Pop value from the stack into BX) <br> ADD CX, DX (Add values in CX and
DX)
INSTRUCTION FORMATS
A computer will usually have a variety of instruction code formats. It is the function of the
control unit within the CPU to interpret each instruction code and provide the necessary
control functions needed to process the instruction. The format of an instruction is usually
depicted in a rectangular box symbolizing the bits of the instruction as they appear in
memory words or in a control register. The bits of the instruction are divided into groups
called fields. The most common fields found in instruction formats are:
1. An operation code field that specifies the operation to be performed such as add,
subtract, complement, and shift.
2. An address field that designates a memory address or a processor register.
3. A mode field that specifies the way the operand or the effective address is
determined.
Other special fields are sometimes employed under certain circumstances, as for example a
field that gives the number of shifts in a shift-type instruction.
Computers may have instructions of several different lengths containing varying number of
addresses. The number of address fields in the instruction format of a computer depends
on the internal organization of its registers. Most computers fall into one of three types of
CPU organizations:
1. Single accumulator organization (1 address format)
2. General register organization (2 or 3 address format)
3. Stack organization (0 address format)
• Register Stack organization
• Memory Stack organization
ADDRESSING MODES
https://unacademy.com/content/nta-ugc/study-material/computer-science/addressing-
modes/
https://www.geeksforgeeks.org/addressing-modes/

DATA TRANSFER, MANIPULATION AND PROGRAM CONTROL INSTRUCTIONS ALREADY

STUDIED ABOVE

PARALLEL PROCESSING

Parallel processing can be described as a class of techniques which enables the system
to achieve simultaneous data-processing tasks to increase the computational speed
of a computer system.

A parallel processing system can carry out simultaneous data-processing to achieve

faster execution time. For instance, while an instruction is being processed in the ALU
component of the CPU, the next instruction can be read from memory.

The primary purpose of parallel processing is to enhance the computer processing

capability and increase its throughput, i.e. the amount of processing that can be
accomplished during a given interval of time.

A parallel processing system can be achieved by having a multiplicity of functional

units that perform identical or different operations simultaneously. The data can be
distributed among various multiple functional units.

The following diagram shows one possible way of separating the execution unit into
eight functional units operating in parallel.

The operation performed in each functional unit is indicated in each block if the
diagram:
 o The adder and integer multiplier performs the arithmetic operation with integer
numbers.
o The floating-point operations are separated into three circuits operating in parallel.
o The logic, shift, and increment operations can be performed concurrently on different
data. All units are independent of each other, so one number can be shifted while
another number is being incremented.

There are a variety of ways that parallel processing can be classified. One classification
introduced by M. J. Flynn considers the organization of a computer system by the number of
instructions and data items that are manipulated simultaneously. The normal operation of a
computer is to fetch instructions from memory and execute them in the processor. The
sequence of instructions read from memory constitutes an instruction stream. The
operations performed on the data in the processor constitutes a data stream. Parallel
processing may occur in the instruction stream, in the data stream, or in both. Flynn’s
classification divides computers into four major groups as follows:
• Single instruction stream, single data stream (SISD)
• Single instruction stream, multiple data stream (SIMD)
• Multiple instruction stream, single data stream (MISD)
• Multiple instruction stream, multiple data stream (MIMD)
 1. SISD : represents the organization of a single computer containing a control unit, a
processor unit, and a memory unit. Instructions are executed sequentially and the
system may or may not have internal parallel processing capabilities. Parallel
processing in this case may be achieved by means of multiple functional units or by
pipeline processing.
2. SIMD : All processors execute the same instruction on different data elements
simultaneously. This is common in vector processors.
3. MISD : Each processor executes a different instruction on the same set of data. Only
of theoretical interest since no practical system has been constructed using this
organization.
4. MIMD : Different processors execute different instructions on different sets of data
independently. This is a common architecture in parallel computing systems.

PIPELINING
Pipelining is a technique for breaking down a sequential process into various sub-
operations and executing each sub-operation in its own dedicated segment that runs
in parallel with all other segments.

The most significant feature of a pipeline technique is that it allows several

computations to run in parallel in different parts at the same time.

By associating a register with every segment in the pipeline, the process of

computation can be made overlapping. The registers provide separation and isolation
among every segment, allowing each to work on different data at the same time.

Segment 1
Segment 2
Segment 3
 Segment 1

Segment 2

Segment 3

Thus in pipelining, it took only 9 clock cycles to execute the instruction completely. If this
was done serially then total clock cycles would be
1 clock cycle for 1 segment => 3 clock cycles for 3 segments
This needs to be done from i=1 to i=7 => total 7 times
So total clock cycles will be => 3*7
=> 21 cycles