Quartus II 13.

0sp1 (64-bit) Manual

Table of Contents
Create Project ....................................................................................................................................2
Schematic ........................................................................................................................................ 12
Create a new schema ................................................................................................................ 12
Add Components....................................................................................................................... 13
Add inputs and Outputs ............................................................................................................. 15
Change PIN names..................................................................................................................... 16
Compile your project ................................................................................................................. 17
Waveform Simulation ....................................................................................................................... 19
Create a New Waveform File...................................................................................................... 19
Insert Signals into the Waveform................................................................................................ 19
Set the Input Signal Values ......................................................................................................... 22
Change Simulation settings ........................................................................................................ 23
Run the Waveform Simulation ................................................................................................... 24
Verilog Coding.................................................................................................................................. 26
PIN PLANNER.................................................................................................................................... 27

1
Create Project

Click on start button

1. Write Quartus
2. Select Apps
3. Click on Quartus II 13.0sp1 (64-bit)

2
1. Create a new project

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2. Click next

3. Make sure to change the directory to your Desktop

Click on (…)

4
4. Choose Desktop

5. Click on New Folder

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6. Rename the folder as Lab_X

7. Make sure to write the same folder name exactly in the red boxes below

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8. Click next

9. Do nothing. Click next

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10. Family: Choose Cyclone IV E

11. Copy EP4CE115F29C7 code to the name filter field as shown below

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12. Choose the filtered FPGA Device from the list of Available devices section as shown below:

Click

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13. EDA Settings:
a. In Tool Name, choose ModelSim-Altera

b. In Format choose Verilog HDL

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11
Schematic

Create a new schema

Step 1: Click on the New icon

Step 2: In the dialog, select Block Diagram/Schematic File
Step 3: Click OK
A blank file will open where you can start your work

12
Add Components

Step 1: Click on the component’s icon

Step 2: Search for the component
Step 3: Click OK

Example of AND gate with two inputs

13
Example of NOT gate

Example of OR gate with two inputs

14
Add inputs and Outputs

Click on

Choose Input or Output (as needed)

15
Change PIN names
1. Double click on the input/output

2. Change the name

3. Click OK

16
Compile your project
1. Click on the run button as shown below
2. Save your file

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3. Confirm your project compilation is successful
4. Click OK

18
Waveform Simulation

Create a New Waveform File

Step 1: Click on the New icon

Step 2: In the dialog box that appears, select University Program VWF from the list of file types.
Step 3: Click OK to create the waveform file.

Insert Signals into the Waveform

Click on Edit >> grid Size

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Step 1: Choose the time period

Step 2: click OK

Step 1: Double Click on the empty space

Step 2: In the dialog that opens, click on Node Finder.

1
2

20
Step 1: Click on List to choose the signals (input/output pins, internal nodes) you want to observe in the
waveform

Step 2: Click on the “>>” button

Step 3: Click OK

21
Set the Input Signal Values

1. Check your input and output signals

2. Click on or to change the value of a signal manually.
3. Click on to create a periodic signal.

**** Don’t change the value of the output. The simulator will change the output automatically once
you

22
Change Simulation settings

1. Go to Simulation
2. Choose Options

1. Select Quartus II Simulator

2. Click OK

23
Run the Waveform Simulation

Step 1: Click on the Run icon

Step 2: Save the file

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Step 3: View the simulation result

25
Verilog Coding

1. Go to File > New.

2. In the dialog, select Verilog HDL File and click OK.
3. A blank Verilog file will open where you can start writing your Verilog code.

26
PIN PLANNER

Step 1: Go to Assignments >> Device

Step 2: Check Family: Cyclone IV E

Step 3: Check Name Filter: EP4CE115F29C7

Step 4: Choose the device

Step 5: Click OK

3
4

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Step 6: Go to Assignments >> Pin Planner

Step 7: Mapping the input/output pins of your Verilog module to the physical pins on the FPGA.

*****You can take the pin locations from the “DE2-115_PIN_ASSIGNMENTS” file in Moodle page.

Usually we chose as below:

- Inputs: Switches
- Outputs: LEDs

Step 8: Press Ctrl + S to save your pin configurations

Step 9: Compile the project click on

Step 10: Go to Tools >> Programmer

a. Check if the hardware connection is done successfully. It should read “USB-Blaster”. If not,
troubleshoot the problem.
b. In case you don’t see the .sof file automatically, you must add it manually from “Add File”
c. Check if the serial number matches your FPGA board
d. Start the compilation process
e. The progress should be 100% and green color

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 a

e
d

Now you can test your circuit and demonstrate the simulation to your instructor.

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