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8051-programming-sec-b-elect-m&m

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35 views3 pages

Mcu1 OF 8

8051-programming-sec-b-elect-m&m

Uploaded by

Jeronimo
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Data memory structure of 8051 Microcontroller Here we will see the data memory structures of 8051 microcontroller. The internal data memory of 8051 is divided into two groups. These are a set of eight registers, and a scratch pad memory. These eight registers are RO to R7. The address range OOH to 07H is used to access the registers, and the rest are scratch pad memory. 8051 Provides four register bank, but only one register bank can be used at any point of time. To select the register bank, two bits of PSW (Program Status Word) are used. ool Internal date memory TH 7 ioe SFR = Special function register SFR space FFE So the following addressing can be used to select register banks. Address Range Register Bank 00H to 07H Register Bank 0 08H to OFH Register Bank 1 10H to 17H Register Bank 2 18H to 1FH Register Bank 3 The concept of four register banks is very useful. For servicing the interrupts, this feature is very good. The interrupt program can use one bank, and the Interrupt Service Subroutine (ISS) can access another bank for better performance. As there are four banks, so for nested interrupts these can be used Internal data memory Register bank area organization oon ool Register bank 0 Register bank area om IFH os m 20H | pit-addressable area \ Register bank | 2FH OFI 3011 10H Rest of RAM area 17H Register bank 2 18H Register bank 3 FH IFW When all of the register banks are being used, the scratch pad area will be 20H to 7FH. But from 20H to 2FH (16 bytes or 128 bits) can be used as bit addressable RAM. By using some simple instructions with 8-bit memory address we can check the bit addressing. For an example the instruction CLR 6FH, using this instruction it clears the location 6FH. As we know the &-bit address can locate 256 different locations, but here only 128-bits are addressable. Another section of bit addressable locations is 80H to FFH. The remaining locations (30H to 7EH) of the RAM can be used to store variable data and stack Bit-addressable area Byte address A register bank RO 2011 [07] 06] 05] 04 [03 [02 [01 [00 RL 21H | OF | OE |OD| 0C |OB |OA} 09 | 08 K— Bit R2 address R3 R4 RS RO R7 2FH | 7F | 7E|7D}7C |7B |7A |79 |78 Stack Area- The stack area in 8051 always can be implemented in internal data memory. Here the Stack Pointer (SP) is only 8-bit register, because the internal RAM area is only in range OOH to 7FH, and when all register banks are being used, the stack location will be in range 30H to 7FH. So in such a case, the SP will be initialized with 2FH OOH o7H O8H 1FH 20H 2FH 30H | Direction of growth of stack SP contains 07H after reset {| Direction of growth UE of variable data The stack pointer SP increases before each PUSH operation, and decreases after each pop instruction. When the 8051 is reset, the Stack Pointer will point to 07H. It means the location 08H to 7FH can be used as a stack. We are assuming that the register bank 0 is in use, and 20H to 27H are not like bit-addressable area.

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