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Data Representation

Data representation for architecture in computer

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Abir Saha
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13 views28 pages

Data Representation

Data representation for architecture in computer

Uploaded by

Abir Saha
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Data Representation

Computer Arithmetic
Computer arithmetic is commonly performed
on two very different types of numbers:
• Integer
• Floating point
ALU Inputs and Outputs
Integer Representation
Sign-Magnitude Representation
The simplest form of representation that
employs a sign bit is the sign-magnitude
representation. In an n-bit word, the rightmost
n - 1 bits hold the magnitude of the integer.
Drawbacks to Sign-Magnitude
Representation
• Addition and subtraction require a
consideration of both the signs of the numbers
and their relative magnitudes to carry out the
required operation.
• There are two representations of 0.
Solution: Twos Complement
Representation
Representation of Positive and
Negative Numbers
• If A is positive, then the sign bit, an-1, is zero. If A
is Negative, then the sign bit, an-1, will be One.
The remaining bits represent the magnitude of the
number in the same fashion as for sign
magnitude:
Number Range
• We can see that the range of positive integers
that may be represented is from 0 (all of the
magnitude bits are 0) through 2n-1 - 1 (all of
the magnitude bits are 1).
• The range of negative integers that can be
represented is from -1 to -2n-1 .
Number Range
Value Box Representation
Range Extension
• It is sometimes desirable to take an n-bit
integer and store it in m bits, where m > n.
This expansion of bit length is referred to as
range extension, because the range of
numbers that can be expressed is extended by
increasing the bit length.
Range Expansion in Sign-Magnitude
Notation
• In sign-magnitude notation, this is easily
accomplished: simply move the sign bit to the
new leftmost position and fill in with zeros.
Range Expansion in Twos-
Complement Notation
This procedure will not work for twos complement
negative integers.

Instead, the rule for twos complement integers is to


move the sign bit to the new leftmost position and
fill in with copies of the sign bit. This is called sign
extension.
Fixed-Point Representation
• Finally, we mention that the representations
discussed in this section are sometimes
referred to as fixed point. This is because the
radix point (binary point) is fixed and assumed
to be to the right of the rightmost digit. The
programmer can use the same representation
for binary fractions by scaling the numbers so
that the binary point is implicitly positioned at
some other location.
Negation of Integer Arithmetic
In twos complement notation, the negation of an
integer can be formed with the following rules:

1. Take the Boolean complement of each bit of


the integer (including the sign bit). That is, set
each 1 to 0 and each 0 to 1.
2. Treating the result as an unsigned binary
integer, add 1.

This two-step process is referred to as the twos


complement operation, or the taking of the twos
complement of an integer.
Negation of Integer Arithmetic
Limitations
• There are two special cases to consider. First,
consider A = 0. In that case, for an 8-bit
representation:
There is a carry out of the most significant bit
position, which is ignored. The result is that
the negation of 0 is 0, as it should be.
Limitations
• The second special case is more of a problem.
If we take the negation of the bit pattern of 1
followed by n - 1 zeros, we get back the same
number. For example, for 8-bit words, Some
such anomaly is unavoidable.
Solution
• The number of different bit patterns in an n-bit
word is 2n, which is an even number. We wish to
represent positive and negative integers and 0. If
an equal number of positive and negative integers
are represented (sign magnitude), then there are
two representations for 0. If there is only one
representation of 0 (twos complement), then there
must be an unequal number of negative and
positive numbers represented. In the case of twos
complement, for an n-bit length, there is a
representation for - 2n-1 but not for + 2n-1 .
Overflow
• On any addition, the result may be larger than
can be held in the word size being used. This
condition is called overflow.
Overflow in Addition
Overflow Rule: If two numbers are added, and
they are both positive or both negative, then
overflow occurs whether or not there is a carry.
Overflow in Subtraction
• To subtract one number (subtrahend) from
another (minuend), take the twos complement
(negation) of the subtrahend and add it to the
minuend.
Hardware Configuration for
Addition and Subtraction
Booth’s Multiplication
Booth’s Multiplication
Booth’s Multiplication
Example

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