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    Digital Electronics Exam Paper

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    swarnahans
    This document appears to be an exam for a 3rd semester Digital Electronics course. It covers a range of topics in digital electronics including logic gates, combinational logic, flip-flops, multiplexers, decoders, counters, shift registers, and asynchronous sequential logic circuits. The exam consists of 8 questions covering these topics, with students required to answer 5 questions including the compulsory question 1.

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    Digital Electronics Exam Paper

    Uploaded by

    swarnahans
    937 views2 pages
    This document appears to be an exam for a 3rd semester Digital Electronics course. It covers a range of topics in digital electronics including logic gates, combinational logic, flip-flops, multiplexers, decoders, counters, shift registers, and asynchronous sequential logic circuits. The exam consists of 8 questions covering these topics, with students required to answer 5 questions including the compulsory question 1.

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    © Attribution Non-Commercial (BY-NC)

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    This document appears to be an exam for a 3rd semester Digital Electronics course. It covers a range of topics in digital electronics including logic gates, combinational logic, flip-flops, multiplexers, decoders, counters, shift registers, and asynchronous sequential logic circuits. The exam consists of 8 questions covering these topics, with students required to answer 5 questions including the compulsory question 1.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    937 views2 pages

    Digital Electronics Exam Paper

    Uploaded by

    swarnahans
    This document appears to be an exam for a 3rd semester Digital Electronics course. It covers a range of topics in digital electronics including logic gates, combinational logic, flip-flops, multiplexers, decoders, counters, shift registers, and asynchronous sequential logic circuits. The exam consists of 8 questions covering these topics, with students required to answer 5 questions including the compulsory question 1.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 2

    B.

    Tech 3rd sem Digital Electronics Time : 3hrs Sub Code:EE-204-F Max Marks:100

    Note: Attempt five question.Q.no.1 is compulsory and one question from each of four section. Assume any missing data.
    1. (a) Realize the following using Universal Gates

    5
    (i)

    AND Gate (ii) Ex-OR Gate (iii) NOT Gate (iv) OR Gate (b) Define Combinational Ckt. Give example also. (c) Simplify (i) F= A(B+C)+BC + AC (ii) F =A(B+C) +AB +C(A+B)

    2 2 (d) Give Truth Table for: 3 (i) S-R Flip-Flop (ii) J-K Flip-Flop (iii) T Flip-Flop (e) What are various Use of Multiplexers? Difference between Decoder and D-MUX. 2 (f) Differentiate b/w 3 (i) Latch and Flip-Flop (ii) Counters and Registers (iii) Race condition in Flip-Flop (iv) (g) Convert (111001001.100101)2 = ( )8 = ( )H 3

    Section -A
    1. (a)Simplify the given function using K-Map Method

    10 F =m (0,2,3,5,7,11,12,13) F = ABC+ACD+BC+ABD+ABCD F = (AC+ ACD)(AD+AC+BC) (b) Explain Error detecting and correcting code in details. 10 3. (a) Solve using Quine McClusky Method 10 F = M(0,3,5,7,9,12,15) and realize using NAND gate. (b) (i) Add -12210 and +65 10using 2s complement 10 (ii) Multiply 4.752 by 3.6252 (iii) Divide 502 by 52 (iv) convert 20046 to 9s and 10s complement (v) convert 73254 to radix 5

    Section B
    2. (a)Show how 16:1 MUX can be obtained by 4:1 MUX .Design Full Adder with MUX.

    10 (b) Explain Full Subtractor. Draw it using H/A. 10


    3. (a)What is meant by Encoders? Explain priority Encoders in detail.

    10

    (b) Design BCD to X-3Code converter. OR Magnitude Comparator 10

    Section C
    4. (a) What are Counters ? How we use them in digital System? Design MOD-8

    Ripple counter. 10 (b) Design Decade synchronous counter using J-K Flip-Flop. 10
    5. (a)Explain serial in parallel out and parallel in serial out shift registers using D-flip-

    flop. Also explain its different applications. 10 (b) Convert J-K flip-flop into D flip-flop and J-K to T flip flop. 10

    Section D
    6. (a)What is Race free state assignment? Also explain Hazards in detail.

    10 (b) Design a asynchronous sequential logic circuit for the given fig 10

    8. Write a short note on the following 20 (i) Half Adder using PLA (ii) ASMs (iii)Reduction of states (iv) RAM and ROM

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