Concatenating OCC Clock Chains From Multiple DFT Partitions
Concatenating OCC Clock Chains From Multiple DFT Partitions
Title
Concatenating OCC Clock Chains From Multiple DFT Partitions
Description
Question:
I have multiple DFT partitions, with OCC controllers spread across them: I would like to concatenate all of the clock chains into a single chain:
I'm following the instructions provided in SolvNet article 018046, "How Can I Control Scan Stitching of OCC Controller Clock Chains?"
(https://solvnet.synopsys.com/retrieve/018046.html). However, my set_scan_path -class occ specification is being ignored, and the clock chains
are still being split up across partitions.
Answer:
The short answer is, you can't—scan cells from different partitions cannot exist in the same chain.
However, you can achieve the desired structure by defining your DFT partitions so that all OCC chains to be concatenated belong to the same DFT
partition (default or user-defined):
For DFT-inserted OCC controllers, a clock chain belongs to the partition of the enclosing block it will be inserted into.
For user-defined OCC controllers, a clock chain belongs to the partition that its registers belong to.
If all your clock chains are at the top level or in some common level of hierarchy, then putting them all in the same partition is easy. However, if the
clock chains are inside blocks of different partitions, then things get tricky. In this case, you can use one of the following methods.
Note: For clarity, the examples show a dedicated "POCC" partition for the OCC logic. However, you can also use an existing partition. The only
requirement is that all clock chains be in the same partition.
These could be modified to exclude the clock-generation blocks, then include them in a separate partition:
If you have many subblocks alongside the clock-generation blocks, you can use the remove_from_collection command to obtain them:
In this example, the subblocks sub1/clkgen and sub2/clkgen contain the clock sources, and thus the DFT-inserted OCC logic (including clock
chains) are inserted inside these subblocks. By assigning these subblocks to partition POCC first, then assigning the parent blocks and their
remaining logic to P1 and P2, we can assign all clock chains to POCC:
No scan signals
Workaround