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DLD Lab Report 11

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51 views4 pages

DLD Lab Report 11

report

Uploaded by

kashifkhanchandio0305
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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DLD LAB Report 11

Digital Logic Design (COMSATS University Islamabad)

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DIGITAL LOGIC DESIGN


LAB REPORT # 011
INTRODUCTION
A BCD counter is a digital circuit that counts in Binary Coded Decimal format, where each
decimal digit is represented by its corresponding 4-bit binary code. In programming, a BCD
counter can be implemented using a loop and an integer variable. The counter starts from 0000
and increments by 1 repeatedly. When the counter reaches 1001 (9 in decimal), it resets back to
0000 and con琀椀nues the coun琀椀ng cycle. The counter value is then displayed or used for further
processing. This allows for coun琀椀ng in a decimal format while using binary representa琀椀on,
making it useful in applica琀椀ons where decimal representa琀椀on is required.

EQUIPMENTS REQUIRED
1. Xilinx so昀琀ware.
2. FPGA hardware kit.
In-lAB TASK 01
HDL (Verilog) structural descrip琀椀on of a BCD counter with control inputs:

IN-LAB TASK 02

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In-lab task 03
Write an HDL (Verilog) structural descrip琀椀on of a main module (according to the block diagram
provided in Step 2) and then implement it on FPGA.

In-lab task 03

Write an HDL code (State diagram-based behavioral descrip琀椀on) of the design

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Cri琀椀cal analysis:
This cri琀椀cal analysis evaluates the performance and limita琀椀ons of the Binary
Coded Decimal (BCD) counter. The experimental setup involves implemen琀椀ng the
BCD counter using a microcontroller or programmable logic device (PLD) and
connec琀椀ng it to a display for observa琀椀on. The counter's accuracy, speed, power
consump琀椀on, scalability, complexity, range, and propaga琀椀on delay are assessed.
The analysis focuses on comparing the counter's displayed output with expected
results, measuring 琀椀ming characteris琀椀cs and delays, monitoring power
consump琀椀on and energy e昀케ciency, examining scalability for higher digit counts,
and discussing limita琀椀ons such as complexity, limited range, and propaga琀椀on
delay. The 昀椀ndings provide insights into the BCD counter's performance factors
and considera琀椀ons for designing and u琀椀lizing it e昀昀ec琀椀vely in various applica琀椀ons.

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