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Interfacing

It is Memory Mapping for CO/Microprocessor for Delhi Skill And Entrepreneurship University

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Naman Malik
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18 views

Interfacing

It is Memory Mapping for CO/Microprocessor for Delhi Skill And Entrepreneurship University

Uploaded by

Naman Malik
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Pheripherals are the devices connected to processor externally(except main M memory). These can be classified into:- Ss 1) Input devices ex- Keyboard or mouse 2) Output devices ex- printer or display Gus) These pheripherals cannot be directly connected to microprocessor due to several reasons. ‘one of main reason is speed. Microprocessor is fast, while pheripherals are usually slow. So, an Interface is needed to connect microprocessor with pherpherals. Interface = the path for communication between two components. Interfacing is a technique for ‘ting data between microprocessor and pheripherals. Interfacing can be done in 3 ways 1) Separate Buses 2) “Separaleseate! bus and common address and data buses (I/O Mapped I/O) 3) Common Buses (Memory Mapped I/O) —_ ————— Bae. Addtess, Gone Interfacing ska) € Separate Busses 8085 Memory 1/0 Address Bus Data Bus Control Bus o 1/O Mapped I/O — 1 In this type of interfacing IK microprocessor is f ? Memory connected to pheripherals 8085 and main memory with the help of common address = and data busses and > |/ separate control busses. 8085 distinguishes between memory and I/O devices using different control signals. For memory, these are Memory read and write. For I/O devices, these are I/O read and write. Since in this configuration, both I/O and memory signals are different therefore I/O also have their own different addresses that's why it is known as I/O Mapped I/O. Costly 64 Kb . ,Memory Mapped |/O ——_0 8085 Memory /O In this type of interfacing microprocessor is connected to pheripherals and main memory with the help of common address, data and control busses. Through this method, 8085 doesn't distinguishes between main Memory and I/O devices. 1/O devices are treated as the memory location in main memory. Since In this configuration, Both main memory and I/O devices have same control bus therefore in order to distinguish I/O devises are treated as the memory location that is why itis known as Memory mapped I/O. S ymapp Fpcenn x Hard wired connection eof Loss of Memory Location T peaa7 Data Transfering Scheme Data can be transferred in two ways: In 8085, Data can be transferred parallaly in 1) Parallel data transfer two modes:- 2) Serial Data transfer 1) Programmed/ Microprogrammed Data Transfer 2) Direct Memory Access Programmed Data Transfer- Here the control of data transfer is compeletly in the hand of microprocessor. Data is transferred by executing a stored program. it is preferred for small amount of data transfer. It is of three types: Synchronous DTS , Asynchronous DTS, Interrupt Driven DTS. Direct Memory Access- Here the contro! of data transfer is not under the hands of microprocessor. Data is transferred with the help of DMAC controller. During this data transfer microprocessor can perform thier own differnt tasks that doesn't require system busses. Asynchronous Data Transfer Polled Data Transfer |In Asynchronous Data Transfer, Speed of microprocessor and the I/O (Start) devices are not same that's why both sender and receiver are synchroniced MPP askVO with the different clocks. Data Transfer is done by exchanging handshaking jevice status signals with each other. In this type of data transfer, microprocessor checks the status of I/O Read 'status' of VO devices at regular intervals. The microprocessor initiates the I/O device to get ready and then continuously checks the status of the /O device till the I/O device becomes ready to transfer data. This method of data transfer is also called handshaking mode of data transfer becuase some signals are exchanged between the I/O device and microprocessor before the actual data transfer takes place. Interrupt Driven Data Transfer After execution of each instruction, 8085 checks for Interrupt - 8085 interrupt request and if there is any interrupt request, 8085 U} shifts from its current program to ISR.( Interrupt Service Read status of Routine) WO device On receiving an interrupt signal, the processor will U compelete the current instruction execution and stores Rene date fom address of next instruction in stack and calls a specific UF interrupt service rotine(ISR) to service interrupted device. Write datain memory At the end of ISR the address of instruction to be executed TI in main program is retrieved from stack and the processor ing i i 085 starts to starts executing its main program. process program DMA Controller Direct Memory Access 8085 Memory Data [Sa aon} > —— Hold | —<— HLDA Data Count Starting Address Aetooale ‘Soment DMAC In this data transfer scheme, data can be transferred between memory and I/O devices without the interference of microprocessor. For this a DMAC is used. During DMA transfer, microprocessor can perform those tasks which do not require system buses. In this type of configuration, whenever data is to be transfered from I/O device to memory, I/O device will send a DMA Request. Then DMAC will send Hold signal to 8085. Then 8085 will send Data Count, Starting address to DMAC and HLDA (Hold Acknowledgement) and set its data bus to Tristate. Now DMAC will send DMA Acknowledgement to I/O device. Finally, DATA Transfer will take place.

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