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Copyright © 2018 by McGraw-Hill Education. All rights reserved. Except as
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Peter enjoys cooking, fine wine, traveling, and spending quality time with his
family. His wife is my daughter, Shauna, and their child is my two-year-old
granddaughter, Evangeline.
Peter and I have spent many hours discussing many topics ranging from ancient
Greek artifacts to the latest technologies impacting modern society. I always
look forward to those interesting and challenging discussions.
CONTENTS AT A GLANCE
3 STM32CubeMX Application
6 Interrupts
7 Timers
9 Analog-to-Digital Conversion
Index
CONTENTS
Preface
3 STM32CubeMX Application
Pinout Tab
MCU Alternative Functions
Integrated Peripheral (IP) Tree Pane
Creating an Example Project using CubeMX
The main.c Code Listing
ARM Cortex Microcontroller Software Interface Standard (CMSIS)
CubeMX-Generated C Code
Compiling and Downloading the Project
Downloading the Hex Code
Summary
6 Interrupts
Interrupts
NVIC Specifications
Interrupt Process
External Interrupts
Interrupt Demonstration
Summary
7 Timers
STM Timer Peripherals
STM Timer Configuration
Update Event Calculation
Polled or Non-interrupt Blink LED Timer Demonstration
Test Run
Interrupt-Driven Blink LED Timer Demonstration
Test Run
Multi-rate Interrupt-Driven Blink LED Timer Demonstration
Test Run
Modification to the Multi-rate Program
Test Run
Summary
9 Analog-to-Digital Conversion
ADC Functions
ADC Module with HAL
ADC Conversion Modes
Channels, Groups, and Ranks
ADC Demonstration
ADC Demonstration Software
Summary
Microcomputer vs Microcontroller
I believe at the start of this book that it must make very clear the differences
between a microcomputer and a MCU. The reason for this distinction is very
simple: STM is a company that designs and manufacturers MCUs, not
microcomputers. I think my following definition of a MCU is as good as any
that I have read:
Right away, you can see from the definition that a MCU contains a
microprocessor which is sometimes referred to as a microcomputer. There also
must be both dynamic or volatile memory as well as nonvolatile or static
memory, where the latter holds any programs or scripts necessary to run the
microprocessor. Finally, there are always peripherals added to the design that
allow for the input and output of digital signals. There are often additional
peripherals such as timers, interrupt controllers, serial data ports, and a variety of
others depending upon what requirements the MCU must meet.
I discuss all the principal MCU components below to provide you with a solid
background to understand how a MCU functions. Most of the following
explanations are based on the voluminous amount of information provided by
STM on their microcontrollers. The reason behind STM providing such a large
amount of information is to allow engineers/software developers access to all the
data they need in order to incorporate STM products into original equipment
manufacturer (OEM) designs and products. This approach is fundamentally
different than the approach taken by suppliers of maker style boards and
products, such as the Arduino, Raspberry Pi, BeagleBone, and so forth. In the
case of the latter, board documentation is geared toward how to use a board in a
project. The STM data is extremely specific describing items such as the
nanosecond timing pulses between memory chips and processor buses. This is
exactly the reason why some of the STM MCU datasheets are over 1,100 pages
in length. Fortunately, the datasheet for the primary STM MCU I will be using in
this book is only 138 pages. I will provide later in this chapter the website where
you can download the datasheet.
The boards are named Nucleo-32, Nucleo-64, and Nucleo-144 from left to
right, respectively, as shown in Figure 1-1. The number in each name represents
the number of pins present in the MCU chip. Nucleo-64 is the principal board
used in this book.
Processor
The processor used in Nucleo-32 and Nucleo-64 boards is the ARM Cortex M-4
32-bit processor. It too has a lengthy 278-page user guide available from
infocenter.arm.com/help/topic/com.arm.doc.dui0553a/DUI0553A_cortex_m4_dgug.pdf
The actual processor circuitry is part of the STM MCU because STM has
purchased intellectual property (IP) rights from the ARM Corporation in order to
integrate it into its chips. However, for all practical purposes, the ARM
processor is programmed using the tools and techniques promulgated by the
ARM Corporation to support its processor IP. This distinction is of no
consequence in our case because the software tools to be used for the book
projects have all been carefully crafted and tested to work seamlessly together by
STM. Any license issues have already been resolved without bothering the end
user.
The following list contains some of the important specifications for the
Cortex M-4 processor for interested readers:
• Full-featured ARMv7-M instruction set, optimized for embedded
applications
• Floating point unit (FPU)
• Low-power 32-bit processor
• Memory protection unit (MPU)
• Nested vector interrupt controller (NVIC)
• Trace, breakpoint, and JTAG capabilities
• Advanced Microcontroller Bus Architecture (AMBA)
• Advanced High-Performance Bus (AHB5, AHB-Lite)
There are many more features to the Cortex M-4 processor as the 278-page
user guide would suggest. I would also recommend Joseph Yiu’s book, The
Definitive Guide to ARM® Cortex®-M3 and Cortex®-M4 Processors, Third
Edition, to readers who really want to delve into this processor to a great depth.
Figure 1-2 is a block diagram of the Cortex M-4 processor showing all of the
listed items and more.
Figure 1-2 ARM Cortex M-4 block diagram.
Memory
The Cortex M-4 processor uses a Harvard architecture. This means that program
instructions are stored and retrieved from a memory separate and distinct from
the memory that holds data. The other common computer architecture is named
von Neumann in which instructions and data share a common memory. MCUs
have very limited memory and take advantage of the speed-up available by using
concurrent instruction and data access. Additionally, having separate memories
means that the processor is no longer constrained to the same sized data widths.
This means instructions can be fetched and executed in 4-byte chunks or 32 bits,
while data can be simultaneously handled with 1-byte or 8-bit chunks, thus
speeding up the overall throughput to and from the processor and memory.
Another advantage the Harvard architecture has over the von Neumann form is
that instruction prefetches can now be done in parallel with regular instruction
executions, thus further speeding up the overall system performance. Finally,
concurrent instruction and data access eliminates the need for data caches, which
are typically used in von Neumann machines. This further reduces system
complexity and power consumption.
The Nucleo-64 board used in this book is the STM MCU, model number
STM32F302R8. This chip has a 64-KB flash memory and a 16-KB static
random access memory (SRAM). Yes, those are kilobytes, not mega- or
gigabytes. You cannot expect to create any graphical programs that run in this
limited memory space. Microcontroller programs are truly a throwback to the
earliest days of computing where memory was very limited and developers had
to use every available byte to store and execute programs. Having mentioned the
scarce memory resources, you will be able to use a variety of modern-day
graphic-based programs to develop the MCU program, but they will run on a
PC. The compiled and optimized binary code will be downloaded into the MCU
from the PC.
It turns out that 64 KB is plenty of space to run fairly large programs because
the C/C++ cross-compiler used for this book’s projects produces optimize code,
eliminating all but the essential instructions needed for the program. The 16-KB
SRAM size is more than adequate for the dynamic memory requirements to
support a maximum 64-KB sized program. The actual memory is integrated onto
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