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Construction of Simple Decoder Circuit Using Logic Gates.

Simple Decoder Circuit

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vidyadhar.cse123183
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157 views

Construction of Simple Decoder Circuit Using Logic Gates.

Simple Decoder Circuit

Uploaded by

vidyadhar.cse123183
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Experiment No: 5

Title: Construction of Simple Decoder circuit using Logic Gates.

Objective:

1. To achieve the concept of a Decoder.

2. To compose and actualize the truth table

Theory:

A decoder is a combinational circuit that converts binary information from n input lines to a maximum of 2 n
unique output lines. If the n-bit is decoded information has unused (or don’t care) combinations the output
has been less than 2 n bit. The decoders are normally called n-to-m line decoders, where m ≤ 2 n. The purpose
is to generate 2n (or less) minterms of n input variables. Here 2 to 4-line decoder is considered where input
lines n=2 & hence o/p line is 2 n =4.

Circuit Diagram:

Fig.1 Circuit Diagram of 2*4 line Decoder

1
Observation:

Truth table for 2x4 Decoder

Inputs Outputs

X Y D3 D2 D1 D0

0 0

0 1

1 0

1 1

2
Title: Construction of Multiplexer Circuit Using Logic Gates

Objective:

1. To achieve the concept of a Multiplexer.

2. To construct and actualize the truth table.

Theory:

A Digital Multiplexer is a combinational circuit that selects binary information from one of many input lines
and detects it to a single output line. The selection of a particular input line is controlled by a set of selection
lines. Normally, there are 2 n input lines and `n' selection lines are there whose bit combinations determine
which input is selected. Here 1 selection line& hence 2 n = 2 i/p lines multiplexer is discussed .

Circuit Diagram:

Fig.1 Circuit Diagram of Multiplexer

Observation:

Truth table for 2x1 MUX:

Selection Lines Output

S0 Y

3
Discussion:

Questionnaires:

1: Implement the following function using Multiplexer: F (A, B.C, D) = ∑ (0,2,3,8,12,14)

2: Construct a 16:1 MUX with 4:1 MUX.

3: Explain MUX can be used as “Data Selector”.

4: What is the purpose of a seven-segment decoder circuit? And why do we need a decoder
circuit to drive it?

5: How an encoder does differ from a decoder?

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