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Code: 20A02602T R20

B.Tech IIYear llSemester (R20) Regular Examinations August 2023

DIGITAL COMPUTING PLATFORMS
(Electrical &Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART -A
(Compulsory Question)

1 Answer the following: (10 X02 = 20 Marks)

(a) Wite the function of program counter register. 2M
(b) Write the function of ALE signal in 8086. 2M
(c) Explain the call instruction. 2M
(d) What is mean by interfacing in view of microprocessors? 2M
(e) List all the registers in register set of 8051. 2M
() Explain push and POP instructions in 8051. 2M
(g) What is an Interrupt? 2M
(h) Write the features of DSP controllers. 2M
() Name the different types of FPGA. 2M
() What is gate array? 2M

PART- B
(Answer all the questions: 05 X 10 = 50 Marks)
2 (a) If the stack segment register contains 3000H and the stack pointer register contains 8434H, 5M
what is the physical address of the top of the stack?
(b) Draw the minimum mode pin diagram of 8086 microprocessor and describe only minimum 5M
mode pin.
OR
3 Draw the internal architecture of 8086 microprocessor and explain the function of each block 1OM
in detail.
4 (a) Define Macro. Explain its importance in 8086 programming. 5M
(b) Discuss various branch instruction of 8086 microprocessor, that are useful for relocation. 5M
OR
5 Describe the assembler directives of 8086microprocessor. 1OM
(i) DW (ii) SEGMENT (i) PROC and ENDP (iv) ASSUME.
6 (a) Discuss about the /O pins ports and circuit details of 8051 with its diagram. 5M
(b) Explain various addressing modes of 8051microcontroller. 5M
OR
7 (a) Draw the PSW and TCON registers of 8051 microcontroller. 5M
(b) Explain the different futures of 8051 microcontroller in detail. 5M

8 (a) Draw and explain of each flag of interrupt control register. 5M

(b) List and explain the Memory Addressing Modes of C2xx DSP core. 5M
OR
9 Discuss in detail about various Components of the C2xx DSP core. 10M

10 (a) Compare the CPLD Vs FPGA. 5M

(b) Discuss about HDL programming. 5M
OR
11 Write a short note on following blocks of XC3000 series: 10M
(0) Configurable logic Block (CLB) (i) Input/ Output Block (|0B).

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Code: 19A02601T R19

B.Tech lIlYear Il Semester (R19) Supplementary Examinations January/February 2023

DIGITAL COMPUTER PLATFORMS
(Electrical &Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART -A
(Compulsory Question)
1 Answer the following: (10 X 02 = 20 Marks)
(a) List the hierarchy of microprocessor growth till 64 bit. 2M
(b) What is a stack pointer? 2M
(c) Name any two branching instructions in 8086. 2M
(d) Draw the vector interrupt table in 8086 microprocessor. 2M
(e) Distinguish between microprocessor and microcontroller. 2M
(0 How DPTR is addressed in 8051 microcontroller? 2M
(g) List the various features in DSP controller. 2M
(h) Write an assembly language program to perform the addition in C2xx DSP instruction set. 2M
(i) What is an FPGA? 2M
() Why PIP is needed in FPGA? 2M

PART-B
(Answer all the questions: 05 X10 =50 Marks)
2 (a) Describe in detail the 8086 architecture and detail the functions of each block. 5M
(b) Illustrate the functions of general purpose registers in 8086. 5M
OR
3 (a) Discuss the addressing modes of 8086. 6M
(b) Give an account of CISC architecture. 4M

4 (a) Write short notes on Macro. 5M

(b) Explain the following assembler directive in 8086 () ASSUME (i) EQU(ii) DW. 5M
OR
5 (a) Explain briefiy about Interrupt handling process in 8086. 5M
(b) Show the memory organization and interfacing with 8086 microprocessor. Explain how the 5M
memory is accessed.

6 (a) Draw the architecture of 8051 microcontroller and explain the functions of each block. 5M
(b) Discuss the various addressing modes in 8051 microcontroller. 5M
OR
7 (a) Explain the data transfer instructions and program control instructions of 8051 microcontroller. 5M
(b) Draw the interfacing diagram of the stepper motor and write a program for the same. 5M

8 (a) Draw the physical memory concept in the TMS320LF2407. 5M

(b) Explain the interrupt concept in DSP controller. 5M
OR
9 (a) Describe the peripheral interface in TMS320LF2407 DSP controller. 5M
(b) Explain about the components of the C2o DSP core. 5M

10 (a) Draw the architecture of XC3000 Xilinx FPGA. 5M

(b) Distinguish the concept of CPLD and FPGA. 5M
OR
11 (a) Explain the Virtex I|FPGA boards and its features. 5M
(b) Give an account of HDL programming and its need in FPGA. 5M
Code: 19A02601T R19

B.Tech llYear IlSemester (R19) Regular Examinations July/August 2022

DIGITAL COMPUTER PLATFORMS
(Electrical &Electronics Engineering)
Time: 3 hours Max. Marks: 70
PART - A
(Compulsory Question)
1 Answer the following: (10 X 02 = 20 Marks)
(a) Mention the function of accumulator in 8086 processor. 2M
(b) How many address bits and data bits are in 8086 processor? 2M
(c) What an assembler directive? 2M
(d) What is the need of DMA? 2M
(e) Differentiate between program memory and data memoy. 2M
() () ADD A, R7. (i) ADD A, @ RO. Identify the addressing modes of the given instructions. 2M
(9) Mention the advantages of DSP controller. 2M
(h) What is an addressing mode? 2M
(i) Distinguish between CPLD and FPGA. 2M
(i) What is CLBs in FPGA? 2M

PART-B
(Answer all the questions: 05 X10 =50 Marks)
2 (a) Draw the architecture of 8086 microprocessor and explain the functions of each block. 5M
(b) Describe the various flags and their format in 8086 microprocessor. 5M
OR
3 (a) With examples, explain the addressing modes of 8086 microprocessor. 5M
(b) Describe the maximum and minimum mode of operation in 8086 microprocessor. 5M

4 (a) Explain the following assembler directive in 8086: () ASSUME. (i) EQU. (ii) DW. 5M
(b) Discuss the logical and branching instructions in 8086 with an example. 5M
OR
5 (a) Explain about the interrupt structure of 8086. 5M
(b) Describe the various serial communication standards. 5M

6 (a) Explain the architecture of 8051 with neat block diagram. 5M

(b) Discuss the timers in 8051 microcontroller. Explain the Timer 0 configuration. 5M
OR
7 (a) Explain the addressing modes of 8051 microcontroller. 5M
(b) Explain the closed loop control of servo motor and write an interfacing program for the same. 5M

8 (a) Describe the architectural features of TMS320LF2407 DSP controller. 5M

(b) Explain the various interrupt control registers in DSP controller. 5M
OR
9 (a) With an example explain the mappingg of external devices to the DSP controller. 5M
(b) Explain about the components of the C2xx DSP core. 5M

10 (a) Draw the Xilinx FPGA XC3000 architecture. 5M

(b) Give an overview of Spartan 3E. 5M
OR
11
(a) Discuss the different types of FPGA. 5M
(b) Discuss the implementation steps in FPGA boards with an adder example. 5M

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