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Assignment 1 DLD 2024-25

It's all about logic familes

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dulamsathyasavithrivaishnavi
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37 views1 page

Assignment 1 DLD 2024-25

It's all about logic familes

Uploaded by

dulamsathyasavithrivaishnavi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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BVRIT HYDERABAD College of Engineering for Women

Nizampet Road, Bachupally, Hyderabad-500 090


II B.Tech. I Semester Assignment-1, September- 2024
Digital Logic Design
Electronics and Communication Engineering
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Answer all the questions. All Questions carry equal marks.
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Max Marks: 5M
Q Blooms
Question CO Marks
No Level
Unit-1
Solve for x
i) (257)8 = (x)2 ii) (21.625)10 = (x)8 C304.1 Apply 0.5
iii) (BC.2)16 = (x)8 iv) (33)10 = (201) x
1 Perform the subtraction with the following unsigned
binary numbers by taking the 2’scomplement of the
C304.1 Apply 0.5
subtrahend.
i) 11010 – 10010 ii) 100 – 110000.
Unit-1
How do you convert a gray number to binary? Generate
a 4-bit gray code directly using the mirror image C304.1 Apply 0.5
property
2
Implement the function F with the following two level
forms F(A,B,C,D) = Ʃ (0,1,2,3,4,8,9,12). C304.2 Analyze 0.5
i) NAND-AND ii) AND-NOR
Unit-2
Find all the prime implicants of the given function
3 using Quine McClusky method C304.2 Apply 1
f(a,b,c,d) = Σm(7,9,12,13,14,15) + d(4,11)
Unit-2
Give the comparison between different logic families C304.3 Analyze 0.5
4
Realize NAND and NOR gates using CMOS logic C304.3 Apply 0.5
Unit-3
Explain the differences between a MUX and a
DEMUX. Realize 16-input multiplexer by using 8- C304.4 Analyze 0.5
5 input multiplexers
Design a circuit that converts 8421 BCD code to 7
C304.4 Analyze 0.5
segment display code.

Note: Last Date for the Submission of Assignment is 16-09-2024.

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