Received: 18 February 2021 Revised: 23 May 2021 Accepted: 25 June 2021

DOI: 10.1002/cta.3097

COMPREHENSIVE REVIEW

Phase noise suppression in LC oscillators: Tutorial

Mohammad Bagheri | Xun Li

Department of Electrical Engineering,

McMaster University, Hamilton, Ontario, Abstract
Canada This paper presents a comprehensive study of phase noise (PN) suppression in
LC-tank oscillators. The goal of this study is to provide designers with the
Correspondence
Mohammad Bagheri, Department of latest techniques for reducing PN in cross-coupled oscillators. To this end, we
Electrical Engineering, McMaster begin with a discussion of two prevalent PN models in oscillators: Hajimiri
University, Hamilton, Ontario, Canada.
and Demir. We prefer the Hajimiri model because it does not involve very
Email: [email protected]
complicated math, and it offers engineers better insight into designing low-PN
oscillators in the two-PN close-in regions in an oscillator spectrum (1/f2 and
1/f3). In 1/f2 region, we show that a need for a large output-voltage swing leads
to Class D and B oscillators, and a large output-current swing results in Class
C oscillators. Also, reduction of the impulse sensitivity functions (ISFs) of an
oscillator core can happen in Class F oscillators. A few solutions are presented
for mitigating flicker noise up-conversion, such as adding resistances,
controlling the oscillation amplitude, decreasing the conduction angle, guiding
the high-frequency harmonics of current, and shifting the phase of VGS against
VDS. We also provide a comparison of recent state-of-the-art literature to show
what constitutes a good PN in both 1/f2 and 1/f3 regions in cross-coupled
oscillators. We conclude that a cross-coupled oscillator can reach the best
performances in 1/f3 and 1/f2 PN regions if the oscillator is designed in Class C
with the K block and uses the techniques of narrowing the conduction angle,
the tail inductor, and the modified tank simultaneously.

KEYWORDS
flicker noise, oscillator, phase noise, thermal noise, VCO

1 | INTRODUCTION

Technological advances and the growth in wireless communication systems, data rates and channels are increasing at
unprecedented rates. To comply with strict and exact PN specifications in modern communication standards, oscillators
need a special design. Table 1 shows some wireless communication standards with their required phase noise (PN).
It is well known that a PN close-in spectrum of CMOS Radio Frequency (RF) oscillators nearly consists of two
significant regions, 1/f2 and 1/f3, arising from white and flicker noise respectively, as illustrated in Figure 1.1 There is
tremendous interest in mitigating PN in these regions in LC oscillators, particularly voltage-biased oscillators, in which
the tail current is eliminated. Using the oscillators in phase locked-loops (PLLs) can mitigate PN in those regions. On
the other hand, if the loop bandwidth (BW) of a PLL is less than 1 MHz in order to decrease the noise contribution of
charge-pump, reference and frequency divider, virtually applied to all cellular phones, 1/f3 PN region can still be

Int J Circ Theor Appl. 2021;1–26. wileyonlinelibrary.com/journal/cta © 2021 John Wiley & Sons, Ltd. 1
2 BAGHERI AND LI

TABLE 1 Operating carrier frequencies and PN requirements of some wireless communication standards

Standard Frequency band (MHz) PN (dBc/Hz)

GSM 900/1800 880–960
122 @ 0.6 MHz
1710–1880
132 @ 1.6 MHz

139 @ 3 MHz
UMTS 1920–2170
132 @ 3 MHz
1900–2025
132 @ 10 MHz

144 @ 15 MHz
Bluetooth 2402–2480
84 @ 1 MHz

114 @ 2 MHz

129 @ 3 MHZ
WiFi 2412–2472
102 @ 1 MHz
5150–5350
125 @ 25 MHZ
5470–5825
WiMAX 2300–2400 Phase jitter <1 rms
2305–2320
2469–2690
3300–3400
3400–3800

FIGURE 1 A diagram of PN for an oscillator1

problematic.2 For example, a type-II all digital PLL (ADPLL) needs to have a BW less than 400 MHz to prevent the ref-
erence noise from dominating the ADPLL's PN.3
In the last few decades, many studies have been undertaken to model comprehensively the nature of PN in electri-
cal LC oscillators since the oscillators are non-linear and produce large signals. In addition, the conversion of noise into
the PN is not constant but varies with time over one oscillation period. Many of the phase-noise formula are more com-
plicated than Leeson's experimental formulation.4 In the last two decades, two models have been commonly
employed.5,6
The first model, provided by Demir et al., which is rooted in Kartner,7 is very precise and applies to any oscillator
such as optic oscillators. In this model, the perturbation is decomposed into a phase-deviation component and an addi-
tive component termed orbital deviation by Demir.8 Although this model is extremely accurate and used in modern
commercially available circuit simulators such as spectrum RF,9 the mathematical model is very complicated and does
not allow the designer to gain physical insight into the PN generation mechanism.5
BAGHERI AND LI 3

The second model, introduced by Hajimiri and Lee,1 is a linear time-variant (LTV) model applied only on electrical
oscillators. It uses a time-dependent transfer function called an impulse sensitivity function (ISF). An ISF indicates how
much phase shift stems from exerting a unit current impulse, which is the ratio between the phase shift caused by an
instantaneous current perturbation and the amount of injected electric charge. This model defines two impulse
response functions for any noise source, which are concerned with amplitude and phase perturbations. The
impulse response related to the amplitude perturbations is routinely of little interest because the amplitude noise is
eliminated by the amplitude-limiting mechanism. By contrast, the impulse response corresponding to the phase pertur-
bations is of particular interest since the PN cannot be omitted by the same technique.
Even though this model can capture the time variant nature of electrical oscillators and help designers gain better
insight into PN generation mechanism, it fails to predict PN once the perturbation is injected whose frequency is very
close to the oscillation frequency. That is why the model is not able to predict injection-locking phenomena.10 For these
reasons, all the methods provided in this paper are based on Hajimiri and Lee model.5
To clarify the Hajimiri and Lee model, consider, as an example, a parallel LC resonating tank, shown in
Figure 2 with the voltage across the capacitor and the current flowing through the inductor being given by VC(t) = A0
cos (ω0t + φ) and IL(t) = A0 ω0 C sin (ω0t + φ), respectively. The injection of a charge pulse i(t) = Δqδ(t
τ) at time
t = τ results into an instantaneous variation of the voltage across the tank equal to ΔVC = Δq/C. As shown in Figure 3,
if the charge pulse is injected at the peak of the voltage, no phase perturbation occurs and hφ (t, τ) = 0. On the other
hand, if the injection happens during the zero crossing, as depicted in Figure 4, the phase error reaches its maximum
value, given by Δφ = Δq/qmax; where qmax = A0C is the maximum charge stored in the tank capacitor. Since the oscilla-
tor has no time references, such an induced phase error is permanent and cannot be recovered. On the contrary, the
amplitude perturbation is progressively attenuated by the transconductor non-linearity.
The impulse phase response, hφ = Δφ/Δq, is given by

Γ ðτ Þ
hφ ðt, τÞ ¼ uðt
τÞ, ð1Þ
A0 C

where Γ(t) is the so-called ISF, taking into account the periodic dependence of the induced phase shift on the charge
injection time, and u(t) is the unity-step function. In general, given a current disturbance in(t) between two nodes, the
corresponding phase perturbation Δφ(t) can be calculated by using 1, resulting:
ð
1
Δφðt Þ ¼
∞ ΓðτÞin ðτ Þdτ
t
ð2Þ
qmax

where qmax is the maximum charge across the capacitor placed between the nodes of interest.

FIGURE 2 Equivalent circuit of an LC oscillator1

4 BAGHERI AND LI

F I G U R E 3 Impulse response of oscillator output waveform to a charge pulse injected during the peak of the sinusoidal voltage across
the tank capacitor1

F I G U R E 4 Impulse response of oscillator output waveform to a charge pulse injected during the zero crossing of the sinusoidal voltage
across the tank capacitor1

It could be argued that the most recent researches in LC oscillators are derived from an innovative change in differ-
ential Colpitts and cross-coupled oscillators.11–28 A precise study of PN in these oscillators was conducted in Andreani
et al.29 and according to Hajimiri's method. The results show that the cross-coupled oscillator has better PN than the
other one. Moreover, a Colpitts oscillator is of a poorer startup current than that of cross-coupled structures, thereby
leading to higher power consumption.30 Thus, most of work on the Colpitts oscillator could not present an impressive
improvement from the side of dissipating power consumption and PN.31 In this paper, we only address the topologies
concerned with the cross-coupled oscillator; see Figure 6.
BAGHERI AND LI 5

FIGURE 5 A general schematic for an LC-tank oscillator32

FIGURE 6 A voltage-biased oscillator

The purpose of this paper is to provide a logical view of how the topology of a cross-coupled oscillator is evolved to
improve PN in 1/f2 and 1/f3 regions. With this perspective, a designer can choose the best topology that is suitable with
his needs. To this end, we first provide a general PN formula in 1/f2 region. By using this formula, we show that a need
of a large output-voltage swing leads to Class D and B oscillators and a demand of a large output-current swing results
in Class C oscillators while Class F oscillators can reduce the ISFs of an oscillator core. In 1/f3 PN region, we are seek-
ing alleviation in the DC value of effective ISFs in an oscillator core and symmetry in the output waveforms. They can
be done by rising linearity, adding resistances, controlling the oscillation amplitude, decreasing the conduction angle,
guiding the high-frequency harmonics of current, and shifting the phase of VGS against VDS.
This paper is organized as follows. Section 2 provides a comprehensive study on thermal noise converted to 1/f2 PN
and techniques used to mitigate it. Sections 3 expands on this topic but addresses flicker noise up-conversion. Section 4
provides a comparison of recent state-of-the-art literature. Section 5 gives a conclusion.

2 | 1 / F 2 PN REGION

An LC-tank oscillator can be generally shown as Figure 5,32 in which RT is Q/(ω0C) indicating the LC-tank losses and
the energy restoration representing active devices. The PN L(Δω) and figure of merit (FoM) of this oscillator based on
the Hajimiri and Lee model in 1/f2 region may be given by the following32:
"  2 #
4kT Γ2T,rms þ Γ2M,rms α ω0
LðΔωÞ ¼ 10Log , ð3Þ
PDC ηP 2QΔω
6 BAGHERI AND LI

" #
ηP Q
FoM ¼ 173:8dBc=Hz þ 10Log 2 , ð4Þ
ΓT,rms þ Γ2M,rms α

where K is Boltzmann's constant, T is the absolute temperature, ω0 is the oscillation frequency, α is a noise factor that
includes γ MOS and attenuation between tank and MOS gates, Γ M,rms and Γ T,rms are the rms values of ISF for active
devices and RT, Q is the tank quality factor, PDC is direct current (DC) power, Δω is the offset frequency, and ηP is
power efficiency defined as

PRF I RF V RF
ηP ¼ ¼ ¼ ηI ηV , ð5Þ
PDC I DC V DC

where IRF and VRF are the rms values of the fundamental components of current and voltage across RT also called volt-
age and current efficiency since DC voltage and current are converted to RF voltage and current, VDC and IDC are the
supply voltage and current. From 3, to improve the PN and FoM, one can play with Q, VRF, IRF, the rms ISFs, and α.

2.1 | Tank quality factor

There are two approaches to implementing the tank inductor: passive and active. The passive inductor is commonly
designed since the quality factor of a tank is nearly dominated by the inductor Q and the passive inductors available in
the technology files (libraries) usually have quality factors less than 10. The literature shows that the Q of the designed
passive inductors is virtually between 10 and 16.1–72 Note that if the tank Q is doubled, the PN is improved by 6 dB.
Active inductors have been an active area of research for many years.33,34 An active inductor based on gyrator-C net-
work is a promising candidate in the design of reconfigurable RF front-end blocks like oscillators. Oscillators based on
active inductors find applications in SerDes, frequency doublers, bandpass filters, and so on.35 Less area is consumed in
oscillators with an active inductor and wide tuning range in multi-standard Internet of Things (IoT) applications.
Oscillators that use a passive inductor to form the resonator network provide superior PN, but a limited tuning
range. By contrast, oscillators with active inductors are more power consuming than oscillators with passive inductors.
But they have a wide tuning range and a moderate PN. Power consumption can be minimized by a suitable choice of
active inductor topology.36,37,38 Nonetheless, in this paper, we only focus on evaluations in the oscillator core rather
than tank. Therefore, no discussion of active inductors is provided.

2.2 | Class D oscillators

Larger VRF gives lower PN as long as the active devices do not enter the triode region over an oscillation period. One
way to have large voltage swings across the tank is to use the voltage-biased oscillators, represented in Figure 6, but at
the cost of less current efficiency because the core transistors will enter the triode region. In this structure, the tail cur-
rent source is eliminated. Therefore, a source of PN is omitted. Notwithstanding, it gives rise to increasement of the sen-
sitivity to supply voltage.
Another way to have a large VRF is to exploit a Class D oscillator that resembles a voltage-biased oscillator, shown
in Figure 7.39 The differences between the Class D and the voltage-biased oscillator are rooted in this fact that the sizes
of the transistors are very large in the Class D oscillator to make the transistors as an ideal switch. The single-ended
maximum swing is nearly equal to 3 VDD. In Fanori and Andreani,39 the core transistors are considered ideal switches,
and their noises converted to PN are ignored, but the noise that the transistors inject into the tank should be consid-
ered.40 Besides, such oscillators suffer from high supply pushing and flicker PN corner.

2.3 | Class B oscillators

Another approach to increase the voltage efficiency (VRF) is to employ a class B oscillator as indicated in Figure 8A.41
Ideally, the class B oscillator can have a single-ended output swing equivalent to VDD, the first harmonic of the tank
BAGHERI AND LI 7

FIGURE 7 A Class D oscillator39 [Colour figure can be viewed at wileyonlinelibrary.com]

F I G U R E 8 A Class B oscillator (A) its topology, (B) its transistor current in the ideal condition, and (C) its transistor current in the real
condition41 [Colour figure can be viewed at wileyonlinelibrary.com]

current is (2/π) IDC, and the tank current looks like a square wave, shown in Figure 8B. Therefore, the voltage and cur-
rent efficiency are 1 and 2/π, respectively.
One drawback of this approach is that the tail transistor does not act as an ideal current source and requires a volt-
age to be dropped across its drain and source nodes to keep this transistor in the active region. Consequently, the
voltage and current efficiencies in the Class B oscillator are dropped to 0.8 and 1.57/π, respectively, as demonstrated in
Figure 8C. In this case, the core transistors enter the triode region, and there is a valley at the peak of the current,
which indicates that the shape of tank current is not like a square wave anymore. By augmenting the size of the tail
transistor, the voltage efficiency could be enhanced, but cause PN deterioration since gm is increased and PN is propor-
tional to gm in 1/f2 region.
8 BAGHERI AND LI

2.4 | Class C oscillators

To have a higher current efficiency (IRF), a Class C oscillator, presented in Figure 9, can be used since active devices are
more in the active region.
The topology of Class C is analogous to Class B with two differences. One difference is to bias the gate of switching
transistors separately, and another difference is to use a capacitor in the tail node. In Figure 9A the gates of the core
transistors are biased separately below VDD. The bias voltage Vbias is VDD/2. The current of transistor M1 is shown in
Figure 10A. As can be seen, there is still a valley in the current waveform, but it is less than that of the current wave-
form in Class B, as shown in Figure 8. In this case, the current efficiency is between 2/π and 1. This topology is not fully
a Class C oscillator since the cross-coupled transistors enter slightly the triode region, but they are prevented from
entering the deep triode, and PN is improved. Note that the capacitor in tail node in Figure 9A is the parasitic capacitor
and this capacitor is not deliberately implemented.
In Figure 9B, an additional large capacitor (Ctail) is purposely added in parallel to the tail current source along with
applying a voltage bias to the gates of the core transistors. The bias voltage Vbias is VDD/3. Contribution of the extra
capacitance Ctail and the bias voltage changes the drain current of M1 and M2, demonstrated in Figure 10B. The shape
of the current waveform looks like a tall and narrow pulse, which means that the conduction angle is reduced. In this
case, alleviation of flicker noise up-conversion is expected.42 Furthermore, the added capacitance can filter out the
high-frequency noise of the transistor current, which allows us to have a greater transistor current, thereby improving
the voltage efficiency.
Nonetheless, the Class C oscillator suffers from achieving the largest possible oscillation amplitude. There is a trade-
off between a robust start-up and the utmost achievable oscillation amplitude. At the start-up, the bias voltage should
be high enough to keep the current transistor in the active region, but when the oscillator reaches steady state, the
lower bias voltage would be enough. Also, as mentioned above, the cross-coupled transistors are not allowed to enter
the triode region. Consequently, it confines again the maximum achievable oscillation amplitude. To solve this issue,
dynamic bias Class C oscillators have been put forward in other studies,41,44,45 as exhibited in Figure 18. Although the
voltage efficiency is improved by the dynamic bias technique, the dynamic bias Class C oscillators are not still able to
reach the maximum achievable oscillation amplitude.

FIGURE 9 A class C oscillator (A) when Vbias is VDD/2 and (B) Vbias is VDD/341 [Colour figure can be viewed at wileyonlinelibrary.com]
BAGHERI AND LI 9

F I G U R E 1 0 The current of transistors related to (A) Figure 9A 43 and (B) Figure 9B32 [Colour figure can be viewed at
wileyonlinelibrary.com]

F I G U R E 1 1 A Class F oscillator (A) its schematic, (B) its ISF, and (C) its output voltage46 [Colour figure can be viewed at
wileyonlinelibrary.com]

2.5 | Class F oscillators

When it comes to Γ M,rms and Γ T,rms, ideally if the ISFs are zero, no noise is converted to PN. Hence, lower ISFs lead to
PN improvement. Reduction in ISFs occurs in Class F oscillators, presented in Figure 11A.46 Class F uses two tanks;
one is oscillated at ω0, and the other is oscillated at 3ω0, since a square waveform at the output is desirable. The idea is
to have an output waveform resembling a square wave to decrease PN. Two mechanisms will improve PN. First, it
is well known that non-normalized ISF can be obtained by9

•
!
q X
Γðt Þ ¼ ω0 max  • 2 , ð6Þ
C  !
X 
 

where Γ(t) is the ISF, X is a state variable that is the voltage across the tank capacitance, qmax  A0C is the maximum
dynamic charge across the tank capacitance (A0 being the oscillation amplitude), ω0 is the angular frequency of oscilla-
tion, X! is the first derivative of the state vector. We know the voltage waveform across the tank capacitor looks like a
square wave. This means that the first derivative of the square wave over the entire period when the waveform is flat is
10 BAGHERI AND LI

zero, as represented in Figure 11B. Even though the cross-coupled transistors are pushed deeply into the triode region
and inject significant noise into the tank during this interval, the ISF is zero and no noise is converted into PN.
The real output voltage of the Class F oscillator is shown in Figure 11C. As can be seen, because the waveform is
not quite a square wave, the ISF is not zero anymore, but the ISF is reduced. Another mechanism in the Class F oscilla-
tor resulting in PN improvement is due to increasing the oscillation zero-crossing slope. The reason why it can improve
PN is because the transistors are dissipating power for a shorter span. Thus, PN is improved for the sake of the
increasement of power efficiency.

2.6 | More on ISF reduction

α is proportional to the inverse of the voltage gain between tank and active devices. It can reduce the ISF effects since
its value is less than one, see 3. To gain better insight into how it can improve PN and FoM, 4 is rewritten as47

2ηp Q2
3
FoM ¼ 10 , ð7Þ
kTF

where F is 1 + βα, at which β is a constant that relates the current noise of the conductance with its instantaneous con-
ductance. The rest of parameters are already defined. As can be seen from 7, if α become small enough, F approaches
nearly one. Besides, from 4 the ISFs for active devices could be ineffective if α is small enough. Thus, α can play a very
important role in designing a high FoM and low PN LC oscillator. Once F in 7 is equal to one, optimum FoM becomes

FoM Opt ¼ 176:8 þ 20log10 Q: ð8Þ

From which only the noise of the tank from Figure 5 is converted to PN and the noise of the other elements are not
involved. Figure 12 (a) displays the conceptual way to change α. If K is 1, the gates of the core transistors are connected
to the tank by a wire, like the ones are shown in the Class B and C oscillators. K can also be less than one by utilizing a
transformer, as depicted in Figure 12B, while employing a transformer is an ordinary technique to change the α value,
making this factor very small is problematic because there is a trade-off between the maximum efficiency and reliability
issues for the active devices.47

FIGURE 12 (A) A conceptual way to apply α (B) using a transformer to implement α48
BAGHERI AND LI 11

3 | 1 / F 3 PN REGION

The analog section of transceivers must cope with the limitations imposed by the adoption of scaled CMOS processes.
One of these limitations is the increasing flicker noise corner frequency of minimum channel-length transistors. The
flicker noise (1/f) up-conversion becomes worse when the advance CMOS sub-micrometer technology is exploited.49
The flicker noise PN theory has not been developed, such as the thermal PN theory that has been studied since 1966,4
until the ISF was introduced by Hajimiri in 1998. The flicker noise (1/f3) corner frequency can be described by1
 
1 ΓEFF,dc
ω1=f 3 ≈ ω1=f , ð9Þ
2 ΓEFF,H1

where ω1/f is the 1/f noise corner frequency of a MOS transistor, and Γ EEF,dc and Γ EEF,H1 are the DC value and first har-
monic of effective ISF, respectively. ω1/f is the range of MHz in the advance CMOS technology, which is substantially
high for the 5G/6G wireless communication standard. On the other hand, as can be seen from 9, the 1/f3 can be, in
principle, zero if Γ EEF,dc becomes zero. Γ EEF,dc is the area under the effective ISF waveform. It can be zero if there is a
certain symmetry in the drain-source voltage waveform. For instance, this symmetry can be obtained in ring oscillators
by adding more delay stages.50 Nonetheless, the theory was quiet regarding LC-tank oscillators until Shahmohammadi
et al.51 showed in 2016 that the symmetry could be attained if the even harmonics of current were guided not to enter
the capacitive path rather than the resistive path in the tank.
Note that Shahmohammadi et al.51 wrongly claimed that odd harmonics of current did not have any influences on
the waveform asymmetry. This is because Shahmohammadi et al.51 just studied a special form of an LC oscillator that
was the Class B oscillator. Nevertheless, other studies2,49,52 had already shown in 2012 and 2013 that the odd harmonics
of current had effects on the waveform asymmetry in the form of harmonic distortion.
Nonetheless, even harmonics of current were not wrongly considered in other studies2,49,52 either. It was again
because the case study was another form of an LC oscillator that was the complementary cross-coupled voltage-biased
oscillator, illustrated in Figure 13. Later in 2020, Hu et al.53 demonstrate that both the odd and even harmonics of cur-
rent have effects on the 1/f noise up-conversion.
Surprisingly, however, the waveform symmetry is not the only method to suppress the 1/f noise up-conversion.53
The next sections discuss other techniques for suppressing the 1/f noise up-conversion.

FIGURE 13 The complementary cross-coupled voltage-biased oscillator used in Pepe et al.49

12 BAGHERI AND LI

3.1 | Methods for the flicker noise up-conversion reduction in current-biased LC-tank
oscillators

In the last two decades, extensive efforts have been devoted to understanding and minimizing mechanisms of
flicker noise up-conversion.20–49 Between 2000 and 2010, extensive studies on current-biased LC-tank oscillators,
where the tail current source controls the current of the switching transistors such as Class B and C oscillators,
have been undertaken since they show more promising robustness against process, voltage, and temperature
(PVT) variations. Four major up-conversion mechanisms have been identified so far for this type of oscillators,
namely,

1. Conversion of amplitude modulation (AM)-to-phase modulation (PM) due to non-linear varactors;

2. Modulation of the current flowing through the tail capacitance in a current-biased Voltage Control Oscillator (VCO)
topology;
3. Modulation of parasitic capacitances of the transconductor stage;
4. The Groszkowski effect, that is, modulation of the harmonic content of the output voltage waveform.

These mechanisms are discussed in the following sections.

3.1.1 | A bank of digitally controlled capacitors

The first up-conversion mechanism comes from conversion of amplitude modulation (AM)-to-phase modulation
(PM) owing to non-linear varactors.54–57 Fortunately, it has been well clarified and can be minimized by employing
smaller analog varactors for a finer frequency tuning and a bank of digitally controlled capacitors for a coarse tuning.
This can drastically reduce the AM-to-PM conversion owing to the non-linear capacitances, without impairing the over-
all VCO tuning range.58

3.1.2 | Eliminating tail current

The second up-conversion mechanism is rooted in modulation of the current flowing through the tail capacitance in a
current-biased oscillator topology,5960,61 and the third mechanism comes from modulation of parasitic capacitances of
the transconductor stage.62,63
The literature has investigated the second and third up-conversion mechanisms primarily from a qualitative per-
spective. No detailed quantitative explanation has been given yet in the literature. Furthermore, although being closely
related to each other, they have been studied independently, and no comparison has been provided showing which one
of these two effects is dominant in current-biased oscillators. Since the up-conversion cause is the presence of a tail
node oscillating at even harmonics, one possible solution is to resort to a voltage-biased topology, in which the tail cur-
rent source is eliminated, see Figure 6.3,42,57,58
Another solution is to adopt a tail LC resonant filter tuned at twice the oscillation frequency, as presented in
Figure 14.4764 The main drawback of this technique is the non-negligible silicon real-estate needed to integrate the filter
inductor. Note that a tuning mechanism is needed because the efficiency of this technique is highly sensitive to the var-
iation of oscillation frequency. This technique can introduce more noise if the oscillator has to cover a large frequency
band. Hence, it can eventually impair the effectiveness of this solution.

3.1.3 | Groszkowski effect

In 1933, Janusz Groszkowski noticed that the oscillation frequency in steady state did not perfectly match the
resonance frequency of the tank because the current high-frequency harmonics of the active elements flowed into
the low-impedance path, which is the tank capacitor, as signified in Figure 15.65 This phenomenon will increase
the tank's net capacitive reactive power. To sustain the oscillation, the tank's net inductive reactive power must
rise since the average reactive power delivered to the tank in one oscillation period should be zero. The oscillation
BAGHERI AND LI 13

FIGURE 14 An LC oscillator with a tail LC resonant filter47 [Colour figure can be viewed at wileyonlinelibrary.com]

frequency is automatically shifted to make the average power zero. Hence, to deliver the inductive power, the
current first harmonic of the tank should lag the voltage of the tank, see Figure 20. In Groszkowski,65 the
oscillation frequency was found to be

P
∞
V 2k
k¼1
ω20 ¼ ω2R P
∞ , ð10Þ
k 2 V 2k
k¼1

where ωR/(2π) is the tank resonance frequency and Vk is the amplitude of the kth voltage harmonic.

3.1.4 | Limiting oscillation amplitude

The last up-conversion mechanism is originated from the Groszkowski effect, that is, modulation of the harmonic con-
tent of the output voltage waveform.60,66–71 This mechanism, which has received much attention in the literature, can
result in PN degradation in oscillators. For instance, Vittoz et al.71 showed that the use of an automatic gain control
(AGC) circuit in a crystal oscillator to limit the amplitude of oscillation can reduce harmonic distortion. Margarit
et al.69 presented the same idea by using an AGC loop to reduce harmonic distortion and improve PN, as represented in
Figure 16.
Reduction of the device width of switching transistors, thereby increasing the overdrive voltage, in current-biased
oscillators to extend the linearity of the transistors was proposed in Jerng and Sodini.67 In this method, the harmonic
distortion is mitigated by taking advantage of improvement of PN from both the switching transistors and the flicker
noise up-conversion of the bias current.
Yun et al.68 portray another solution at which the sources of the switching transistors are degenerated by
damping resistors, represented in Figure 17, so as to suppress 1/f noise up-conversion and to linearize the
transconductor. The harmonic distortion, thereby the Groszkowski effect,65 is reduced. However, the excess gain,
thus start-up margin, is deteriorated since the overall transconductor, Gm, in Figure 17, changes from gm to
gm/(1 + gm. Rdamp), where gm is the transconductor of a transistor, and supposed that PMOS and NMOS have the
same transconductors.
14 BAGHERI AND LI

F I G U R E 1 5 The conceptual way to show the Groszkowski effect (A) current harmonics paths, (B) drain current in time and frequency
domains, and (C) frequency drift due to Groszkowski's effect51 [Colour figure can be viewed at wileyonlinelibrary.com]

3.2 | Methods for the flicker noise up-conversion reduction in voltage-biased LC-tank
oscillators

After 2010, the voltage-biased LC-tank oscillator, where the tail current source transistor is omitted, has become
extremely common among designers, see Figure 6. Although this topology is more sensitive to PVT, the 1/f noise
corresponding to the supply voltage can be suppressed by sizing the core transistors largely in the voltage regulator and
bandgap-reference.49 The tail transistor elimination can also improve linearity (Groszkowski effect65). In addition, this
topology can be used in the low-power applications since the headroom voltage is increased by removing the tail
transistor.
The four 1/f noise up-conversion mechanisms mentioned for the current-biased LC-tank oscillators are reduced to
two for the biased-voltage oscillators because the tail transistor is removed. This means that the mentioned second and
third noise up-conversion mechanisms do not need to be taken into account. The solutions provided for the first mecha-
nism are still valid for this type of oscillator. The last mechanism, that is, the Groszkowski effect, has been investigated
since 2012, and several solutions have already been provided.
BAGHERI AND LI 15

FIGURE 16 A VCO with AGC69

3.2.1 | Narrowing the conduction angle

72
first studied the Groszkowski effect on both Colpitts and the current-biased LC oscillators.72 provided two solutions
to reduce the Groszkowski effect: (1) using an inductor with high-quality factor in the tank and (2) narrowing the con-
duction angle; see Figure 10B. The first solution is obvious. The second one is not surprising given that a transistor cre-
ates noise only when it is ON. Therefore, the shorter a transistor is ON, the less noise it makes. Narrowing the
conduction angle means that the LC-tank oscillator is biased in Class C. Interestingly, Mazzanti and Andreani48 had
introduced the Class C oscillator in 2008; refer to Figure 9. Mazzanti and Andreani48 however, did not understand why
the 1/f3 PN region was improved. In 2013, other studies41,44,45 proposed a modified Class C oscillator to control the
oscillation amplitude, and all showed an improvement in the 1/f3 PN region, represented in Figure 18.
Recently, Narayanan et al.73 and Wang and Wang74 exploited the same idea to narrow the conduction angle by
adding two controlled switches under the switching transistors, as shown in Figure 19. Note that the current odd and
even harmonics are not guided to make the oscillation waveform symmetrical, as mentioned earlier.

3.2.2 | Adding resistors

The Groszkowski effect comes from the fact that the currents of switching transistors have harmonics. The first har-
monic is trapped in the resistive path of the tank. But the other high-frequency harmonics will take the low-impedance
path of the tank, which is the capacitive path. These high-frequency harmonics cause the tank reactive energy to
become higher than the tank inductive energy. This unbalanced tank energy must be compensated in order to sustain
the oscillation. Thus, the tank inductive energy must be increased. This will be done by shifting the resonance fre-
quency down as shown in 10. In other words, the tank current should be lagged with respect to the tank voltage. The
phasor plot in Figure 20 demonstrates this condition.52
Bonfanti et al.2 also depicts if the tank voltage in Figure 13 is A cos(ω0t), at where ω0 is the resonance frequency, the
ISF related to the switching transistors can be estimated mathematically by 1/2 cos(ω0t + π/2). Once this ISF is
16 BAGHERI AND LI

FIGURE 17 An LC oscillator with source damping resistors68

F I G U R E 1 8 A modified Class C oscillator provided in (A) Mazzanti and Andreani,44 (B) Fanori and Andreani,41 and (C) Deng et al.45
[Colour figure can be viewed at wileyonlinelibrary.com]

simulated, however, the result is somewhat different, as illustrated in Figure 21. As can be seen, there is a discrepancy
(φε) between the ideal ISF, calculated mathematically, and the simulated ISF. The simulated ISF slightly leads the ideal
ISF. Figure 20 shows this condition. This is why the estimated ISF should be amended as 1/2 cos(ω0t + π/2 + φε).
Moreover, it has already been proven that φε has the following relation with the excess gain (GX), which is the tran-
sconductor of the switching transistors:
BAGHERI AND LI 17

F I G U R E 1 9 A VCO uses the narrowing the conduction angle idea by the controlled switches in (A)73 and (B)74 [Colour figure can be
viewed at wileyonlinelibrary.com]

FIGURE 20 Phasor plot of the first harmonics of tank voltage, current, and its corresponding ISF52

GX
1
φε ≈ ð11Þ
4Q

At where Q is the tank quality factor and the excess gain is

G X ¼ gm R ð12Þ

And gm is

gm,n þ gm,p
gm ¼ : ð13Þ
2

To eliminate the error (φε), we need to decrease the excess gain or to increase the tank quality factor. Keep in mind that
the excess gain determines the non-linearity of the oscillator. In that case, the linearity of the oscillator should be
increased.
18 BAGHERI AND LI

FIGURE 21 Simulated and estimated ISF associated with the switching transistor in Figure 82

FIGURE 22 A complementary voltage-biased oscillator that resistors are added in the drains of transistors49

Pepe et al.49 showed that if resistors were added to the drains of complementary voltage-biased oscillator in
Figure 13, the flicker noise up-conversion due to harmonic distortion was suppressed, as depicted in Figure 22. Indeed,
in this technique, the start-up margin is not imposed like that of which resistors are added in the sources of the
switching transistors.

3.2.3 | Modifying tank

Another solution for suppressing the 1/f3 PN is to guide the tank-current odd and even harmonics to not take the capac-
itive paths, and unbalance the tank energy. There are two ways to achieve this goal. One way is to use a tail inductor
along with the decoupling capacitance, as exhibited in Figure 23.3,42,47,53 Note that only the tank-current second har-
monic is trapped; the other high-frequency harmonics still make the tank energy unbalanced.
BAGHERI AND LI 19

The other way is to use a tank, resonating at ω0, with auxiliary resonances at 2ω0, 3ω0, …, and so on. As the current
high-frequency harmonics are trapped in a resistive path, the tank energy will not be unbalanced, whereby there is a
symmetry in the oscillation waveform. Figure 24 displays the idea, at which the designed tank can resonate at ω0, 2ω0,
3ω0, and 4ω0.75

3.2.4 | Shifting phase of VGS against VDS

The last solution for mitigating 1/f3 PN, investigated so far, is to shift the phase of VGS against VDS.53 Figure 25 shows
this basic concept of this technique. When the peak of VGS is moved towards the sharper edges of VDS, the net area of
effective ISF becomes zero. Therefore, there is no up-conversion flicker noise to 1/f3 PN. El-Gouharyand Neihart76 and
Mazzanti and Bevilacqua77 use a transformer to take advantage of this idea, as exhibited in Figure 26.

4 | A COMP ARI S ON BETWEEN L I T E R A T UR E

Table 2 compares the oscillator performances presented in this paper. The most important parameters in an oscillator
are operation frequency, frequency offset, PN, power dissipation, tuning range, supply, technology file (process), tank
quality factor, and flicker PN corner frequency. It is impossible to embrace all the parameters of an oscillator with one
FoM. Four FoMs are used to meet that objective. The first FoM1 can capture the operation frequency, frequency offset,
PN, and power dissipation. Indeed, the oscillator performances in the 1/f2 PN region are evaluated by FoM1. It can be
defined by5:
   
f PDC
FoM 1 ¼
LðΔf Þ þ 20log 0
10log : ð14Þ
Δf 1mW

F I G U R E 2 3 The tail inductor technique not to allow the tank energy unbalanced in (A) n-MOS only and (B) complementary
oscillators53 [Colour figure can be viewed at wileyonlinelibrary.com]
20 BAGHERI AND LI

FIGURE 24 An oscillator with auxiliary resonances at 2ω0, 3ω0, and 4ω075

The second FoM2 can take into account not only FoM1 but also the tuning range. It still evaluates the 1/f2 PN region
and can be described by46
    
f0 TRð%Þ PDC
FoM 2 ¼
LðΔf Þ þ 20log
10log , ð15Þ
Δf 10 1mW

where TR is the tuning range expressed as percentage. The third FoM3 evaluates oscillator performances in 1/f3 PN
region. It can be defined as52
" ! #  
f0 TRð%Þ PDC
FoM 3 ¼
LðΔf m Þ þ 20log
10log , ð16Þ
f 1:5
m
10 1mW

where fm is a frequency offset from a carrier, which is usually less than 10 KHz. The four FoM4 is the most important
one since it can evaluate oscillator performances without affecting tank quality factor. As mentioned in Section 2, 8
gives the maximum FoMmax that can be obtained by an oscillator. In FoMmax, only the thermal noise of the tank is
converted to PN. Now, if we subtract FoM1 from FoMmax, the result evaluates the performance of oscillator core (active
elements) without the tank quality factor effect.
Here is an example to clarify this point. Imagine FoM1 of oscillator number one (OSC1) is 200 dBc/Hz whereas its
FoMmax is 250 dBc/Hz. Now, FoM1 and FoMmax of OSC2 are 190 dBc/Hz and 200 dBc/Hz, respectively. If the tank qual-
ity factor is not considered, it seems that OSC1 has a better performance. However, OSC2 has much better performance
given that FoM4,OSC2 is less than FoM4,OSC1. FoM4 can be given by32

FoM 4 ¼ ½176:8 þ 20log10 Q
FoM 1 : ð17Þ

BAGHERI AND LI 21

F I G U R E 2 5 The conceptual idea of moving the peak of VGS towards the sharper edges of VDS to mitigate 1/f3 PN (A) failing and
(B) rising edges of VDS53 [Colour figure can be viewed at wileyonlinelibrary.com]

FIGURE 26 A transformer-base oscillator used in (A)76 and (B)77 to shift the peak of VGS towards the sharper edges of VDS
 22

TABLE 2 A comparison between literature provided in this paper

Tank
Tuning 1/f3 PN quality FoM3
range Fre. VDD Power corner factor Process Phase noise FoM1 FoM2 (dBc/Hz) FoM4
Ref. Topology Figure (%) (GHz) (V) (mW) (KHz) (Q) (nm) (dBc/Hz) (dBc/Hz) (dBc/Hz) @ 10KHz (dB)
39
Class D 7 46 3 0.5 14 800 14 65
152 @ 10 MHz 190 203 ≈153 9.7
29
Class B 8 15 2.9 2 16 100 13 350
142 @ 3 MHz 189 192.5 ≈145 10
48
Class C 9 13 4.9 1 1.4 200 16 130
130 @ 3 MHz 194 196.2 ≈144 6.8
46
Class F 11 25 3.7 1.25 15 300 16 65
142.2 @ 3 MHz 192.2 200.2 NA 8.6
48
Class C with K 12B 10 4.5 1 1.3 200 16 130
132 @ 3 MHz 196 196 ≈144 4.8
block
49
Complementary 13 18.2 3.3 1.2 0.72 NA 10 65
114 @ 1 MHz 186 191.2 ≈140 10.8
voltage-biased
47
Tail inductor 14 27.2 2.85 0.9 6.6 200 10 28
139.7 @ 3 MHz 192 200.7 ≈140.8 4.8
68
Resistor in source 17 NA 2.2 1.8 18.54 NA NA 180
122 @ 1 MHz 176 NA NA NA
51
Modified tank 15 31 3.3 0.5 4.1 60 12 40
123.4 @ 1 MHz 187.6 197.4 ≈147.8 10.7
(Class-D/F2)
resonating @
ω0 and 2ω0
44
Modified Class C 18A 10 6.09 1.8 2.16 200 10 180
120 @ 2 MHz 189 195.3 ≈140 7.8
41
Modified Class C 18B 28 3.4 1.2 6.6 ≈600 13 90
127 @ 1 MHz 191 199.9 NA 8
74
Narrowing 19B 18.6 2.05 1.2 2.53 32 15 130
132.46 @ 1 MHz 194.7 200 ≈154.4 5.6
conduction
angle (Class C)
49
Resistor in drain 22 18.2 3.3 1.2 0.72 ≈70 10 65
114 @ 1 MHz 186 200.7 ≈141.1 10.8
3
Modified tank 23 14 27.3 1 12 120 10 28
106 @ 1 MHz 184 187 ≈133.7 12.8
+ Class C
+ guiding 2nd
harmonic
75
Modified tank 24 15.7 14.2 0.55 6.6 550 NA 65
114.7 @ 1 MHz 189.5 193.5 ≈130.8 NA
resonating @
ω0, 2ω0, 3ω0,
and 4ω0
BAGHERI AND LI
BAGHERI AND LI 23

Note that tuning range should not be considered. As can be seen in Table 2, the Class C oscillators especially with the
K block or the narrowing conduction angle have a great performance in 1/f2 PN region among the other oscillators
since the core transistors do not enter the triode region and it is reflected with the high FoM1. The class D oscillator has
the best FoM2. The main reason is that it has a very large tuning range, which is not due to a great performance of the
oscillator core. For the same reason, the Class D has a good FoM3. However, the modified tank (Class-D/F2) and the
narrowing conduction angle have the best FoM3 that is related to 1/f3 PN region.
The primary reason for the modified tank (Class-D/F2) having the greatest 1/f3 PN corner frequency is that the tank
is modified and resonates at ω0 and 2ω0. The modified tank, in turn, prevents the tank's energy from becoming unbal-
anced. Note that the narrowing conduction angle has a smaller 1/f3 PN corner frequency because it is implemented in
the bigger technology file. The tail inductor oscillator and Class C oscillator with the K block have the best topology
without the tank quality factor effect in 1/f2 PN region since they have the smaller FoM4.
To summarize, we conclude an LC-tank oscillator can reach the best performances in 1/f3 and 1/f2 PN regions if the
oscillator is designed in Class C with the K block and uses the techniques of narrowing conduction angle, the tail induc-
tor, and the modified tank simultaneously.

5 | C ON C L U S I ON

This paper provides a comprehensive study of PN mitigation in LC-tank oscillators. Colpitts and cross-coupled oscilla-
tors are the two common topologies among LC-tank oscillators. We choose the latter to show its topology evolution
with respect to PN performance since it has a better PN performance than the former. To this end, the Hajimiri model
is preferred between two accepted phase-noise models for oscillators because it offers designers better insight into the
design of a low-PN oscillator. With the help of this model, we discuss 1/f2 and 1/f3 PN regions for the different evolved
topologies and introduce Class B, C, D, and F oscillators. For mitigating 1/f2 PN region, we present several methods,
ranging from rising IRF and VRF, and minimizing Γ M,rms and Γ T,rms. We also analyze 1/f3 phase-noise region, and a few
techniques are suggested to diminish flicker noise up-conversion. These techniques are rising linearity, adding resis-
tances, controlling the oscillation amplitude, decreasing the conduction angle, guiding the high-frequency harmonics of
current, and shifting the phase of VGS against VDS.
Finally, a comparison between literature is presented, and it is concluded that an LC-tank oscillator can reach the
best performances in 1/f3 and 1/f2 PN regions if the oscillator is designed in Class C with the K block and uses the tech-
niques of narrowing conduction angle, the tail inductor, and the modified tank simultaneously.

DATA AVAILABILITY STATEMENT

Data sharing is not applicable to this article as no new data were created or analyzed in this study.

ORCID
Mohammad Bagheri https://orcid.org/0000-0001-5575-0691

R EF E RE N C E S
1. Hajimiri A, Lee TH. A general theory of phase noise in electrical oscillators. IEEE J Solid State Circuits. 1998;33(2):179-194. https://doi.
org/10.1109/4.658619
2. Bonfanti A, Pepe F, Samori C, Lacaita AL. Flicker noise up-conversion due to harmonic distortion in Van der Pol CMOS oscillators.
IEEE Trans Circuits Syst I: Reg Papers. 2012;59(7):1418-1430. https://doi.org/10.1109/TCSI.2011.2177132
3. Hu Y, Siriburanon T, Staszewski RB. A low-flicker-noise 30-GHz class-F23 oscillator in 28-nm CMOS using implicit resonance and
explicit common-mode return path. IEEE J Solid State Circuits. 2018;53(7):1977-1987. https://doi.org/10.1109/JSSC.2018.2818681
4. Leeson DB. A simple model of feedback oscillator noise spectrum. Proc IEEE. 1966;54(2):329-330. https://doi.org/10.1109/PROC.1966.
4682
5. Bagheri M, Li X. A modified cross-coupled oscillator. Microsyst Technol. 2020;27(5):1-12. https://doi.org/10.1007/s00542-020-05062-7
6. Bagheri M, Li X. Phase noise analysis of a modified cross coupled oscillator. In: 2020 17th International Conference on Electrical
Engineering, Computing Science and Automatic Control (CCE). IEEE; 2020:1–4.
7. Kaertner FX. Determination of the correlation spectrum of oscillators with low noise. IEEE Trans Microw Theory Tech. 1989;37(1):
90-101. https://doi.org/10.1109/22.20024
8. Demir A, Mehrotra A, Roychowdhury J. Phase noise in oscillators: a unifying theory and numerical methods for characterization. IEEE
Trans Circuits Syst I: Fundam Theory Appl. 2000;47(5):655-674. https://doi.org/10.1109/81.847872
24 BAGHERI AND LI

9. Pepe F, Andreani P. An experimental comparison between two widely adopted phase noise models. NORCAS 2016—2nd IEEE NORCAS
Conference. Institute of Electrical and Electronics Engineers Inc.; 2016. https://doi.org/10.1109/NORCHIP.2016.7792924
10. Lai X, Roychowdhury J. Capturing oscillator injection locking via nonlinear phase-domain macromodels. IEEE Trans Microw Theory
Tech. 2004;52(9):2251-2261. https://doi.org/10.1109/TMTT.2004.834579
11. Bagheri M, Ghanaatian A, Abrishamifar A, Kamarei M. A cross coupled low phase noise oscillator using an output swing enhancement
technique. Microelectron J. 2014;45(8):1008-1013. https://doi.org/10.1016/j.mejo.2014.04.018
12. Chlis I, Pepe D, Zito D. Comparative analyses of phase noise in 28nm CMOS LC oscillator circuit topologies: Hartley, Colpitts, and
common-source cross-coupled differential pair. Sci World J. 2014:1-13. https://doi.org/10.1155/2014/421321
13. Chlis I, Pepe D, Zito D. Analyses and techniques for phase noise reduction in CMOS Colpitts oscillator topology. Int J Circuit Theory
Appl. 2016;44(3):616-638. https://doi.org/10.1002/cta.2097
14. Chlis I, Pepe D, Zito D. Analyses and techniques for phase noise reduction in CMOS Hartley oscillator topology. Int J Circuit Theory
Appl. 2017;45(12):1993-2016. https://doi.org/10.1002/cta.2334
15. Dickson TO, Voinigescu SP. SiGe BiCMOS topologies for low-voltage millimeter-wave voltage controlled oscillators and frequency
dividers. In: 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems—Digest of Papers. 2006:273–276.
16. Fiorelli R, Peralías EJ, Silveira F. LC-VCO design optimization methodology based on the gm/I D ratio for nanometer CMOS technolo-
gies. IEEE Trans Microw Theory Tech. 2011;59(7):1822-1831. https://doi.org/10.1109/TMTT.2011.2132735
17. Cabrera D, Begueret J, Mazouffre O, Tesson O, Gamand P. Analysis and design of LC oscillators associated with frequency multipliers: a
phase noise perspective. Int J Circuit Theory Appl. 2017;45(12):2017-2033. https://doi.org/10.1002/cta.2369
18. Chen Y, Liu YH, Zong Z, et al. A supply pushing reduction technique for LC oscillators based on ripple replication and cancellation.
IEEE J Solid State Circuits. 2019;54(1):240-252. https://doi.org/10.1109/JSSC.2018.2871195
19. Kuo YF, Wu YP, Liu YC. A Ku-band voltage-controlled oscillator equipped with a compact enhanced linearity tuning converter. IEEE
Microw Wirel Compon Lett. 2021;31(2):181-183. https://doi.org/10.1109/LMWC.2020.3036127
20. Jha A, Yelleswarapu P, Liao K, Yeap G, Kenneth KO. Approaches to area efficient high-performance voltage-controlled oscillators in
nanoscale CMOS. IEEE Trans Microw Theory Tech. 2021;69(1):147-156. https://doi.org/10.1109/TMTT.2020.3032721
21. Basaligheh A, Saffari P, Filanovsky IM, Moez K. A 65–81 GHz CMOS dual-mode VCO using high quality factor transformer-based
inductors. IEEE Trans Circuits Syst I: Reg Papers. 2020;67(12):4533-4543. https://doi.org/10.1109/TCSI.2020.3004859
22. Gui X, Tang B, Tang R, Li D, Geng L. Low-supply sensitivity LC VCOs with complementary varactors. IEEE Trans Very Large Scale
Integr (VLSI) Syst. 2020;28(7):1589-1599. https://doi.org/10.1109/TVLSI.2020.2991765
23. Fang M, Yoshimasu T. A
197.3-dBc/Hz FoMT Wideband LC-VCO IC with a single voltage-controlled IMOS-based novel varactor in
40-nm CMOS SOI. IEEE Trans Microw Theory Tech. 2020;68(10):4116-4121. https://doi.org/10.1109/TMTT.2020.2990441
24. Zong Z, Mangraviti G, Wambacq P. Low 1/f3 noise corner LC-VCO design using flicker noise filtering technique in 22 nm FD-SOI. IEEE
Trans Circuits Syst I: Reg Papers. 2020;67(5):1469-1480. https://doi.org/10.1109/TCSI.2020.2970267
25. Lee HS, Kang DM, Cho SJ, Byeon CW, Park CS. Low-power, low-phase-noise Gm-boosted 10-GHz VCO with center-tap transformer
and stacked transistor. IEEE Trans Circuits Syst II: Express Briefs. 2020;67(10):1710-1714. https://doi.org/10.1109/TCSII.2019.2945123
26. Amirabadi A, Zokaei A, Bagheri M, Alirezazadeh F. Highly linear wide-band differential LNA using active feedback as post distortion.
Proceedings—IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc.; 2015:
654-657.
27. Bagheri A, Bagheri M, Lorestani A. Optimal reconfiguration and DG integration in distribution networks considering switching actions
costs using tabu search algorithm. J Ambient Intell Humaniz Comput. 2020;12(7):1-20. https://doi.org/10.1007/s12652-020-02511-z
28. Bagheri A, Bidgoli MA, Bagheri M. Efficiency improvment of Toyota Prius Power Train using a 3 level NPC and selected harmonic
elimination technique. In: 34th International Power System Conference, PSC 2019. Institute of Electrical and Electronics Engineers Inc.;
2019:374–379.
29. Andreani P, Wang X, Vandi L, Fard A. A study of phase noise in colpitts and LC-tank CMOS oscillators. IEEE J Solid State Circuits.
2005;40(5):1107-1118. https://doi.org/10.1109/JSSC.2005.845991
30. Hemmati MJ, Dehghani R. Analysis and review of main characteristics of Colpitts oscillators. Int J Circuit Theory Appl. 2021;49(5):
1285-1306.
31. Cheng KW, Chang SK, Huang YC. Low-power and low-phase-noise gm-enhanced current-reuse differential Colpitts VCO. IEEE Trans
Circuits Syst II: Express Briefs. 2019;66(5):733-737. https://doi.org/10.1109/TCSII.2019.2908423
32. Garampazzi M, Dal Toso S, Liscidini A, et al. An intuitive analysis of phase noise fundamental limits suitable for benchmarking LC
oscillators. IEEE J Solid State Circuits. 2014;49(3):635-645. https://doi.org/10.1109/JSSC.2014.2301760
33. Razavi B. The active inductor [a circuit for all seasons]. IEEE Solid-State Circuits Magazine. 2020;12(2):7-11. https://doi.org/10.1109/
MSSC.2020.2987500
34. Leoni A, Stornelli V, Pantoli L, Leuzzi G, Marinkovic Z. RF active inductors small-signal design by means of conformal transformations.
IEEE Access. 2020;8:50390-50398. https://doi.org/10.1109/ACCESS.2020.2980209
35. Bagheri M, Amirabadi A, Zokaei A, Kamarei M, Pour DS. A new oscillator with ultra low phase noise and high output swing. In: 2014
International Conference on Numerical Electromagnetic Modeling and Optimization for RF, Microwave, and Terahertz Applications,
NEMO 2014. Institute of Electrical and Electronics Engineers Inc.; 2014. https://doi.org/10.1109/NEMO.2014.6995685
36. Pepe D, Chlis I, Zito D. 50 GHz active-LC CMOS oscillator: rheoretical study and experimental proofs. Radio Sci. 2017;52(9):1117-1128.
https://doi.org/10.1002/2016RS006019
BAGHERI AND LI 25

37. Zito D, Pepe D, Fonte A. 13 GHz CMOS active inductor LC VCO. IEEE Microw Wirel Compon Lett. 2012;22(3):138-140. https://doi.org/
10.1109/LMWC.2012.2183633
38. Zito D, Pepe D, Fonte A. High-frequency CMOS active inductor: design methodology and noise analysis. IEEE Trans Very Large Scale
Integr (VLSI) Syst. 2015;23(6):1123-1136. https://doi.org/10.1109/TVLSI.2014.2332277
39. Fanori L, Andreani P. Class-D CMOS oscillators. IEEE J Solid State Circuits. 2013;48(12):3105-3119. https://doi.org/10.1109/JSSC.2013.
2271531
40. Pepe F, Bevilacqua A, Andreani P. On the remarkable performance of the series-resonance CMOS oscillator. IEEE Trans Circuits Syst I:
Reg Papers. 2018;65(2):531-542. https://doi.org/10.1109/TCSI.2017.2727283
41. Fanori L, Andreani P. Highly efficient class-C CMOS VCOs, including a comparison with class-B VCOs. IEEE J Solid State Circuits.
2013;48(7):1730-1740. https://doi.org/10.1109/JSSC.2013.2253402
42. Hu Y, Siriburanon T, Staszewski RB. Intuitive understanding of flicker noise reduction via narrowing of conduction angle in
voltage-biased oscillators. IEEE Trans Circuits Syst II: Express Briefs. 2019;66(12):1962-1966. https://doi.org/10.1109/TCSII.2019.2896483
43. Babaie M, Staszewski RB. An ultra-low phase noise class-F 2 CMOS oscillator with 191 dBc/Hz FoM and long-term reliability. IEEE J
Solid State Circuits. 2015;50(3):679-692. https://doi.org/10.1109/JSSC.2014.2379265
44. Mazzanti A, Andreani P. A push-pull class-C CMOS VCO. IEEE J Solid State Circuits. 2013;48(3):724-732. https://doi.org/10.1109/JSSC.
2012.2230542
45. Deng W, Okada K, Matsuzawa A. Class-C VCO with amplitude feedback loop for robust start-up and enhanced oscillation swing. IEEE J
Solid State Circuits. 2013;48(2):429-440. https://doi.org/10.1109/JSSC.2012.2227603
46. Babaie M, Staszewski RB. A class-F CMOS oscillator. IEEE J Solid State Circuits. 2013;48(12):3120-3133. https://doi.org/10.1109/JSSC.
2013.2273823
47. Murphy D, Darabi H, Wu H. Implicit common-mode resonance in LC oscillators. IEEE J Solid State Circuits. 2017;52(3):812-821. https://
doi.org/10.1109/JSSC.2016.2642207
48. Mazzanti A, Andreani P. Class-C harmonic CMOS VCOs, with a general result on phase noise. IEEE J Solid State Circuits. 2008;43(12):
2716-2729.
49. Pepe F, Bonfanti A, Levantino S, Samori C, Lacaita AL. Suppression of flicker noise up-conversion in a 65-nm CMOS VCO in the
3.0-to-3.6 GHz Band. IEEE J Solid State Circuits. 2013;48(10):2375-2389. https://doi.org/10.1109/JSSC.2013.2273181
50. Hajimiri A, Limotyrakis S, Lee TH. Jitter and phase noise in ring oscillators. IEEE J Solid State Circuits. 1999;34(6):790-804. https://doi.
org/10.1109/4.766813
51. Shahmohammadi M, Babaie M, Staszewski RB. A 1/f noise upconversion reduction technique for voltage-biased RF CMOS oscillators.
IEEE J Solid State Circuits. 2016;51(11):2610-2624. https://doi.org/10.1109/JSSC.2016.2602214
52. Pepe F, Bonfanti A, Levantino S, Samori C, Lacaita AL. Analysis and minimization of flicker noise up-conversion in voltage-biased
oscillators. IEEE Trans Microw Theory Tech. 2013;61(6):2382-2394. https://doi.org/10.1109/TMTT.2013.2259257
53. Hu Y, Siriburanon T, Staszewski RB. Oscillator flicker phase noise: a tutorial. IEEE Trans Circuits Syst II: Express Briefs. 2020;68(2):538-
544. https://doi.org/10.1109/TCSII.2020.3043165
54. Hegazi E, Abidi AA. Varactor characteristics, oscillator tuning curves, and AM-FM co0nversion. IEEE J Solid State Circuits. 2003;38(6):
1033-1039. https://doi.org/10.1109/JSSC.2003.811968
55. Bonfanti A, Levantino S, Samori C, Lacaita AL. A varactor configuration minimizing the amplitude-to-phase noise conversion in VCOs.
IEEE Trans Circuits Syst I: Reg Papers. 2006;53(3):481-488. https://doi.org/10.1109/TCSI.2005.858764
56. Levantino S, Samori C, Zanchi A, Lacaita AL. AM-to-PM conversion in varactor-tuned oscillators. IEEE Trans Circuits Syst II: Analog
Digit Signal Process. 2002;49(7):509-513. https://doi.org/10.1109/TCSII.2002.804051
57. Levantino S, Samori C, Bonfanti A, Gierkink SLJ, Lacaita AL, Boccuzzi V. Frequency dependence on bias current in 5-GHz CMOS
VCOs: impact on tuning range and flicker noise upconversion. IEEE J Solid State Circuits. 2002;37(8):1003-1011. https://doi.org/10.1109/
JSSC.2002.800969
58. Kral, A., Behbahani F, Abidi AA. RF-CMOS oscillators with switched tuning. In: Proceedings of the Custom Integrated Circuits Confer-
ence. IEEE; 1998:555-558.
59. Ismail A, Abidi AA. CMOS differential LC oscillator with suppressed up-converted flicker noise. Digest of Technical Papers—IEEE Inter-
national Solid-State Circuits Conference; 2003. https://doi.org/10.1109/isscc.2003.1234224
60. Tchamov NN, Tchamov NT. Technique for flicker noise up-conversion suppression in differential LC oscillators. IEEE Trans Circuits
Syst II: Express Briefs. 2007;54(11):959-963. https://doi.org/10.1109/TCSII.2007.904135
61. Rael JJ, Abidi AA. Physical processes of phase noise in differential LC oscillators. In: Proceedings of the Custom Integrated Circuits
Conference. IEEE; 2000:569-572.
62. Soltanian B, Kinget P. AM-FM conversion by the active devices in MOS LC-VCOs and its effect on the optimal amplitude. In: Digest of
Papers—IEEE Radio Frequency Integrated Circuits Symposium. 2006:105–108.
63. Koukab A. Reactive power imbalances in LC VCOs and their influence on phase-noise mechanisms. IEEE Trans Microw Theory Tech.
2011;59(12) PART 1:3118-3128. https://doi.org/10.1109/TMTT.2011.2169496
64. Hegazi E, Sjöland H, Abidi AA. A filtering technique to lower LC oscillator phase noise. IEEE J Solid State Circuits. 2001;36(12):
1921-1930. https://doi.org/10.1109/4.972142
65. Groszkowski J. The interdependence of frequency variation and harmonic content, and the problem of constant-frequency oscillators.
Proceedings of the Institute of Radio Engineers. 1933;21(7):958-981. https://doi.org/10.1109/JRPROC.1933.227821
26 BAGHERI AND LI

66. Boon CC, Do MA, Yeo KS, Ma JG, Zhang XL. RF CMOS low-phase-noise LC oscillator through memory reduction tail transistor. IEEE
Trans Circuits Syst II Express Briefs. 2004;51:85-90.
67. Jerng A, Sodini CG. The impact of device type and sizing on phase noise mechanisms. IEEE J Solid State Circuits. 2005;40(2):360-369.
https://doi.org/10.1109/JSSC.2004.841035
68. Yun SJ, Cha CY, Choi HC, Lee SG. RF CMOS LC-Oscillator with source damping resistors. IEEE Microw Wirel Compon Lett. 2006;16(9):
511-513. https://doi.org/10.1109/LMWC.2006.880700
69. Margarit MA, Tham JL, Meyer RG, Deen MJ. Low-noise, low-power VCO with automatic amplitude control for wireless applications.
IEEE J Solid State Circuits. 1999;34(6):761-771. https://doi.org/10.1109/4.766810
70. Wu W, Yao CW, Godbole K, et al. A 28-nm 75-fs rms analog fractional-N sampling PLL with a highly linear DTC incorporating
background DTC gain calibration and reference clock duty cycle correction. IEEE J Solid State Circuits. 2019;54(5):1254-1265. https://
doi.org/10.1109/JSSC.2019.2899726
71. Vittoz EA, Degrauwe MGR, Bitz S. High-performance crystal oscillator circuits: theory and application. IEEE J Solid State Circuits. 1988;
23(3):774-783. https://doi.org/10.1109/4.318
72. Bevilacqua A, Andreani P. An analysis of 1/f noise to phase noise conversion in CMOS harmonic oscillators. IEEE Trans Circuits Syst I:
Reg Papers. 2012;59(5):938-945. https://doi.org/10.1109/TCSI.2012.2190564
73. Narayanan AT, Li N, Okada K, Matsuzawa A. A pulse-tail-feedback VCO achieving FoM of 195 dBc/Hz with flicker noise corner of
700 Hz. IEEE Symposium on VLSI Circuits, Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc.; 2017:
124–125.
74. Wang F, Wang H. A noise circulating oscillator. IEEE J Solid State Circuits. 2019;54(3):696-708. https://doi.org/10.1109/JSSC.2018.
2886321
75. Guo H, Chen Y, Mak P-I, Martins RP. A 0.083-mm2 25.2-to-29.5 GHz multi-LC-tank class-F234 VCO with a 189.6-dBc/Hz FOM. IEEE
Solid-State Circuits Lett. 2018;1(4):86-89. https://doi.org/10.1109/lssc.2018.2851499
76. El-Gouhary A, Neihart NM. An analysis of phase noise in transformer-based dual-tank oscillators. IEEE Trans Circuits Syst I: Reg Papers.
2014;61(7):2098-2109. https://doi.org/10.1109/TCSI.2014.2298276
77. Mazzanti A, Bevilacqua A. On the phase noise performance of transformer-based CMOS differential-pair harmonic oscillators. IEEE
Trans Circuits Syst I: Reg Papers. 2015;62(9):2334-2341. https://doi.org/10.1109/TCSI.2015.2451915

How to cite this article: Bagheri M, Li X. Phase noise suppression in LC oscillators: Tutorial. Int J Circ Theor
Appl. 2021;1-26. https://doi.org/10.1002/cta.3097