Nile University of Nigeria Faculty of Natural and Applied Sciences eer Department of Computer Science 202 Code: CSC 307 Title: Computer Architecture - Midterm Examination 40 Minutes Steno: |) A) 103 0°93 > Inc ns Yor Bose an ate Atco 3 «For every question answered, write a brief fustiication Inthe space Prov! GO, eg —— Question 1 | Change in from the of vaguur tube to transistors change in whet 2 2 Architecture, GXOsganization _¢. Structure __. functions The macKibeteures SF att generation Ob bemputers ore. che Sanit, ee the tmplen ental: or Of the architectyre ip iidippeentE Corganisatien) : > _ | Which ofthe component of the computer make the computer a structure + . 2._CPU._b.Memory ¢./0__@)system Interconnection > Basten inberconney boon areas ge me ene 1 reans aE Caommunrakion between Ene adept individual Com ponents iis . ! 5 | Anarchitecturalafference between the ¥° and Be generation computer is ‘smaller size _b. Multiarocessing _¢. high level language support ; Trere i> no arc hitecturek 4G ond aad wR [te 7 gad 3 generations are based cn semiconductors, which of the two uses 4 | component rr 3% «, both @none Saat eee Qeneactan, deeeolG 4 conductors . % computing there is an improvement in the processing semi From 37 to 4” generation in the CPU va. True (False _c. cannot be decided ‘lative execution is a method ust prougl. combination of. ‘bata flow analysts and pipelining b. Branch prediction and Supers execution Gatatiow analysis and Branch Prediction <. Speculative\ycedetion and lative analysisexeculien Combines beth branch erediatio} Bpecvlalire be create an optimized and dakeaplow analysis Stream OF insbevctions be. be execubed. "There is need Performance balance among components of the computer L @ Tre _b. False “ppt components of the © Ae wUtitreren® Specds Cet cakes dy bo baleice pecpermante te Pie Ver Tn pu ker ee myo we there is need cpu idle Lime Oo ‘Mention any problem hindering increasing clock speed in smaller devices ANS, {5 (Wenton any arategy used toi ove chip architecture and organization ans | tar e® | a a ee eee ena i © ANS: Memery Latency % I cach’s trek ae ecet HE precesser oae fi Boman menos Ne eeres bemed TTahicare ayer ae ured To WapYOWS procelsing In computers However, mention £ 2 stom e z | |atrorees Making pregram oe ion é to cake advantage of mulls ple oe \ in instruction execution? Takes instrectivas io pabehes in execvecs them sequentially 2 ‘categories can be carried out without t Which action from the a involved mg | PHTEEE Mermory Recess edstle Ex ale TO om be Main mem/ bY 9. 13 _| Mention one way to solve the issue of multiple interrupt ans, By dichling interrupts once handled. Currently75 __| Mention benefit of Bus Interconnect'an over P2P. Cheaper to imp Qnene “Wihich of the category of system bus interconnection deed yetumn data to the CPU 36 | "BP outa G)icontrole. Address _d.none S Bae Sn eon ee Contret lipmes move ae signals “Airrsses of memory (sets) Lines eave ia 2 Address ‘Mention ane important similarity between Sequential and Direct methods of memory e [io [Sc . Rock SEageqcial ea decmcem acoete metre ‘ ee ea variable T i sadomiy accessed memory as 8 method of access \ eA epee nce 78] Mention One similarity Between alla ee ae eee ae ee ecaitet seece dt. _ es po GEIST ST BE —— Boas Spwthe pycpeatds spate, SS ce wun ve COsk increases ae : pa rest Zo_ustify the need for caching seater Pe Ai aero Caching 3 as \GGiwinate pretesson idte Preventing frequent acts he main memory: “Wihich of the mapping functions is unrealistic to implement Be i Direc! cache site ster Ke & bala having is the primary challenge with increas Teging ving the speed 2F CPA Rive msitiary, Ue: SECS) 3_| Why the need for replacement algorithm, SS NCRE He fat TE Ae eds PEPE he block that iz leace processor) in ONC em feterone by the beock:Justification damental similarity between RAM and ROM memories RAM ard Rom are beth vem yendocte Memories > besed _onming code used for Homan in Cede i5 used por erete AEE Kereor has been dekecke cor rection stific ti = RAM suitable for main memory over SRAM Becase the ORAM io Cheaper than the SRAM =a we ess Va «one benefit of multi zoned layout over constant } Fen © real overall storage eneiis ERI Tver zm eis of reso" i a ceien needed Keee> en Exaek LOPS wi thes come lee* “sored inform of on, part of mmagneie Signebyt on disk placer scovwonta bonus mark (Yes of No) justify why you! ‘deserve it Ait se jpece@e IE* are A 9 Geccucee whe © pind enough Ee