Realtek AMB82 Mini DATASHEET
Realtek AMB82 Mini DATASHEET
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RTL8735BDM-VA3-CG
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RTL8735BM-VA3-CG
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RTL8735BDM-VL3-CG RTL8735BM-VL3-CG
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RTL8735BDM-VA4-CG RTL8735BM-VA4-CG
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RTL8735BDM-VL4-CG RTL8735BM-VL4-CG
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AmebaPro-II
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Camera SoC
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DATASHEET
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2022
AmebaPro-II
Datasheet
TRADEMARKS
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Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this document
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This document is intended for the software engineer’s reference and provides detailed programming
information.
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Though every effort has been made to ensure that this document is current and accurate, more information
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This product can be damaged by Electrostatic Discharge (ESD). When handling, care must be taken.
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Do not open the protective conductive packaging until you have read the following, and are at an approved
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anti-static workstation.
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Always discharge yourself by touching a grounded bare metal surface or approved anti-static mat
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If working on a prototyping board, use a soldering iron or station that is marked as ESD-safe
Always disconnect the microcontroller from the prototyping board when it is being worked on
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REVISION HISTORY
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Table of Contents
1. GENERAL DESCRIPTION................................................................................................................................................ 1
2. FEATURES........................................................................................................................................................................... 2
3. BLOCK DIAGRAM............................................................................................................................................................. 4
3.1. POWER ARCHITECTURE ...................................................................................................................................... 5
3.1.1. AmebaPro-II Regulator Architecture ................................................................................................................ 5
3.1.2. Shutdown Mode ................................................................................................................................................. 6
3.1.3. Deep Sleep Mode ............................................................................................................................................... 7
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6. RF CHARACTERISTICS .................................................................................................................................................24
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List of Tables
TABLE 1. DEEP SLEEP MODE WAKEUP SOURCE ............................................................................................................................ 7
TABLE 2. STANDBY MODE WAKEUP SOURCE................................................................................................................................ 8
TABLE 3. SLEEP MODE WAKEUP SOURCE ..................................................................................................................................... 9
TABLE 4. POWER ON TRAP PINS .................................................................................................................................................. 12
TABLE 5. ADC PINS .................................................................................................................................................................... 12
TABLE 6. RF PINS ........................................................................................................................................................................ 13
TABLE 7. POWER PINS ................................................................................................................................................................. 13
TABLE 8. CLOCK AND OTHER PINS .............................................................................................................................................. 14
TABLE 9. CHIP ENABLE PIN .........................................................................................................................................................14
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List of Figures
FIGURE 1. BLOCK DIAGRAM OF AMEBAPRO-II.............................................................................................................................. 4
FIGURE 2. AMEBAPRO-II REGULATOR ARCHITECTURE ................................................................................................................. 5
FIGURE 3. POWER DIAGRAM OF SHUTDOWN MODE ...................................................................................................................... 6
FIGURE 4. DIAGRAM OF DEEP SLEEP MODE .................................................................................................................................. 7
FIGURE 5. POWER DIAGRAM OF STANDBY MODE.......................................................................................................................... 8
FIGURE 6. POWER DIAGRAM OF SLEEP MODE ............................................................................................................................... 9
FIGURE 7. POWER DIAGRAM OF SNOOZE MODE .......................................................................................................................... 10
FIGURE 8. PIN ASSIGNMENTS ...................................................................................................................................................... 11
FIGURE 21. RF BLOCK DIAGRAM .................................................................................................................................................. 24
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1. General Description
The Realtek RTL8735B (also named AmebaPro-II) is a highly integrated low-power 802.11a/b/g/n
Wireless LAN (WLAN) and Bluetooth camera SoC. It combines ARM v8M MCUs (500MHz and 2.23
DMIPS/MHz), WLAN MAC, a 1T1R capable WLAN baseband, Bluetooth MAC, RF, audio codec, ISP
and H264/H265 encoder in a single chip. It provides useful high speed connectivity interfaces, such as USB
2.0 host, USB 2.0 device, SD host and Ethernet interfaces. It also provides a bunch of configurable GPIOs
which are configured as digital peripherals for different application and control usage.
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The AmebaPro-II series integrates internal memory for full Wi-Fi protocol functions. The embedded
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2. Features
MCU Features Digital WDR
Real-M500 (TM9) clock frequency up to Image enhancement(brightness, contrast,
500MHz saturation, hue and sharpness)
I-Cache 32KB/D-Cache 32KB ISP tuning tool
eXecute In Place (XIP) on NOR flash Graphic Processing
Internal Memory
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Supports external flash interface Each stream has individual OSD overlay
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ISP Features
H.264 Baseline/Main/High profiles, levels
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reduction(3DNR)
Supports major brands of DOL-HDR or H.265 Main and Main Still profiles, levels
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Staggered-HDR sensors 4
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Supports 12bit Bayer pattern input and 8bit JPEG/MJPEG Baseline and Max 5-
megapixel resolution for JPEG encoding
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H.265/H.264/JPEG encoding
Supports Auto Banding, Auto Exposure,
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Wi-Fi WEP, WPA, WPA2, WPA3, WPS. Maximum 4 I2C interface, Max clock
Open, shared key, and pair-wise key 400Kbps
authentication services Maximum 2 SPI interface, Master clock up
Supports low-power Tx/Rx for short-range to 25Mbps/Slave clock up to 31.25Mbps
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0 ~ 100%
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Long NAV for media reservation with CF- 2 GDMA and each with maximum 6
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3. Block Diagram
The AmebaPro-II diagram shown below provides a general application scenario. External devices can be
connected with the various peripheral interfaces. The PMU and related blocks for low power application
are also elaborated on this diagram.
3.3V
Power Source
1.35V
3.0~3.6V
Power Source PMU 1.8V
1.8V/1.35V
Power Source
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Cache SRAM
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Memory Unit
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1x1 n
Video Unit
SD Host
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ISP
MJPG
Security Unit
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H264/
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IPSec H265
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MIPI
RSA
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SCE
A-SPORT
OTP
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Audio Codec
TRNG
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General IO Unit
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Serial Connection
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HS-UART I2Sx12
PWM
HS-UART
HS-UART Master// Salve
GPIO
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SPI
HS-UART
HS-UART
Master/Slave Max 66 pin
I2C I2Sx3
SGPIO
HS-UART
HS-UART
Master/Slave Master// Salve
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ADC
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GDMA GTIMER
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12 Channels x4
General Assistive Unit
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LDO_SDIO_OUT
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3.3V to 3.3V/1.8V
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LDO_SDIO
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SD_VDIO
SDMMC
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OTP
AVDD33 LX_SPS_33V_SRC
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3.3V to 1.35V
SWR
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VD33_PA_G0
VD33_PA_G1 VD13_SYN
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VD33_PA_A RF
VD13_RF
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VD33_PAD_A
VCORE (0.9V+/- 5%)
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VD33_SYN
VD09_SWR
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VA33_XTAL
DDR_VD09_SWR
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XTAL
Digital
VDDR (1.8V/1.35V+/- 5%)
VD09_LDO
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GRPX_VDIO
GPIO
DDR_VD33
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DDR2/DDR3L
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Ameba ProII
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3.3V
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TIMER
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deassert
PMC
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CHIP_EN
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IO
Detect
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IO Power
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MCU
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3.3V
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TIMER
Keep High TO (wake up)
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PMC
CHIP_EN
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IO
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for
configuration MCU
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(Power-gated)
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RTC N/A
Comparator GPIOA0~GPIOA3
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3.3V
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Peripherals
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CHIP_EN
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IO
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Command
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MCU
(Power-gated)
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Comparator GPIOA0~GPIOA3
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UART0 GPIOA2~GPIOA3
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WLAN N/A
Timer Group0 N/A
3.3V
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Peripherals
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CHIP_EN
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IO
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Command
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MCU
(Clock-gated)
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Comparator GPIOA0~GPIOA3
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UART0 GPIOA2~GPIOA3
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WLAN N/A
Timer Group0 N/A
3.3V
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WLAN
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PMC
CHIP_EN
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Receive BCN
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Command MCU
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(Clock-gated or Power-gated)
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4. Pin Assignments
54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37
114 113 112 111 110 109 108 107 106 105 104 103 102 101
REGU_AVDD33 55 36 NC
REGU_LX_SPS_33V_SRC 56 35 RFAFE_VD33PA_G
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REGU_LDO_SDIO_OUTPUT 58 99 RFAFE_RFIN_G/GND
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GPIOA_1 59 98 GND
GPIOA_2 118 31 RFAFE_RFIO_A
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GPIOA_3 60 97 RFAFE_VD33PA_A
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122 27
AUDI O_AVDD33_0 64 93 GPIOE_1
AUDI O_VREF 123 26 GRPE_VD09_LDO
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RTL8735BXX
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LLLLLLLL
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EPHY_TXOP 67 90 GPIOD_16
EPHY_TXON 126 23 GPIOD_15
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EPHY_RXIP 68 89 GPIOD_14
GXXXVV
EPHY_RXIN 127 22 GRPD_VD09_SWR
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USB_RREF 69 88 GPIOD_13
GRPB_VD09_SWR 128 21 GPIOD_12
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GPIOB_0 70 87 GRPD_VDIO
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GPIOB_1 71 20 GPIOD_10
GRPB_VDIO 72 19 GPI OD_11
73 74 75 76 77 78 79 80 81 82 83 84 85 86
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
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XX in the model number in Figure 8 indicates the IC model (BM or DM). The version (A3, L3, A4, L4) is
indicated in the VV location in GXXXVV. Green package is indicated by the ‘G’ in GXXXVV. For a full
list of packages see section 9 Ordering Information, page 33.
5. Pin Descriptions
The signal type codes below are used in the following tables:
I: Input O: Output
G: Ground
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ADC2 I 44
AD converter input channel 2.
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ADC4 I 117
AD converter input channel 4.
Shared with GPIOA_1.
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ADC5 I 59
AD converter input channel 5.
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Table 6. RF Pins
Symbol Type Pin No. Description
RFAFE_RFIO_A IO 31 WL RF 5G signal.
RFAFE_RFIN_A I 32 WL RF 5G signal.
RFAFE_RFIO_G IO 100 WL RF 2.4G signal.
RFAFE_RFIN_G I 99 WL RF 2.4G signal.
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2 3
DDR_VD15/18 PI 1.8V/1.35V power for DDR.
73 74
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RFAFE_VD33PAD_A
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RFAFE_VD33PA_A 30 97
RFAFE_VD33PA_G
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34 35
RFAFE_VD33_SYN PI 3.3V power source for analog blocks.
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101 103
RFAFE_VA33_XTAL
105 122
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AUX_VA33
AUDIO_AVDD33_1
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RFAFE_VD13_RF
RFAFE_VD13_SYN 38 39
PI 1.35V power source for analog blocks.
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RFAFE_VA13_AFE 41 42
AUX_AVDD13
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XTAL_XO_32 O 117
Output of 32KHz Crystal Clock Reference.
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AUDIO_AVDD33_1 PI 122 The input power source 3.3V for Audio block.
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AmebaPro-II supports a maximum of 59 GPIO pins and all of them are configurable. Refer to Table 15 for
detailed information and pin mux rules.
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GPIOA_0 IO 117
GPIOA_1 IO 59
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GPIOA_2 IO 118
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GPIOA_3 IO 60
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GPIOA_4 IO 119
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GPIOA_5 IO 120
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GPIOB_0 IO 70
GPIOB_1 IO 71
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GPIOD_0 IO 83
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GPIOD_1 IO 13
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GPIOD_2 IO 84
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GPIOD_3 IO 14
GPIO pin. The MUX function can be referred to in section 5.12.1
GPIOD_4 IO 85
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GPIOD_7 IO 16
GPIOD_8 IO 17
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GPIOD_9 IO 18
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GPIOD_10 IO 20
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GPIOD_11 IO 19
GPIOD_12 IO 21
GPIOD_13 IO 88
GPIOD_14 IO 89
GPIOD_15 IO 23
GPIOD_16 IO 90
AmebaPro-II Highly integrated, Ultra-low-power 16 preliminary
IEEE 802.11a/b/g/n Compatible
1T1R WLAN + Bluetooth Camera SoC
AmebaPro-II
Datasheet
Symbol Type Pin No. Description
GPIOD_17 IO 24
GPIOD_18 IO 91
GPIOE_0 IO 92
GPIOE_1 IO 93
GPIOE_2 IO 94
GPIOE_3 IO 28
GPIOE_4 IO 95
GPIOE_5 IO 29
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GPIOE_6 IO 96
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GPIOF_0 IO 43
GPIOF_1 IO 106
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GPIOF_2 IO 44
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GPIOF_3 IO 107
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GPIOF_4 IO 108
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GPIOF_5 IO 46
GPIOF_6 IO 109
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GPIOF_7 IO 47
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GPIOF_8 IO 110
GPIOF_9 IO 111
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GPIOF_10 IO 49
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GPIOF_11 IO 112
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GPIOF_12 IO 50
GPIOF_13 IO 113
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GPIOF_14 IO 114
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GPIOF_15 IO 52
GPIOF_16 IO 53
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GPIOF_17 IO 54
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GPIOS_0 IO 79
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GPIOS_1 IO 9
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GPIOS_2 IO 80
GPIOS_3 IO 81
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GPIOS_4 IO 11
GPIOS_5 IO 82
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GPIOS_6 IO 12
Note: Default states of all pins are High-impedance; Unused pins should be kept floating.
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GPIOB_0 - - - - - I2C0_SCL
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GPIOB_1 - - - - - I2C0_SDA
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GPIOC_0 - SPI_CLK - - - -
GPIOC_1 - SPI_DAT3 - - - -
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GPIOC_2 - SPI_DAT0 - - - -
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GPIOC_3 - SPI_DAT2 - - - -
on
GPIOC_4 - SPI_DAT1 - - - -
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GPIOC_5 - SPI_CS - - - -
GPIOD_0 - - - - MIPI_DATA0_P -
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GPIOD_1 - - - - MIPI_DATA0_N -
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GPIOD_2 - - - - MIPI_DATA1_P -
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GPIOD_3 - - - - MIPI_DATA1_N -
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GPIOD_4 - - - - MIPI_CKI_P -
GPIOD_5 - - - - MIPI_CKI_N -
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GPIOD_6 - - - - MIPI_DATA2_P -
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GPIOD_7 - - - - MIPI_DATA2_N -
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GPIOD_8 - - - - MIPI_DATA3_P -
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GPIOD_9 - - - - MIPI_DATA3_N -
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GPIOD_10 - - I2C3_SDA - - -
GPIOD_11 - - - SSOR_PDN - -
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GPIOD_12 - - I2C3_SCL - - -
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GPIOD_13 - - - SSOR_SYSCLK - -
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GPIOD_14 - - - - - -
GPIOD_15 - - - - - -
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GPIOD_16 - - - - - -
GPIOD_17 - - - - - -
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GPIOD_18 - - - - - -
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GPIOE_0 - - - SSOR_RST - -
GPIOE_1 - - - - - -
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GPIOE_2 - - - - - -
GPIOE_3 - - - - - I2C2_SCL
GPIOE_4 - - - - - I2C2_SDA
GPIOE_5 - - - - - I2C2_SCL
GPIOE_6 - - - - - I2C2_SDA
GPIOF_8 - - - - - -
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GPIOF_9 - - - - - -
GPIOF_10 - - - - - -
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GPIOF_11 - - - - - -
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GPIOF_12 - - - - - -
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GPIOF_13 - - - - - -
on
GPIOF_14 - - - - - -
GPIOF_15 - - - - - -
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GPIOF_16 - - - - - -
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GPIOF_17 - - - - - -
GPIOS_0 - - - - - -
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GPIOS_1 - - - - - -
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GPIOS_2 - - - - - -
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GPIOS_3 - - - - - -
GPIOS_4 - - - - - -
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GPIOS_5 - - - - - -
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GPIOS_6 - - - - - -
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GPIOB_1 - - - - - -
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GPIOC_0 - - - - - -
GPIOC_1 - - - - - -
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GPIOC_2 - - - - - -
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GPIOC_3 - - - - - -
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GPIOC_4 - - - - - -
on
GPIOC_5 - - - - - -
GPIOD_0 - - - - - -
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GPIOD_1 - - - - - -
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GPIOD_2 - - - - - -
GPIOD_3 - - - - - -
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GPIOD_4 - - - - - -
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GPIOD_5 - - - - - -
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GPIOD_6 - - - - - -
GPIOD_7 - - - - - -
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GPIOD_8 - - - - - -
GPIOD_9 - - - - - -
dh
GPIOD_10 - - - - - -
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GPIOD_11 - - - - - -
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GPIOD_12 - - - - - -
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GPIOD_13 - - - - - -
GPIOD_14 DMIC_CLK - - WIFI_LED - -
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GPIOD_15 - - - - - -
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GPIOD_16 DMIC_CLK - - - - -
GPIOD_17 - - - - - RFE_CTRL_4
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GPIOE_1 - - - - - -
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GPIOE_2 - - - - - -
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GPIOE_3 - - - - - RFE_CTRL_4
GPIOE_4 - - - - - RFE_CTRL_5
GPIOE_5 - - - - - -
GPIOE_6 - - - - - -
GPIOF_0 - - - - - -
GPIOF_1 - - - - - RFE_CTRL_0
GPIOF_10 - - PWM4 - - -
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GPIOF_11 - - PWM5 - - -
GPIOF_12 - - PWM6 - - -
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GPIOF_13 - - PWM7 - - -
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GPIOF_16 - - PWM10 - - -
GPIOF_17 - - PWM11 - - -
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GPIOS_0 - - - - SD_CLK -
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GPIOS_3 - - - - SD_CMD -
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GPIOA_0 - - - - -
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GPIOA_1 - - - - -
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GPIOA_2 - - - UART0_OUT -
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GPIOA_3 - - - UART0_IN -
GPIOA_4 - - - - -
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GPIOA_5 - - - - -
GPIOB_0 - - - - -
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GPIOB_1 - - - - -
GPIOC_0 - - - - -
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GPIOC_1 - - - - -
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GPIOC_2 - - - - -
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GPIOC_3 - - - - -
GPIOC_4 - - - - -
GPIOC_5 - - - - -
GPIOD_0 - - - - -
GPIOD_1 - - - - -
GPIOD_2 - - - - -
AmebaPro-II Highly integrated, Ultra-low-power 21 preliminary
IEEE 802.11a/b/g/n Compatible
1T1R WLAN + Bluetooth Camera SoC
AmebaPro-II
Datasheet
Pin Name I2S SPI Master SPI Slave UART BT Coexist
GPIOD_3 - - - - -
GPIOD_4 - - - - -
GPIOD_5 - - - - -
GPIOD_6 - - - - -
GPIOD_7 - - - - -
GPIOD_8 - - - - -
GPIOD_9 - - - - -
GPIOD_10 - - - - -
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GPIOD_11 - - - - -
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GPIOD_12 - - - - -
GPIOD_13 - - - - -
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GPIOE_0 - - - UART2_OUT -
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GPIOE_5 - SPI_0_CS1 - - -
GPIOE_6 - SPI_0_CS2 - - -
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GPIOF_0 - - - - -
dh
GPIOF_1 - - - UART1_CTS -
GPIOF_2 - - - UART1_RTS -
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GPIOF_3 - - - UART1_IN -
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GPIOF_4 - - - UART1_OUT -
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GPIOF_10 - SPI_1_CS2 - - -
GPIOF_11 I2S0_MCK - - - -
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GPIOF_14 I2S0_SD_TX0 - - - -
GPIOF_15 I2S0_WS - - - -
GPIOF_16 - SPI_1_CS3 - - -
GPIOF_17 - - - - -
GPIOS_0 - - - - -
GPIOS_1 - - - - -
AmebaPro-II Highly integrated, Ultra-low-power 22 preliminary
IEEE 802.11a/b/g/n Compatible
1T1R WLAN + Bluetooth Camera SoC
AmebaPro-II
Datasheet
Pin Name I2S SPI Master SPI Slave UART BT Coexist
GPIOS_2 - - - - -
GPIOS_3 - - - - -
GPIOS_4 - - - - -
GPIOS_5 - - - - -
GPIOS_6 - - - - -
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6. RF Characteristics
AmebaPro-II includes integrated WLAN RF transceiver architecture and operates in 2.4GHz/5GHz WLAN
and Bluetooth systems.
This section describes the AmebaPro-II RF block diagram. AmebaPro-II includes a Wi-Fi/BT subsystem
that integrates a Wi-Fi/BT modem sharing a front-end RF (ADC, TRSW, LPF, PA, LNA, etc.), and this
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IQ
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WIFI
PA DAC
MODEM
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RFIO_5G SWITCH
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IQ
LNA
or
BLE
SWITCH ADC
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MODEM
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dh
RFIN_5G LNA
ar
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IQ
RFIN_2G LNA
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SWITCH
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LNA
IQ
gm
RFIO_2G SWITCH
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PA
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Values in Table 19 and Table 20 are typical values, and the reference point is the antenna port including
front-end loss. These values may change slightly depending on different RF front-end designs or PCB
designs. Both the transmitter specifications and the receiver specifications follow Bluetooth SIG
specifications.
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F = F0 ± 1MHz - -50 - dB
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F = F0 ± 2MHz - -50 - dB
Adjacent Channel Transmit Power
F = F0 ± 3MHz - -50 - dB
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- - 0.9 - -
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ICFT - - 0 - KHz
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Note: The above Tx performance values are based on 25 degree, 3.3V, 50ohm @LAB environment & Realtek EVB.
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- - 5 - dB
F = F0 + 1MHz - -7 - dB
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F = F0 - 1MHz - -7 - dB
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Co-Channel C/I
Adjacent Channel Selectivity C/I F = F0 + 2MHz - -40 - dB
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F = F0 - 2MHz - -25 - dB
F = F0 + 3MHz - -50 - dB
F = F0 - 3MHz - -25 - dB
30MHz ~ 2000MHz -30 - - dBm
Out-of-Band Blocking Performance
2000MHz ~ 2400MHz -35 - - dBm
2500MHz ~ 3000MHz -35 - - dBm
AmebaPro-II Highly integrated, Ultra-low-power 25 preliminary
IEEE 802.11a/b/g/n Compatible
1T1R WLAN + Bluetooth Camera SoC
AmebaPro-II
Datasheet
Parameter Description Min Typ. Max Units
3000MHz ~ 12.5 GHz -30 - - dBm
Intermodulation -36 dBm
Note: The above Rx performance values are based on 25 degree, 3.3V, 50ohm @LAB environment & Realtek EVB.
7. Electrical Characteristics
PCB (layer) Tambient( C) JA( C/W) JT ( C/W) JB( C/W) JC(C/W) JB( C/W)
4 (JEDEC 2s2P) 70 23.38 0.68 9.59 10.13 9.63
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lf
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TPRD Y
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VD33x 3.3V
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C
VDD_IO 3.3V
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CHIP_EN 3.3V
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TCLK
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RCO
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Tcore
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0.9V
or
VDD DDR
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1.8V/1.35V
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Tboot
dh
VDD_IO 3.3V
CHIP_EN
core power
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Wake event
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RCO
k
C
Tboot
CPU boot time
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Table 26. Timing Specification for Resume from Standby Mode Sequence
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VD33x
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VDD_IO
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VRST
u@
CHIP_EN
VRDY
TRST TCLK
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RCO
Tcore
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core power
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1.8V/1.35V
Tboot
CPU Available
TPD
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VD33x VPD
C
on
VDD_IO VPD
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VRST
CHIP_EN
en
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RCO
Core Power
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1.8V/1.35V
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dh
CPU Available
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VRST Shutdown occurs after CHIP_EN is lower than this voltage - 0.8 - V
VPD The required voltage of CHIP_EN/VDD33x/ VDD_IO for power down state 0 0 0.08 V
gm
8. Mechanical Dimensions
R
ea
l te
k
C
on
fid
en
tia
lf
or
s
id
dh
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Note: For detailed pin assignments, please refer to section 4 Pin Assignments.
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D 10 BSC
ea
E 10 BSC
C
eT 0.500 BSC
en
eR 0.500 BSC
R 0.090 - -
tia
aaa 0.150
or
bbb 0.100
ccc 0.100
s
ddd 0.050
id
eee 0.080
dh
fff 0.100
ar
th
Notes:
1. CONTROLLING DIMENSION: MILLIMETER (mm).
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9. Ordering Information
Table 30. Ordering Information
Part Number Package
RTL8735BDM-VA3-CG QFN128
RTL8735BM-VA3-CG QFN128
RTL8735BDM-VL3-CG QFN128
RTL8735BM-VL3-CG QFN128
RTL8735BDM-VA4-CG QFN128
R
RTL8735BM-VA4-CG QFN128
ea
RTL8735BDM-VL4-CG QFN128
RTL8735BM-VL4-CG QFN128
l te
k
C
on
fid
en
tia
lf
or
s
id
dh
ar
th
ar
ob
u@
gm
ai
l.c
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