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Experiment No 4

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0% found this document useful (0 votes)
13 views11 pages

Experiment No 4

dld practical work

Uploaded by

231400033
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Gift University Gujranwala Electrical Engineering

GIFT UNIVERSITY GUJRANWALA

LAB MANUAL
DIGITAL LOGIC DESIGN
DEPARTMENT OF ELECTRICAL ENGINEERING

Digital Logic Design


Gift University Gujranwala Electrical Engineering

Boolean Function Simplification


&
Implementation using Boolean algebra
EXPERIMENT NO. 04

Name Report Marks Lab Performance Viva Marks Total


(04) (06) (05) (15)

Digital Logic Design Page 1


Gift University Gujranwala Electrical Engineering

EXPERIMENT NO. 04

Boolean Function Simplification & Implementation using Boolean algebra

Objectives:
 Learn how to reduce the gates by function simplification
 Design of logic circuit defined by simplified function (LOGISIM)

Theory

A function could be simplified by using properties and postulates resulting reduction in the
number of gates but giving the same input as before simplification.

1. A+0 = A
2. A+1 = 1
3. A .0 = 0
4. A .1 = A
5. A+A = A
6. A+A’ = 1
7. A.A = A
8. A.A’ = 0
9. (A’)’ = A
10. A+AB = A
11. A+A’B = A+B
12. (A+B)(A+C) = A+BC
13. A’. B’ = (A+B)’
14. A’+B’ = (A.B)’

====================================================================
Digital Logic Design Page 2
Gift University Gujranwala Electrical Engineering

LAB TASK
====================================================================

Simplify these functions & implement the simplified and given function on LOGISIM

F1 =A’B’C +A’BC +AB’ (03 Marks)

Follow these following steps to complete the lab task:

1) Draw the truth table of the given function F1.


2) Draw the Logic circuit diagram of F1 on LOGISIM.
3) Simplify the function F1.
4) Draw the truth table of simplified function.
5) Compare its output with the truth table in step1.
6) Draw the Logic circuit diagram of simplified function on LOGISIM.

Truth Table of given function F1: (0.5 Marks)

A B C

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

Logic diagram of Function F1 (Screenshot of LOGISIM): (0.5 Marks)

Digital Logic Design Page 3


Gift University Gujranwala Electrical Engineering

[Paste LOGISIM circuit here]

[Add text here]

Simplified function F1: (01 Mark)

Truth Table of simplified function : (0.5 Marks)

A B C

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

Digital Logic Design Page 4


Gift University Gujranwala Electrical Engineering

1 1 1

LOGISIM Logic diagram of simplified function: (0.5 Marks)

[Paste LOGISIM circuit here]

==================================================================================
Function 2
==================================================================================

F2=xyz + xy’z + xyz (03 Marks)

Follow these following steps to complete the lab task:

1) Draw the truth table of the given function F2.


2) Draw the Logic circuit diagram of F2 on LOGISIM.
3) Simplify the function F2.
4) Draw the truth table of simplified function.
5) Compare its output with the truth table in step1.
6) Draw the Logic circuit diagram of simplified function on LOGISIM.

Truth Table of given function F2: (0.5 Marks)

Digital Logic Design Page 5


Gift University Gujranwala Electrical Engineering

X Y Z

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

Logic diagram of Function F2 (Screenshot of LOGISIM): (0.5


Marks)

[Paste LOGISIM circuit here]

Digital Logic Design Page 6


Gift University Gujranwala Electrical Engineering

Simplified function F2: (01 Mark)


[Add text here]

Truth Table of simplified function : (0.5 Marks)

X Y Z

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

LOGISIM Logic diagram of simplified function: (0.5 Marks)

[Paste LOGISIM circuit here]


Digital Logic Design Page 7
Gift University Gujranwala Electrical Engineering

Observations: (01
Mark)

Digital Logic Design Page 8


Gift University Gujranwala Electrical Engineering

Review Questions

1. Find complement of following function and draw circuit of resultant. (01 Mark)
F=XY’Z+X’Y+XY’Z’

[Add text here]

2. State the purpose of reducing Boolean function into minimal form. (01
Mark)

3. What is meant by duality principal? What is its usage in Boolean algebra? Explain
your answer. (01
Mark)

Digital Logic Design Page 9


Gift University Gujranwala Electrical Engineering

Digital Logic Design Page 10

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