B140RTN03 0

Product Specification
AU OPTRONICS CORPORATION
( V ) Preliminary Specifications
( ) Final Specifications
+
Module 14.0”(13.98”) HD 16:9 Color TFT-LCD
with LED Backlight design
Model Name B140RTN03.0 (H/W:1A)
Note ( ) LED Backlight with driving circuit design
Customer Date Approved by Date
Lenovo 2012 Jonken Fan 08/23/2012
Checked &
Date Prepared by Date
Approved by
Queena Lee 08/13/2012
Note: This Specification is subject to change NBBU Marketing Division

without notice. AU Optronics corporation
B140RTN03.0 Document Version : 0.2 Page 1 of 32

Contents
1. Handling Precautions....................................................................................... 4
2. General Description.......................................................................................... 5
2.1 General Specification......................................................................................................... 5
2.2 Optical Characteristics ....................................................................................................... 6
3. Functional Block Diagram.............................................................................. 11
4. Absolute Maximum Ratings........................................................................... 12
4.1 Absolute Ratings of TFT LCD Module ............................................................................. 12
4.2 Absolute Ratings of Environment..................................................................................... 12
5. Electrical Characteristics............................................................................... 13
5.1 TFT LCD Module ............................................................................................................. 13
5.2 Backlight Unit................................................................................................................... 16
6. Signal Interface Characteristic ...................................................................... 17
6.1 Pixel Format Image.......................................................................................................... 17
6.2 Integration Interface Requirement ................................................................................... 18
6.3 Interface Timing ............................................................................................................... 21
6.4 Power ON/OFF Sequence ............................................................................................... 22
7. Panel Reliability Test...................................................................................... 25
7.1 Vibration Test ................................................................................................................... 25
7.2 Shock Test ....................................................................................................................... 25
7.3 Reliability Test .................................................................................................................. 25
8. Mechanical Characteristics ........................................................................... 26
8.1 LCM Outline Dimension................................................................................................... 26
9. Shipping and Package ................................................................................... 28
9.1 Shipping Label Format..................................................................................................... 28
9.2 Carton Package ............................................................................................................... 29
9.3 Shipping Package of Palletizing Sequence ..................................................................... 29
10. Appendix: EDID Description ........................................................................ 30

Record of Revision
Version and Date Page Old description New Description Remark

0.1 2012/07/30 All First Edition for Customer
0.2 2012/8/13 13 None Add PDD / IDD typical value
19 Correct pin assignment (Pin1)

1. Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input
connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration
or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on
hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure
human earth when handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate
nor tilt the Interface Connector of the TFT Module.
11) After installation of the TFT Module into an enclosure (Notebook PC Bezel, for
example), do not twist nor bend the TFT Module even momentary. At designing the
enclosure, it should be taken into consideration that no bending/twisting forces are
applied to the TFT Module from outside. Otherwise the TFT Module may be
damaged.
12) Small amount of materials having no flammability grade is used in the LCD module. The
LCD module should be supplied by power complied with requirements of Limited Power
Source (IEC60950 or UL1950), or be applied exemption.
13) Disconnecting power supply before handling LCD modules, it can prevent electric shock,
DO NOT TOUCH the electrode parts, cables, connectors and LED circuit part of TFT
module that a LED light bar build in as a light source of back light unit. It can prevent
electrostatic breakdown.

2. General Description
B140RTN03.0 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel,
a driver circuit, and LED backlight system. The screen format is intended to support the 16:9
HD, 1600(H) x 900(V) screen and 262k colors (RGB 6-bits data driver) with LED backlight
driving circuit. All input signals are eDP(Embedded DisplayPort) interface compatible.
B140RTN03.0 is designed for a display unit of notebook style personal computer and
industrial machine.
2.1 General Specification
The following items are characteristics summary on the table at 25 ℃ condition:
Items Unit Specifications
Screen Diagonal [mm] 355.22
Active Area [mm] 309.6 x 174.15
Pixels H x V 1600 x 3 (RGB) x 900
Pixel Pitch [mm] 0.1935 x 0.1935
Pixel Format R.G.B. Vertical Stripe
Display Mode Normally White
White Luminance [cd/m2] 250 typ. (5 points average)

212 min. (5 points average)
Luminance Uniformity 1.25 max. (5 points)
Contrast Ratio 400 typ
Response Time [ms] 8 typ / 16 Max
Nominal Input Voltage VDD [Volt] +3.3 typ.
Power Consumption [Watt] 3.9 max. (Include Logic and Blu power)
Weight [Grams] 270 max.
Physical Size [mm] Min. Typ. Max.
Include bracket Length 319.9 320.4 320.9
Width 204.6 205.1 205.6
Thickness - - 3.0
Electrical Interface43 1 Lane eDP
Glass Thickness [mm] 0.4
Surface Treatment Anti-Glare, Hardness 3H,
Support Color 262K colors ( RGB 6-bit )

Temperature Range
Operating [oC] 0 to +50
o
Storage (Non-Operating) [ C] -20 to +60
RoHS Compliance RoHS Compliance
2.2 Optical Characteristics

℃ (Room Temperature) :
The optical characteristics are measured under stable conditions at 25
Item Symbol Conditions Min. Typ. Max. Unit Note
5 points average 2
White Luminance 212 250 - cd/m 1, 4, 5.
θR Horizontal (Right) 40 45 -
θL CR = 10 (Left) 40 45 -
Viewing Angle degree 4, 9
ψH Vertical (Upper) 10 15 -
ψL CR = 10 (Lower) 30 35 -
Luminance
δ5P 5 Points - - 1.25 1, 3, 4
Uniformity
Luminance
δ13P 13 Points - - 1.60 2, 3, 4
Uniformity
Contrast Ratio CR 300 400 - 4, 6
Cross talk % - - 4 4, 7
Response Time TRT Rising + Falling - 8 16 msec 4, 8
Rx TBD
Red
Ry TBD
Gx TBD
Color / Green
Gy TBD
Chromaticity
Coodinates Bx CIE 1931 TBD 4
Blue
By TBD
Wx 0.283 0.313 0.343
White
Wy 0.299 0.329 0.359
NTSC % - 45 -

Note 1: 5 points position (Ref: Active area)
W
W /4 W /4 W /4 W /4
H /4
1 2
H /4
H 3
H /4
4 5
H /4
Note 2: 13 points position (Ref: Active area)
W /4 W /4 W /4 W /4
10 10
10
1 2 3
H /4
4 5
H /4
H 6 7 8
H /4
9 10
H /4 11 12 13
10
Note 3: The luminance uniformity of 5 or13 points is defined by dividing the maximum luminance values by the
minimum test point luminance
δ
Maximum Brightness of five points
W5 =
Minimum Brightness of five points
δ
Maximum Brightness of thirteen points
W13 =
Minimum Brightness of thirteen points
Note 4: Measurement method

The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change
during measuring. In order to stabilize the luminance, the measurement should be executed after lighting

Backlight for 30 minutes in a stable, windless and dark room, and it should be measured in the center of screen.
Photo detector
°
Field=2
50 cm
LCD Panel TFT-LCD Module
Center of the screen

Note 5 ： Definition of Average Luminance of White (Y ): L
Measure the luminance of gray level 63 at 5 points ，Y = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L
L (x) is corresponding to the luminance of the point X at Figure in Note (1).
Note 6 ： Definition of contrast ratio:

Contrast ratio is calculated with the following formula.
Brightness on the “White” state

Contrast ratio (CR)=
Brightness on the “Black” state
Note 7 ： Definition of Cross Talk (CT)

CT = | YB – YA | / YA × 100 (%)
Where
YA = Luminance of measured location without gray level 0 pattern (cd/m2)
YB = Luminance of measured location with gray level 0 pattern (cd/m2)

Note 8: Definition of response time:
The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to
“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval between
the 10% and 90% of amplitudes. Refer to figure as below.
"Black"
"White" "White"
100%
Signal(Relative value)
90%
10%
0%
Tr Tf

Note 9. Definition of viewing angle

Viewing angle is the measurement of contrast ratio ≧10, at the screen center, over a 180° horizontal and
180° vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follows; 90°
(θ) horizontal left and right and 90° (Φ) vertical, high (up) and low (down). The measurement direction is
typically perpendicular to the display surface with the screen rotated about its center to develop the desired
measurement viewing angle.

3. Functional Block Diagram

The following diagram shows the functional block of the 14.0 inches wide Color TFT/LCD 30 Pin

4. Absolute Maximum Ratings

An absolute maximum rating of the module is as following:
4.1 Absolute Ratings of TFT LCD Module

Item Symbol Min Max Unit Conditions
Logic/LCD Drive Voltage Vin -0.3 +4.0 [Volt] Note 1,2
4.2 Absolute Ratings of Environment

Item Symbol Min Max Unit Conditions
o
Operating Temperature TOP 0 +50 [ C] Note 4
Operation Humidity HOP 5 95 [%RH] Note 4
o
Storage Temperature TST -20 +60 [ C] Note 4
Storage Humidity HST 5 95 [%RH] Note 4
Note 1: At Ta (25 ℃)
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: LED specification refer to section 5.2
Note 4: For quality performance, please refer to AUO IIS (Incoming Inspection Standard).
Twb=39°C
Operating Range Storage Range

5. Electrical Characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows;
The power specification are measured under 25 ℃ and frame frenquency under 60Hz
Symble Parameter Min Typ Max Units Note
VDD Logic/LCD Drive
3.0 3.3 3.6 [Volt]
Voltage
PDD VDD Power 1.1 1.25 [Watt] Note 1
IDD IDD Current 330 417 [mA] Note 1
IRush Inrush Current - 2000 [mA] Note 2
VDDrp Allowable [mV]
Logic/LCD Drive 100 p-p
Ripple Voltage
Note 1 : Maximum Measurement Condition ：Black Pattern at 3.3V driving voltage. (P max=V3.3 x Iblack)
Typical Measurement Condition : Mosaic Pattern
Note 2：Measure Condition
90% 3.3V
10%
0V
0.5ms
Vin rising time

5.1.2 Signal Electrical Characteristics

Input signals shall be low or High-impedance state when VDD is off.
Signal electrical characteristics are as follows;

Display Port main link signal:
Display port main link

Min Typ Max unit
VCM RX input DC Common Mode Voltage 0.668 0.68 0.685 V
VDiffP-P Peak-to-peak Voltage at a receiving Device mV
Fallow as VESA display port standard V1.1a

Display Port AUX_CH signal:
Display port AUX_CH

Min Typ Max unit
VCM Differential Common Mode Voltage 0 VDD/2 2 V
VDiffP-P Differential peak-to-peak Voltage 0.39 1.38 V
Fallow as VESA display port standard V1.1a.
Display Port VHPD signal:
Display port VHPD

Min Typ Max unit
VHPD HPD Voltage 2.25 - 3.6 V
Fallow as VESA display port standard V1.1a.

5.2 Backlight Unit
5.2.1 LED characteristics
Parameter Symbol Min Typ Max Units Condition

Backlight Power PLED 2.65
℃
[Watt] (Ta=25 ), Note 1
Consumption Vin =12V
LED Life-Time N/A 15000 Hour (Ta=25℃), Note 2

IF=20 mA
Note 1: Calculator value for reference PLED = VF (Normal Distribution) * IF (Normal Distribution) / Efficiency
Note 2: The LED life-time define as the estimated time to 50% degradation of initial luminous.
5.2.2 Backlight input signal characteristics
Parameter Symbol Min Typ Max Units Remark
LED Power Supply VLED [Volt]
LED Enable Input

[Volt]
High Level
VLED_EN
LED Enable Input
[Volt] Define as
Low Level
PWM Logic Input Connector
High Level [Volt] Interface
PWM Logic Input VPWM_EN (Ta=25 ℃)

Low Level [Volt]
PWM Input Frequency FPWM 200 1K 10K Hz
PWM Duty Ratio Duty %

Note 1 : Recommend system pull up/down resistor no bigger than 10kohm

6. Signal Interface Characteristic

6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.
1 1600
1st Line R G B R GB R G B R G B
900th Line R G B R GB R G B R G B

6.2 Integration Interface Requirement
6.2.1 Connector Description

Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following
components.
Connector Name / Designation For Signal Connector

Manufacturer IPEX or compatible
Type / Part Number I-PEX 20455-030E-12 or compatible
Mating Housing/Part Number I-PEX 20453-030T-11 or compatible

6.2.2 Pin Assignment (1 Lane)
eDP lane is a differential signal technology for LCD interface and high speed data transfer device.
PIN NO Symbol Function

1 DCR DCR
2 H_GND High Speed Ground

3 NC
4 NC
6 Lane0_N Comp Signal Link Lane 0
7 Lane0_P True Signal Link Lane 0
9 AUX_CH_P True Signal Auxiliary Ch.
10 AUX_CH_N Comp Signal Auxiliary Ch.
12 LCD_VCC LCD logic and driver power
13 LCD_VCC LCD logic and driver power
14 NC Reverse for AUO TEST only
15 LCD_GND LCD logic and driver ground
16 LCD_GND LCD logic and driver ground
17 HPD HPD signale pin
18 BL_GND Backlight ground
22 BL_Enable Backlight On / Off
23 BL_PWM_DIM System PWM signal Input
26 BL_PWR Backlight power (6V~21V)
30 NC No connect

Connector
Pin 30 Pin 1
Note1: Start from right side.
Note2: Input signals shall be low or High-impedance state when VDD is off.
Internal circuit of eDP inputs are as following.

6.3 Interface Timing

6.3.1 Timing Characteristics
Basically, interface timings should match the 1600x900 /60Hz manufacturing guide line timing.
Parameter Symbol Min. Typ. Max. Unit

Frame Rate - 60 Hz
Clock frequency 1/ TClock 57.6 MHz
Period TV 908 960 2047
Vertical
Active TVD 900 TLine
Section
Blanking TVB 8 60
Period TH 1660 2000 2047
Horizontal
Active THD 1600 TClock
Section
Blanking THB 60 400
Note 1 : The above is as optimized setting

Note 2 : The maximum clock frequency = (1366+B)*(768+A)*60<80MHz

6.4 Power ON/OFF Sequence
Display Port panel power sequence:
Display Port AUX_CH transaction only:

Display Port panel power sequence timing parameter:
Note1: The sink must include the ability to generate black video autonomously. The sink must automatically enable
black video under the following conditions:
-upon LCDVDD power on (with in T2 max)-when the "Novideostream_Flag" (VB-ID Bit 3) is received from the source
(at the end of T9).
-when no main link data, or invalid video data, is received from the source. Black video must be displayed within 64ms
(typ) from the start of either condition. Video data can be deemed invalid based on MSA and timing information, for
example.
Note 2: The sink may implement the ability to disable the black video function, as described in Note 1, above, for
system development and debugging purpose.
Note 3: The sink must support AUX_CH polling by the source immediately following LCDVDD power on without
causing damage to the sink device (the source can re-try if the sink is not ready). The sink must be able to respond to
an AUX_CH transaction with the time specified within T3 max.

Display Port panel B/L power sequence timing parameter:

7. Panel Reliability Test
7.1 Vibration Test

Test Spec:
Test method: Non-Operation
Acceleration: 1.5 G
Frequency: 10 - 500Hz Random
Sweep: 30 Minutes each Axis (X, Y, Z)
7.2 Shock Test

Test Spec:
Test method: Non-Operation
Acceleration: 220 G , Half sine wave
Active time: 2 ms
Pulse: X,Y,Z .one time for each side
7.3 Reliability Test
Items Required Condition Note

Temperature
Humidity Bias ℃, 90%RH, 300h
Ta= 40℃
High Temperature
Operation ℃, Dry, 300h
Ta= 50℃
Low Temperature
Operation ℃, 300h
Ta= 0℃
High Temperature
Storage ℃, 35%RH, 300h
Ta= 60℃
Low Temperature
Storage ℃, 50%RH, 250h
Ta= -20℃
Thermal Shock
Test ℃to 60℃
Ta=-20℃ ℃, Duration at 30 min, 100 cycles
Contact : ±8 KV Note 1
ESD
Air : ±15 KV
Note1: According to EN 61000-4-2 , ESD class B: Some performance degradation allowed. Self-recoverable.
No data lost, No hardware failures.
Remark: MTBF (Excluding the LED): 30,000 hours with a confidence level 90%

8. Mechanical Characteristics
8.1 LCM Outline Dimension

Note: Prevention IC damage, IC positions not allowed any overlap over these areas.

9. Shipping and Package
9.1 Shipping Label Format

9.2 Carton Package
9.3 Shipping Package of Palletizing Sequence

10. Appendix: EDID Description

Address FUNCTION Value Value Value Note
HEX HEX BIN DEC
00 Header 00 00000000 0
01 FF 11111111 255
02 FF 11111111 255
03 FF 11111111 255
04 FF 11111111 255
05 FF 11111111 255
06 FF 11111111 255
07 00 00000000 0
08 EISA Manuf. Code LSB 06 00000110 6
09 Compressed ASCII AF 10101111 175
0A Product Code 3E 00111110 62
0B hex, LSB first 30 00110000 48
0C 32-bit ser # 00 00000000 0
0D 00 00000000 0
0E 00 00000000 0
0F 00 00000000 0
10 Week of manufacture 00 00000000 0
11 Year of manufacture 16 00010110 22
12 EDID Structure Ver. 01 00000001 1
13 EDID revision # 04 00000100 4
14 Video input def. (digital I/P, non-TMDS, CRGB) 90 10010000 144
15 Max H image size (rounded to cm) 1F 00011111 31
16 Max V image size (rounded to cm) 11 00010001 17
17 Display Gamma (=(gamma*100)-100) 78 01111000 120
18 Feature support (no DPMS, Active OFF, RGB, tmg Blk#1) 02 00000010 2
19 Red/green low bits (Lower 2:2:2:2 bits) A0 10100000 160
1A Blue/white low bits (Lower 2:2:2:2 bits) 95 10010101 149
1B Red x (Upper 8 bits) 99 10011001 153
1C Red y/ highER 8 bits 59 01011001 89
1D Green x 52 01010010 82
1E Green y 92 10010010 146
1F Blue x 26 00100110 38
20 Blue y 21 00100001 33
21 White x 50 01010000 80
22 White y 54 01010100 84
23 Established timing 1 00 00000000 0
26 Standard timing #1 01 00000001 1
27 01 00000001 1
29 01 00000001 1
2A Standard timing #3 01 00000001 1
2B 01 00000001 1
2C Standard timing #4 01 00000001 1

2D 01 00000001 1
2E Standard timing #5 01 00000001 1
2F 01 00000001 1
31 01 00000001 1
33 01 00000001 1
35 01 00000001 1
36 Pixel Clock/10000 LSB 00 00000000 0
37 Pixel Clock/10000 USB 2D 00101101 45
38 Horz active Lower 8bits 40 01000000 64
39 Horz blanking Lower 8bits 90 10010000 144
3A HorzAct:HorzBlnk Upper 4:4 bits 61 01100001 97
3B Vertical Active Lower 8bits 84 10000100 132
3C Vertical Blanking Lower 8bits 3C 00111100 60
3D Vert Act : Vertical Blanking (upper 4:4 bit) 30 00110000 48
3E HorzSync. Offset 40 01000000 64
3F HorzSync.Width 2A 00101010 42
40 VertSync.Offset : VertSync.Width 33 00110011 51
41 Horz&Vert Sync Offset/Width Upper 2bits 00 00000000 0
42 Horizontal Image Size Lower 8bits 35 00110101 53
43 Vertical Image Size Lower 8bits AE 10101110 174
44 Horizontal & Vertical Image Size (upper 4:4 bits) 10 00010000 16
45 Horizontal Border (zero for internal LCD) 00 00000000 0
46 Vertical Border (zero for internal LCD) 00 00000000 0
47 Signal (non-intr, norm, no stero, sep sync, neg pol) 18 00011000 24
48 Detailed timing/monitor 00 00000000 0
49 descriptor #2 00 00000000 0
4A 00 00000000 0
4B 0F 00001111 15
4C 00 00000000 0
4D 00 00000000 0
4E 00 00000000 0
4F 00 00000000 0
50 00 00000000 0
51 00 00000000 0
52 00 00000000 0
53 00 00000000 0
54 00 00000000 0
55 00 00000000 0
56 00 00000000 0
57 00 00000000 0
58 00 00000000 0
59 20 00100000 32
5A Detailed timing/monitor 00 00000000 0

5B descriptor #3 00 00000000 0
5C 00 00000000 0
5D FE 11111110 254
5E 00 00000000 0
5F Manufacture 41 01000001 65 A
60 Manufacture 55 01010101 85 U
61 Manufacture 4F 01001111 79 O
62 0A 00001010 10
63 20 00100000 32
64 20 00100000 32
65 20 00100000 32
66 20 00100000 32
67 20 00100000 32
68 20 00100000 32
69 20 00100000 32
6A 20 00100000 32
6B 20 00100000 32
6C Detailed timing/monitor 00 00000000 0
6D descriptor #4 00 00000000 0
6E 00 00000000 0
6F FE 11111110 254
70 00 00000000 0
71 Manufacture P/N 42 01000010 66 B
72 Manufacture P/N 31 00110001 49 1
73 Manufacture P/N 34 00110100 52 4
74 Manufacture P/N 30 00110000 48 0
75 Manufacture P/N 52 01010010 82 R
76 Manufacture P/N 54 01010100 84 T
77 Manufacture P/N 4E 01001110 78 N
78 Manufacture P/N 30 00110000 48 0
79 Manufacture P/N 33 00110011 51 3
7A Manufacture P/N 2E 00101110 46 .
7B Manufacture P/N 30 00110000 48 0
7C 20 00100000 32
7D 0A 00001010 10
7E Extension Flag 00 00000000 0
7F Checksum A2 10100010 162

B140RTN03 0

Uploaded by

Copyright:

Available Formats

B140RTN03 0

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

B140RTN03 0

Uploaded by

Copyright:

Available Formats

Product Specification

Model Name B140RTN03.0 (H/W:1A)

Note ( ) LED Backlight with driving circuit design

Customer Date Approved by Date

Lenovo 2012 Jonken Fan 08/23/2012

Queena Lee 08/13/2012

Note: This Specification is subject to change NBBU Marketing Division

B140RTN03.0 Document Version : 0.2 Page 1 of 32

B140RTN03.0 Document Version : 0.2 Page 2 of 32

Version and Date Page Old description New Description Remark

0.2 2012/8/13 13 None Add PDD / IDD typical value

19 Correct pin assignment (Pin1)

B140RTN03.0 Document Version : 0.2 Page 3 of 32

B140RTN03.0 Document Version : 0.2 Page 4 of 32

Pixels H x V 1600 x 3 (RGB) x 900

Pixel Pitch [mm] 0.1935 x 0.1935

Pixel Format R.G.B. Vertical Stripe

Display Mode Normally White

White Luminance [cd/m2] 250 typ. (5 points average)

Support Color 262K colors ( RGB 6-bit )

B140RTN03.0 Document Version : 0.2 Page 5 of 32

2.2 Optical Characteristics

B140RTN03.0 Document Version : 0.2 Page 6 of 32

Note 1: 5 points position (Ref: Active area)

Note 2: 13 points position (Ref: Active area)

Note 4: Measurement method

B140RTN03.0 Document Version : 0.2 Page 7 of 32

LCD Panel TFT-LCD Module

Center of the screen

L (x) is corresponding to the luminance of the point X at Figure in Note (1).

Note 6 ： Definition of contrast ratio:

Brightness on the “White” state

Note 7 ： Definition of Cross Talk (CT)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

B140RTN03.0 Document Version : 0.2 Page 8 of 32

Note 8: Definition of response time:

B140RTN03.0 Document Version : 0.2 Page 9 of 32

Note 9. Definition of viewing angle

B140RTN03.0 Document Version : 0.2 Page 10 of 32

3. Functional Block Diagram

B140RTN03.0 Document Version : 0.2 Page 11 of 32

4. Absolute Maximum Ratings

4.1 Absolute Ratings of TFT LCD Module

4.2 Absolute Ratings of Environment

Operating Range Storage Range

B140RTN03.0 Document Version : 0.2 Page 12 of 32

Typical Measurement Condition : Mosaic Pattern

Note 2：Measure Condition

Vin rising time

5.1.2 Signal Electrical Characteristics

Signal electrical characteristics are as follows;

Display port main link

Fallow as VESA display port standard V1.1a

B140RTN03.0 Document Version : 0.2 Page 14 of 32

Display Port AUX_CH signal:

Display port AUX_CH

Fallow as VESA display port standard V1.1a.

Display Port VHPD signal:

Display port VHPD