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Dlca Sums

Computer Engineering Mumbai University

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8 views6 pages

Dlca Sums

Computer Engineering Mumbai University

Uploaded by

inspirationalsunny368
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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M 2's C of M 2's C of Q Q

-5 5 4 -4
M = -5 1011 101 (4 bits) 100 (4 bits) 1100 0 0 ARS --> Arithmetic Right Shift
Q=4 1 0 A - M and ARS A + 2's C of M
Count Sr. No. A Q3 Q2 Q1 Q0 Q-1 Opeartion 0 1 A + M and ARS A+M
4 0 0 0 0 1 1 0 0 0 ARS 1 1 ARS --> Arithmetic Right Shift

3 1 0 0 0 0 0 1 1 0 0 ARS

2 2 0 0 0 0 0 0 1 1 0 A - M and ARS

1 0 0 0 0 A
o 1 0 1 2's C of M
3
0 1 0 1 0 0 1 1 0
0 0 1 0 1 0 0 1 1 ARS

4
0 0 0 1 0 1 0 0 1
M 2's C of M 2's C of Q Q
5 -5 4 -4
M = -5 1011 101 (4 bits) 100 (4 bits) 1100 0 0 ARS --> Arithmetic Right Shift
Q=4 1 0 A - M and ARS A + 2's C of M
Count Sr. No. A Q3 Q2 Q1 Q0 Q-1 Opeartion 0 1 A + M and ARS A+M
4 0 0 0 0 1 1 0 0 0 ARS 1 1 ARS --> Arithmetic Right Shift

3 1 0 0 0 0 0 1 1 0 0 ARS

2 2 0 0 0 0 0 0 1 1 0 A - M and ARS

1 0 0 0 0 A
1 0 1 1 2's C of M
3
1 0 1 1 0 0 1 1 0
1 1 0 1 1 0 0 1 1 ARS

1 1 1 0 1 1 0 0 1

MSB =1 Result = Negative, Take 2's C of 11101100 is 00010100 i.e. 10100 --> 20

Thus ANS = - 20
M 2's C of M Q
-5 5 4
M = -5 1011 101 (4 bits) 100 (4 bits) 0 0 ARS --> Arithmetic Right Shift
Q=4 1 0 A - M and ARS A + 2's C of M
Count Sr. No. A Q3 Q2 Q1 Q0 Q-1 Opeartion 0 1 A + M and ARS A+M
4 0 0 0 0 0 1 0 0 0 ARS 1 1 ARS --> Arithmetic Right Shift

3 1 0 0 0 0 0 0 1 0 0 ARS

2 2 0 0 0 0 0 0 0 1 0 A - M and ARS

1 0 0 0 0 A
0 1 0 1 2's C of M
3
0 1 0 1 0 0 0 1 0
0 0 1 0 1 0 0 0 1 A + M and ARS

0 0 0 1 0 A
1 0 1 1 M
4
1 1 0 1 1 0 0 0 1
1 1 1 0 1 1 0 0 0

MSB =1 Result = Negative, Take 2's C of 11101100 is 00010100 i.e. 10100 --> 20

Thus ANS = - 20
Restoring
Restore A<--A+M
M 2's C of M Q
3 3 7
M=3 11 1101 (4 bits) 0111 (4 bits)
Q=7
Count A Q3 Q2 Q1 Q0 Opeartion
4 0 0 0 0 0 1 1 1 Left shift, A-M
0 0 0 0 1 1 1 0 LS
1 1 0 1 A-M
3 1 1 0 1 1 1 1 0 an = 1, Q0 = 0, Restore
0 0 1 1 A+M
0 0 0 0 1 1 1 0 Left shift, A-M
0 0 0 1 1 1 0 0 LS
1 1 0 1 A-M
2 1 1 1 0 1 1 0 0 an = 1, Q0 = 0, Restore
0 0 1 1 A+M
0 0 0 1 1 1 0 0 Left shift, A-M
0 0 1 1 1 0 0 0 LS
1 1 1 0 1 A-M
0 0 0 0 1 0 0 1 an = 0, Q0 = 1
0 0 0 0 1 0 0 1 Left shift, A-M
0 0 0 1 0 0 1 0 LS
1 1 0 1 A-M
0 1 1 1 0 0 0 1 0 an = 1, Q0 = 0, Restore
0 0 1 1 A+M
0 0 0 1 0 0 1 0
Non Restoring
M 2's C of M Q
3 3 8
M=3 11 (5 bits) 11101 (5 bits) 1000 (4 bits)
Q=8
Count A Q4 Q3 Q2 Q1 Q0 Opeartion
5 0 0 0 0 0 0 1 0 0 0 an = 0--> Left shift, A-M
0 0 0 0 0 1 0 0 0 0 LS
1 1 1 0 1 A-M
4
1 1 1 0 1 1 0 0 0 0 an = 1, Q0 = 0
an = 1--> Left shift, A+M
1 1 0 1 1 0 0 0 0 0 LS
0 0 0 1 1 A+M
3
1 1 1 1 0 0 0 0 0 0 an = 1, Q0 = 0
an = 1--> Left shift, A+M
1 1 1 0 0 0 0 0 0 0 LS
0 0 0 1 1 A+M
2
1 1 1 1 1 0 0 0 0 0 an = 1, Q0 = 0
an = 0--> Left shift, A+M
1 1 1 1 0 0 0 0 0 0 LS
0 0 0 1 1 A+M
1
0 0 0 0 1 0 0 0 0 1 an = 0, Q0 = 1
an = 0, A <-- A - M
0 0 0 1 0 0 0 0 1 0 LS
0 1 1 1 0 1 A-M
1 1 1 1 1 0 0 0 1 0 an = 1, Q0 = 0

1 1 1 1 1
0 0 0 1 1
0 0 0 1 0 0 0 0 1 0
R Q
Non Restoring
M 2's C of M Q
3 3 11
M=3 11 (5 bits) 11101 (5 bits) 1011 (5 bits)
Q=8
Count A Q4 Q3 Q2 Q1 Q0 Opeartion
5 0 0 0 0 0 0 1 0 1 1 an = 0--> Left shift, A-M
0 0 0 0 0 1 0 1 1 0 LS
1 1 1 0 1 A-M
4
1 1 1 0 1 1 0 1 1 0 an = 1, Q0 = 0
1 1 1 0 1 1 0 1 1 0 an = 1--> Left shift, A+M
1 1 0 1 1 0 1 1 0 0 LS
0 0 0 1 1 A+M
3
1 1 1 1 0 0 1 1 0 0 an = 1, Q0 = 0
1 1 1 1 0 0 1 1 0 0 an = 1--> Left shift, A+M
1 1 1 0 0 1 1 0 0 0 LS
0 0 0 1 1 A+M
2
1 1 1 1 1 1 1 0 0 0 an = 0, Q0 = 1
1 1 1 1 1 1 1 0 0 0 an = 1--> Left shift, A+M
1 1 1 1 1 1 0 0 0 LS
0 0 0 1 1 A+M
1
0 0 0 1 0 1 0 0 0 1 an = 0, Q0 = 1
0 0 0 1 0 1 0 0 0 1 an = 0--> Left shift, A-M
0 0 1 0 1 0 0 0 1 0 LS
1 1 1 0 1 A-M
0
0 0 0 1 0 0 0 0 1 1 an = 0, Q0 = 1
an = 1, A <-- A + M

0 0 0 1 0 0 0 0 1 1
R Q
2 3

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