0% found this document useful (0 votes)
154 views41 pages

Coa Practical 2024

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
154 views41 pages

Coa Practical 2024

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 41

Computer Organization and Architecture

EXPERIMENT: 1 LOGIC GATES

AIM: To study and verify the truth table of logic gates

LEARNING OBJECTIVE:
 Identify various ICs and their specification.

COMPONENTS REQUIRED:
 Logic gates (IC) trainer kit.
 Connecting patch chords.
 IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, IC 7404, IC 7486

TTL Transistor-transistor logic


ECL Emitter-coupled logic
MOS Metal-oxide semiconductor
CMOS Complementary metal-oxide semiconductor
Logic Design Laboratory Manual 2

PROCEDURE:
1. Check the components for their working.
2. Insert the appropriate IC into the IC base.
3. Make connections as shown in the circuit diagram.
4. Provide the input data via the input switches and observe the output on output LEDs
Logic Design Laboratory Manual 3
Logic Design Laboratory Manual 4
Logic Design Laboratory Manual 6
EXPERIMENT: 2 ADDERS AND SUBTRACTORS

AIM: To realize
i) Half Adder and Full Adder
ii) Half Subtractor and Full Subtractor by using Basic gates and NAND gates

COMPONENTS REQUIRED:
IC 7400, IC 7408, IC 7486, IC 7432, Patch Cords & IC Trainer Kit.
Logic Design Laboratory Manual 7

I. TO REALIZE HALF ADDER

TRUTH TABLE BOOLEAN EXPRESSIONS:


INPUTS OUTPUTS
S=A ⊕ B
A B S C C=A B
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
i) Basic Gates ii) NAND Gates

II. FULL ADDER

TRUTH TABLE
BOOLEAN EXPRESSIONS:
INPUTS OUTPUTS S= A ⊕ B ⊕ C
A B Cin S C
0 0 0 0 0 C=A B + B Cin + A Cin

0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

i) BASIC GATES
Logic Design Laboratory Manual 8

ii) NAND GATES

III. HALF SUBTRACTOR

TRUTH TABLE BOOLEAN EXPRESSIONS:

INPUTS OUTPUTS D=A⊕ B


A B D Br Br = A B
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
Logic Design Laboratory Manual 9

i) BASIC GATES ii) NAND Gates

IV. FULL SUBTRACTOR

TRUTH TABLE BOOLEAN EXPRESSIONS:

INPUTS OUTPUTS D= A ⊕ B ⊕ C
A B Cin D Br Br= A B + B Cin + A Cin
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

i) BASIC GATES
Logic Design Laboratory Manual 10

ii) To Realize the Full subtractor using NAND Gates only


Logic Design Laboratory Manual 12
Logic Design Laboratory Manual 13
BCD adder using two 7483 IC chip

• A BCD adder adds two BCD digits and produces output as a BCD digit. A BCD or
Binary Coded Decimal digit cannot be greater than 9.
• The two BCD digits are to be added using the rules of binary addition. If sum is less than
or equal to 9 and carry is 0, then no correction is needed. The sum is correct and in true
BCD form.
• But if sum is greater than 9 or carry =1, the result is wrong and correction must be done.
The wrong result can be corrected adding six (0110) to it.
• For implementing a BCD adder using a binary adder circuit IC 7483, additional
combinational circuit will be required, where the Sum output S3−S0

• is checked for invalid values from 10 to 15. The truth table and K-map for the same is as
shown:
• The Boolean expression is, Y=S3S2+S3S1
• • The BCD adder is shown below. The output of the combinational circuit should be 1 if Cout
of adder-1 is high. Therefore Y is ORed with Cout of adder 1.

• The output of combinational circuit is connected to B1B2 inputs of adder-2 and B3=B1+0

as they are connected to ground permanently. This makes B3B2B1B0

• = 0110 if Y' = 1.

• The sum outputs of adder-1 are applied to A3A2A1A0

• of adder-2. The output of combinational circuit is to be used as final output carry and the
carry output of adder-2 is to be ignored.

Operations of: (011)BCD+(1001)BCD


Thus,

Cout = 1

S3S2S1S0=0000

Hence, for adder, inputs will be A3A2A1A0=0000

and B3B2B1B0=0110

This will give final output as Cout S3S2S1S0=10110

Therefore, (0111)BCD+(1001)BCD

= (00010110)BCD
EXPERIMENT: 3 MULTIPLEXER AND DEMULTIPLEXER

AIM: To design and set up the following circuit


1) To design and set up a 4:1 Multiplexer (MUX) using only NAND gates.
2) To design and set up a 1:4 Demultiplexer(DE-MUX) using only NAND gates.
3) To verify the various functions of IC 74153(MUX) and IC 74139(DEMUX).
4) To set up a Half/Full Adder and Half/Full Subtractor using IC 74153.

LEARNING OBJECTIVE:
To learn about various applications of multiplexer and de-multiplexer
To learn and understand the working of IC 74153 and IC 74139
To learn to realize any function using Multiplexer

COMPONENTS REQUIRED:
IC 7400, IC 7410, IC 7420, IC 7404, IC 74153, IC 74139, Patch Cords & IC Trainer Kit.

i) 4:1 MULTIPLEXER

4:1
Inputs MUX
Y

E’
Select
inputs
Output Y= E’S1’S0’I0 + E’S1’S0I1 + E’S1S0’I2 + E’S1S0I3
Logic Design Laboratory Manual 22

REALIZATION USING NAND GATES TRUTH TABLE

Select Enable Out


Inputs
Inputs Input puts

S1 S0 E I0 I1 I2 I3 Y
X X 1 X X X X 0
0 0 0 0 X X X 0
0 0 0 1 X X X 1
0 1 0 X 0 X X 0
0 1 0 X 1 X X 1
1 0 0 X X 0 X 0
1 0 0 X X 1 X 1
1 1 0 X X X 0 0
1 1 0 X X X 1 1

VERIFY IC 74153 MUX (DUAL 4:1 MULTIPLEXER)


Logic Design Laboratory Manual 23

ii) DE-MUX USING NAND GATES


Enable Data Select
Outputs
Inputs Input Inputs

E D S1 S0 Y 3 Y 2 Y 1 Y 0
1 0 X X X X X X
0 1 0 0 0 0 0 1
0 1 0 1 0 0 1 0
0 1 1 0 0 1 0 0
0 1 1 1 1 0 0 0

VERIFICATION OF IC 74139 (DEMUX)


TRUTH TABLE

Inputs Outputs
Ea S1 S0 Y3 Y2 Y1 Y0
1 X X 1 1 1 1
0 0 0 1 1 1 0
0 0 1 1 1 0 1
0 1 0 1 0 1 1
0 1 1 0 1 1 1
Logic Design Laboratory Manual 24

HALF ADDER USING MUX:

DESIGN: TRUTH TABLE


SUM CARRY
I0 I1 I0 I1 Inputs Outputs
0 1 0 1 A B S C
2 3 2 3
0 0 0 0
A A’ 0 A
0 1 1 0
CIRCUIT: 1 0 1 0
1 1 0 1

FULL ADDER USING MUX:

DESIGN:
SU M
CA
RRY

I0 I1 I3 I3 I0 I1 I3 I3
0 1 2 3 0 1 2 3
4 5 6 7 4 5 6 7
A A’ A’ A 0 A A 1

TRUTH TABLE
Inputs Outputs
A B C S C
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Logic Design Laboratory Manual 25

FULL ADDER CIRCUIT

HALF SUBTRACTOR USING MUX:

DESIGN:

DIFFERENCE BORROW
I0 I1 I0 I1
0 1 0 1
2 3 2 3
A A’ 0 A’

CIRCUIT: TRUTH TABLE

Inputs Outputs
A B D Br
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
Logic Design Laboratory Manual 26

FULL SUBTRACTOR USING MUX:

DESIGN:
DIFFERENCE BORROW
I0 I1 I2 I3 I0 I1 I2 I3
0 1 2 3 0 1 2 3
4 5 6 7 4 5 6 7
A A’ A’ A 0 A’ A’ 1
TRUTH TABLE
Inputs Outputs
A B C D Br
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

PROCEDURE:
 Check all the components for their working.
 Insert the appropriate IC into the IC base.
 Make connections as shown in the circuit diagram.
 Verify the Truth Table and observe the outputs.

RESULT: Adder and subtractor circuits are realized using multiplexer IC 74153.
EXPERIMENT: 4 MULTIPLEXER AND DEMULTIPLEXER

AIM: To design and set up the following circuit


1) To design and set up a 4:1 Multiplexer (MUX) using only NAND gates.
2) To design and set up a 1:4 Demultiplexer(DE-MUX) using only NAND gates.
3) To verify the various functions of IC 74153(MUX) and IC 74139(DEMUX).
4) To set up a Half/Full Adder and Half/Full Subtractor using IC 74153.

COMPONENTS REQUIRED:
IC 7400, IC 7410, IC 7420, IC 7404, IC 74153, IC 74139, Patch Cords & IC Trainer Kit.

i) 4:1 MULTIPLEXER

4:1
Inputs MUX
Y

E’
Select
inputs
Output Y= E’S1’S0’I0 + E’S1’S0I1 + E’S1S0’I2 + E’S1S0I3
Logic Design Laboratory Manual 22

REALIZATION USING NAND GATES TRUTH TABLE

Select Enable Out


Inputs
Inputs Input puts

S1 S0 E I0 I1 I2 I3 Y
X X 1 X X X X 0
0 0 0 0 X X X 0
0 0 0 1 X X X 1
0 1 0 X 0 X X 0
0 1 0 X 1 X X 1
1 0 0 X X 0 X 0
1 0 0 X X 1 X 1
1 1 0 X X X 0 0
1 1 0 X X X 1 1

VERIFY IC 74153 MUX (DUAL 4:1 MULTIPLEXER)


Logic Design Laboratory Manual 23

ii) DE-MUX USING NAND GATES


Enable Data Select
Outputs
Inputs Input Inputs

E D S1 S0 Y 3 Y 2 Y 1 Y 0
1 0 X X X X X X
0 1 0 0 0 0 0 1
0 1 0 1 0 0 1 0
0 1 1 0 0 1 0 0
0 1 1 1 1 0 0 0

VERIFICATION OF IC 74139 (DEMUX)


TRUTH TABLE

Inputs Outputs
Ea S1 S0 Y3 Y2 Y1 Y0
1 X X 1 1 1 1
0 0 0 1 1 1 0
0 0 1 1 1 0 1
0 1 0 1 0 1 1
0 1 1 0 1 1 1
Logic Design Laboratory Manual 24

HALF ADDER USING MUX:

DESIGN: TRUTH TABLE


SUM CARRY
I0 I1 I0 I1 Inputs Outputs
0 1 0 1 A B S C
2 3 2 3
0 0 0 0
A A’ 0 A
0 1 1 0
CIRCUIT: 1 0 1 0
1 1 0 1

FULL ADDER USING MUX:

DESIGN:
SU M
CA
RRY

I0 I1 I3 I3 I0 I1 I3 I3
0 1 2 3 0 1 2 3
4 5 6 7 4 5 6 7
A A’ A’ A 0 A A 1

TRUTH TABLE
Inputs Outputs
A B C S C
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Logic Design Laboratory Manual 25

FULL ADDER CIRCUIT

HALF SUBTRACTOR USING MUX:

DESIGN:

DIFFERENCE BORROW
I0 I1 I0 I1
0 1 0 1
2 3 2 3
A A’ 0 A’

CIRCUIT: TRUTH TABLE

Inputs Outputs
A B D Br
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
Logic Design Laboratory Manual 26

FULL SUBTRACTOR USING MUX:

DESIGN:
DIFFERENCE BORROW
I0 I1 I2 I3 I0 I1 I2 I3
0 1 2 3 0 1 2 3
4 5 6 7 4 5 6 7
A A’ A’ A 0 A’ A’ 1
TRUTH TABLE
Inputs Outputs
A B C D Br
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

PROCEDURE:
 Check all the components for their working.
 Insert the appropriate IC into the IC base.
 Make connections as shown in the circuit diagram.
 Verify the Truth Table and observe the outputs.

RESULT: Adder and subtractor circuits are realized using multiplexer IC 74153.
EXPERIMENT: 5 DECODERS

AIM: To realize a decoder circuit using basic gates and to verify IC 74LS139

LEARNING OBJECTIVE:
To learn about working principle of decoder
To learn and understand the working of IC 74LS139
To realize using basic gates as well as universal gates

COMPONENTS REQUIRED:
IC74LS139, IC 7400, IC 7408, IC 7432, IC 7404, IC 7410, Patch chords, & IC Trainer Kit

CIRCUIT DIAGRAM:

2:4 DECODER (MIN TERM GENERATOR):

TRUTH TABLE:

INPUT OUTPUT
A B Y0 Y1 Y2 Y3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1

BOOLAEN EXPRESSIONS:
Y 0 = AB
Y1 = AB
Y 2 = AB
Y 3 = AB
Logic Design Laboratory Manual 31

CIRCUIT DIAGRAM:

2:4 DECODER (MAX TERM GENERATOR):

TRUTH TABLE:

INPUT OUTPUT
A B Y0 Y1 Y2 Y3
0 0 0 1 1 1
0 1 1 0 1 1
1 0 1 1 0 1
1 1 1 1 1 0

CIRCUIT DIAGRAM:
PROCEDURE:
1. Make the connections as per the circuit diagram.
2. Change the values of G1, G2A, G2B, A, B, and C, using switches.
3. Observe status of Y0, to Y7 on LED’s.
4. Verify the truth table.

RESULT: Verified the Operation of 3 to 8 Decoder


Logic Design Laboratory Manual 35
Logic Design Laboratory Manual 36

EXPERIMENT: 6 ENCODERS

AIM:
1. To set up a circuit of Decimal-to-BCD Encoder using IC 74147.
2. To design and set up a circuit of Hexadecimal-to-Binary Encoder using IC
3. 74148 Encoders and IC 74157 Multiplexer

LEARNING OBJECTIVE:
To learn about various applications of Encoders
To learn and understand the working of IC 74147 , IC 74148 & IC 74157
To learn to do code conversion using encoders

COMPONENTS REQUIRED:
IC 74147, IC 74148, IC 74157, Patch chords & IC Trainer Kit

CIRCUIT DIAGRAM:

1) DECIMAL-TO BCD ENCODER USING IC 74147.


TRUTH TABLE
INPUTS OUTPUTS
I1 I2 I3 I4 I5 I6 I7 I 8 I 9 A3 A2 A1 A0
1 1 1 1 1 1 1 1 0 0 1 1 0
X X X X X X X 0 1 0 1 1 1
X X X X X X 0 1 1 1 0 0 0
X X X X X 0 1 1 1 1 0 0 1
X X X X 0 1 1 1 1 1 0 1 0
X X X 0 1 1 1 1 1 1 0 1 1
X X 0 1 1 1 1 1 1 1 1 0 0
X 0 1 1 1 1 1 1 1 1 1 0 1
0 1 1 1 1 1 1 1 1 1 1 1 0
1 1 1 1 1 1 1 1 1 1 1 1 1
Logic Design Laboratory Manual 37

2) OCTAL TO BINARY ENCODER USING IC 74148. TRUTH TABLE

Inputs Outputs
1 0 1 2 3 4 5 6 7 2 1 0 S 0

1 X X X X X X X X 1 1 1 1 1
0 1 1 1 1 1 1 1 1 1 1 1 1 0
0 X X X X X X X 0 0 0 0 0 1
0 X X X X X X 0 1 0 0 1 0 1
0 X X X X X 0 1 1 0 1 0 0 1
0 X X X X 0 1 1 1 0 1 1 0 1
0 X X X 0 1 1 1 1 1 0 0 0 1
0 X X 0 1 1 1 1 1 1 0 1 0 1
0 X 0 1 1 1 1 1 1 1 1 0 0 1
0 0 1 1 1 1 1 1 1 1 1 1 0 1

3) HEXADECIMAL TO BINARY ENCODER


Logic Design Laboratory Manual 38

TRUTH TABLE

INPUTS OUTPUTS
I0 I1 I2 I3 I4 I5 I6 I7 I8 I9 I10 I11 I12 I13 I14 I15 Y3 Y2 Y1 Y0
1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 0 0 0
1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 0 1
1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 0 1 0
1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1
1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0
1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1
1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0
0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 0 0 1
1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 0 1 0
1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 0 0 1 1
1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 0 1 0 0
1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 0 1 0 1
1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 0 1 1 0
1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PROCEDURE:
 Check all the components for their working.
 Insert the appropriate IC into the IC base.
 Make connections as shown in the circuit diagram.
 Verify the Truth Table and observe the outputs.

You might also like