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Module 1

Uploaded by

Dheeraj Gm
Copyright
© © All Rights Reserved
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Download as PDF, TXT or read online on Scribd
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MODULE 1

Overview of Digital Design


with Verilog HDL
By
Ms Madhavi Gatty
Asst. Professor
Department of EEE
SJEC
Content
Evolution of computer aided digital circuit design

Emergence of HDLs

Typical design flow

Importance of HDLs

Popularity of Verilog HDL

Trends in HDLs
Evolution of Computer Aided Digital Design
➢ The earliest Digital circuits were designed with

○ Vacuum tubes

○ Transistors

Integrated circuits (ICs) were then invented where logic gates were placed on a
single chip.

■ SSI (Small Scale Integration) : The first integrated circuit where the gate count
was very small

■ MSI (Medium Scale Integration) : circuits with hundreds of gates on a chip.

■ LSI (Large Scale Integration) : thousands of gates

Because of the complexity of these circuits, it was not possible to verify these circuits
on a breadboard.
Evolution of Computer Aided Digital Design

EDA (Electronic Design Automation) techniques began to evolve


■ Circuit and Logic simulation techniques to verify the functionality of building
blocks of about 100 transistors
■VLSI (Very Large Scale Integration): more than 1,00,000 transistors
■ ULSI (Ultra Large Scale Integration) : more than 10,00,000 transistors
Emergence of HDLs
➢ Hardware Description Language (HDL)
○ Allowed designers to model the concurrency of processes found in
hardware elements
○ Verilog HDL and VHDL
○ Verilog HDL originated in 1983
○ VHDL was developed under contract from DARPA (Defense Advanced
Research Projects Agency)
○ Could be used to describe digital circuits at a register transfer level
(RTL)
■ Specify how the data flows between registers and how the design
processes the data
■ Logic synthesis tools can be used to produce gate-level netlist
from the RTL description automatically
■ Used for system - level design
Typical Design Flow
Unshaded blocks show the level
of design representation; shaded
blocks show processes in the
design flow.
Importance of HDL

➢ Difficult to design directly on hardware


➢ Mixed-level modeling and simulation
➢ Easier to explore different design options
➢ Reduce design time and cost
Advantages of HDLs
Advantages compared to traditional schematic-based design
➢ Design with RTL description + logic synthesis tool
➢ Abstract level
➢ Independent to fabrication technology
➢ Reuse when fabrication technology changing
➢ Functional verification can be done early
○ Optimized to meet the desired functionality
➢ Analogous to computer programming
○ Textual description with comments
Different Levels of Abstraction

➢ Architecture / Algorithm Level


○ Describe the functionality (behavior) of a circuit
➢ Register Transfer Logic (RTL) Level
○ Describe the data flow of a circuit
➢ Gate Level
○ Describe the connectivity (structure) of a circuit
➢ Switch Level
Popularity of Verilog
➢ Easy to Learn
➢ Different Level of Abstract
○ Gate level
○ Structural Level
○ Behaviour Level
➢ Most Synthesis tools support Verilog HDL
➢ Fabrication vendors provide Verilog HDL for postlogic
synthesis
➢ Easy to interface with C using Programming Language Interface
(PLL)
Trends in HDL

➢ Higher levels of abstraction


○ Think only in terms of functionality for designing
○ EDA tools take care of the implementation details
➢ Behavioral modeling
○ Design directly in terms of algorithms and the behavior of the
circuit
➢ Formal verification
➢ Supports for Mixed-level design
➢ System-level design in a mixed bottom-up methodology
➢ Use existing Verilog modules, basic building blocks
Thank you

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