SAS An Experimental Tool For Dynamic Pro
SAS An Experimental Tool For Dynamic Pro
209-223
S A S -a n e x p e r im e n t a l to o l f o r d y n a m ic p ro g ra m
s tru c tu re a c q u is it io n a n d a n a ly s is
1. Introduction
Software is presently dominating the cost of computing systems. The price of computer
hardware is falling at a rate of appro,imate!y 28 % p.a. whilst programmer productivity
is rising at only 4-7 % p.a. This indicates an escalating dominance of software costs on
computer systems (Allison, 1980) (see Figure I). The software demand growth rate is
100
~dII •• I c ; : ; . "
90
80
TO
>0
ZO
'0
o
-
&60
estimaled to be in the order of 21-23 % p.a. whilst the software labour force and ilS
productivity per individual are producing a combined growth rate of only 11.5-17 % p.a.
(Boehm, 1976). Recent American government figures indicate tbat, if this trend con-
tinues, by 1990 there will be a shortage of between 1-2 million programmers (Schindler,
1981). One solution to tbis problem would be to substantially raise the level of pro-
grammers' productivity. It is this environment which is motivating the research for new
tools and techniques to lISsist the programmer in his efforts throughout the software
life cycle.
The life cycle of a program may be envisaged as comprising two stages; namely, develop-
ment and maintenance. Software development accounts for approximately 25 % of the
total cost, the remainder being attributed to maintenance (Mills, 1980). An estimate of
the order of expenditure involved is provided by Boehm who reckoned that the annual
cost of software in the United States during 1976 was some 20 billion dollars (Boehm,
1976).
The term 'maintenancc' (Munson, 1981) is misleading because when used in this context,
it refers to the following post delivery activities defined by Swanson (Munson, 1981;
Swanson, 1976) as:
(i) Corrective-fixing a pre-existing error (in either specification or code).
(ii) Adaptive-modifying the software to accommodate environment change.
(iii) Perfective-improving or augmenting the performing capabilities.
Boehm (1976) has defined maintenance as 'the process of modifying existing operalional
software whilst leaving its primary functions intact'. These post-delivery activities usually
continue for considerably longer periods than their corresponding development time
thus accounling for the high maintenance overheads. Reducing any of the activities
defined by Swanson can thus potentially have a profound influence on software ex-
penditure. Unfortunately, as Boehm (Boehm, 1976) has stated 'Despite its size, software
maintenance is a highly neglected activity'. SAS has been constructed to address the
problem of maintenance by providing a tool which can counter the programmers'
intrinsic intellectual limitations (Gries, 1980) by, in the firsl instance, restricting software
complexity and enforcing adherence to structural constructs during software develop-
ment and qualily assurance checks and, in the second instance, supporting maintenance
by providing an aid for deciphering poorly documented or complex code.
1.3 Presen/teehnology
The main impetus for innovation and development of program execution monitoring
tools has been provided by companies with a commercial interest (Marshall, 1978).
Results of such research usually manifest themselves in marketed products. Reported
research is sparse, a fact supported by a recent survey (Plattner & Nievergelt, 1981)
which reports, 'program execution monitoring has been a neglected research topic' and
SAS--a software &IIll1ys1s
system 211
concludes by stating 'program execution monitoring has not received attention com-
mensurate to its practical importance'.
1.3.1 Commercial systems. Commercially available tools which provide facilities for
program execution monitoring are; (i) performance monitors, (ii) logic analysers and
(iii) development-emulation systems.
Performance monitors (Nutt, 1975) are normally used on computer systems which
manage such facilities as multi-user, virtual storage and multiprogramming. They gather
and analyse information concerning the monitored system hy either timing or counting
the occurrence nf specific events or conditions. Activities monitored by these systems
include CPU activity, channel activity and I/O activity. Analysis of this data is then used to
(i) investigate resource utilization, (ii) determine the characteristics of the jnb load, (iii)
remove bottlenecks and (iv) tune software and gather data for system monitoring. Due
to the large quantity of data produced by these systems, the information is normally
gathered and presented statistically. These tools are usually used on large systems and
cost in the region of £40,000 to £150,000,
logic analysers (Marshall, 1978) are tools which log absolute time sequential data
present on a number of parallel channels. Data acquisition may usually be started on the
occurrence of a pre-specified combinational trigger and continues until the analyser
memory is full. Data is normally displayed either as a timing diagram, state map or as a
table. A current trend by manufacturers is the adaptation of logic analysers to directly
support program development by including facilities such as disassemblers. Typically,
a logic analyser may contain 24 channels, a memory depth of 256 words, an operating
speed of 100 MHz and cost between £4000-£8000.
Development systems and hardware emulators (Krummel, 1977) include facilities such
as dynamic tracing and breakpoint execution to aid program development and de-
bugging. Although many systems implement these features in software, some systems,
particularly emulators, provide hardware for this purpose. Professional development and
emulation systems cost in the region of £5000 to £25,000.
1.3.2 Research acrivities. Research activities concerned with prngram execution monitor-
ing are reported in an early paper by Stockham (Stockham, 1965)and a recent paper by
Plattner & Nievergelt (1981). Fryer (1973) has described a dumb system, 'The Memory
Bus Monitor' which utilizes the stream of addresses and data travelling the memory bus
in conjunction with hardware comparitors, timers and counters. These provide such
measures as branch ratio, routine timing and variable behaviour. An eight-word shift
register provides a limited trace facility. lemon (1979) describes an improved version of
the monitor, 'SOVAC', which uses a PDP-l 1/34 to support a graphic terminal, simplify
the user interface and provide an analysis capability. IBM's recent reports have de-
scribed a 'Programable Map aod Trace Instrument-PMATl' (lloyd et aI., 1980) and a
'Program Counter Sampling Tool' (Armbruster et 01., 1978). PMATI maps and traces
program execution by interfacing to the system address hus. The trace function records
the sequential stream of address whilst the mapping facility is implemented by associating
a bit with each possible address occurrence. The program counter sampling tool
periodically samples the instruction counter and increments a counter associated with a
window which the value of the program counter lies between. The window widths and
address space coverage are variable whilst the number of counters and windows is
212 V. Callaghan and Ie. Barker
fixed at 4096. In applications where the loss of time sequential data is not of significance
an advantage of increased sampling periods may be achieved by use of this technique. A
debugging tool 'The Program Tracer' (Antoine et al., 1979) interfaces to the system
address, data and control buses. Upon triggering it llClectivelyacquires data from the
monitored buses according to a set of initialization conditions. The selective acquisition
capability both differentiates it from, and provides a sizeable data reduction over the
conventional logic analysis techniques. Results arc presented as text on either a printer
or YOU. Versions for tracing the ITT 3202, Intel 8085 and the RCA 1802 processors
have been reported.
1.3.2 Summary. The majority of these tools and techniques usc the monitored systems
buses to extract direct program execution data in the form of real time traces. As such,
they arc primarily debugging tools. Performance monitors extract indirect data concern-
ing the effects of the program execution from various system testpoints and perform
analysis to produce certain measures on characteristics of the software. SAS differs from
these tools by directly extracting a fundamental structural program property, performing
analysis and presenting the programmer with data concerning the program's complexity
and structure.
2. T h e S A S s y s te m
SAS consists of a cabinet which houses two single sided, double density 8 in. disc drives,
a power supply, cooling unit and a 12-slot rack containing:
(i) a CPU board;
(ii) a disc controller board;
(iii) two structure table RAM boards;
(iv) an EPROM system software board;
(v) a structure monitor board;
(vi) a control board.
System peripherals include a VDU, a printer, a colour monitor and a data acquisition
probe set.
Figuse 2 shows a block diagram of the SAS system. The personality adaptor interfaces
the program counter or memory address lines of the system under test to the structure
monitor which extracts branch vectors. These vectors are stored in one of two memory
blocks, structure tables I and 2, which in tum may be operated upon, displayed, or
stored on the system discs.
S tru c tu re r n o o lt o r
CloCk
q u a llf Ita to r y
circuits
words which correspond to the value of the program counter i=ediate1y prior and
following a non-incrementally sequential update. It is then possible to reconstruct the
structural properties of the executing program in the form of a directed graph from the
table.
Figure 3 shows a block diagram of the structure acquisition scheme. A probe unit is
connected to either the program counter chip set, computer backplane or a micro-
2I4 V. CaUaghaa aod K. Barker
processor. These probes fetch the program couoter outputs including clock qualificatory
signals through line driving and receiving circuits to the structure monitor. In the struc-
ture monitor the successive addresses are clocked into a two bit shift register which
enable the time adjacent values of the instruction address register to be analysed for a
branch by the succeeding circuitry. Analysis of branch conditions is performed by com-
paring the shift register word corresponding to the instruction address register's latest
value to its former value plus one. An inequality in this comparison indicates that a
branch has taken place and a sequence is initiated which causes the two non-sequential
values of the program counter to be stored in a memory-based structure table.
2.2.2 Structure di.rplay principle. The technique utilized to display the program's
dynamic structure is based upon a directed graph and has been particularly devised for
use in conjunction with small instrument display screens. Essentially it is a circle. the
circumference of which is calibrated to correspond to the portion of memory being
monitored. Branches in the program's normal sequential flow are depicted as chords on
the circle. A clockwise rotation corresponds to the normal positive sequential incrementa-
tion process of the program counter. On a colour display the chords are colour coded to
indicate the direction of the branch, the execution frequency being impressed as the
"""""Y
steff/finish
intensity of the chord. Figure 4 illustrates a measurement being made on a Texas Instru-
ments TM990jIOI which has a simple program containing three loops, two of which arc
nested and a subroutine call.
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labl.
intended 10 be Ignored by SAS or Ih. user is nulled in Ihese tables_ This principle is
utilized by the anal)~ic:ll roulines which null the veclors in locations which have been
either eliminated or made redundant.
,--
216 V. CaJlagIwlaad K . Bark ••.
Five main analysis techniques are employed in SAS which are described in the follow-
ing paragraphs.
(i) YUlor mDgnilude, frequency and window jiltering. Filtering in the SAS context,
refers to the elimination of branch vectors which do not conform to prescribed
conditions. Two types of filtering process are employed in SAS; pre-storage and
post-storage. Pre-storage filters examine and eliminate, if necessary, the branch
vectors as they are acquired before storage. They can be implemented in either
bard ware or software. Post-storage filters process the branch vectors stored in the
structure tables, eliminated vectors being set to zero. Data null vectors are ig-
nored by the output processors of SAS.
M agnitude jiltering. These algorithms such as MA (pre-storage), and MO
(Post-storage) determine the magnitude of each vector and compare this to a
magnitude window supplied by the user. Vectors with a magnitude not between the
limits set by the window arc nulled.
Frequency jiltering. Frequency filtering refers to the elimination of vectors from
a specified table whose frequency of occurrence lies outside the boundaries of a
window supplied by the user. Intrinsically, frequency filtering can be only of a
post storage nature, as pre-storage implementation would imply prior knowledge
of vectors yet ungenerated. An example of this filter is the FO algorithm.
W indoM ' jillering. The elimination of vectors whose source or destination lies
outside a user specified window is referred to as window filtering. WA is a pre-
storage implementation of this algorithm whilst WO is a post-storage version.
(ii) Complexity and struell/re anal)'sis. Computer programs may be assembled using
arbitrary control structures. SAS extracts the branch vectors dynamically from
the program whilst it is running and uses them to fabricate a diagram which
mirrors the program structure. The freedom allowed in being able to use arbitrary
control constructs can lead to the production of highly complex programs which
are difficult to understand, maintain, adapt and test. To combat this type of
complexity, a methodology which allows the programmer to build programs ftom
only a limited set of structures is often adopted. This type of methodology is
already in frequent use amongst high level language programmers who commonly
use the three constructs; linear sequence, selection and iteration (Jensen &
Williams, 1981). Unlike high level languages whose algorithmic implementations
are based on the virtual machine rdIected by the language, low level assembly
languages' algorithmic implementations depend on the actual machine. As such
the use of GOTOs or absolute branches is unavoidable in all but trivial assembly
or machine code programs. Further, it is felt to gain many of the intrinsic ad-
vantages of particular machines a more lIexihle structuring criterion is required.
The approach on SAS is to allow the user the ultimate choice of which structure
criteria is appropriate to apply by placing the structure analysis routines in RAM
which is supported by the system discs and called by the EF command. A measure
of the conformity of a program to specified constructs is presented as the number
of instances in which these programming constructs are violated.
Predicate hranching in the control flow of computer programs can potentially
create control structures which are beyond the management intcllect of program
dcvelopment. maintenance and ada pI ion engineers (Gries, 1980, Mills. 1980).
SA5-a software analysis system 217
V(G)=e-n+2p
where
V(G)x cyclomatic number (complexity measure);
e =number of edges (branch vectors);
n =number of vertices (branch vector nodes);
p =number of connected components (modules).
(iii) Instruction, data separation. A need to separate program data from instruction
addresses occurs in two main instances; program counter tracking which contains
data words embedded in the program memory field and composite instruction-
data tracking which gather data fields from both inside and outside the program
memory area. The latter situation would arise if measurements were made on a
microprocessor without instruction fetch cycle qualifying signals, whilst the
former occurs on systems with such signals. Program counter tracking systems
effectively branch around data blocks producing pseudo branch vectors which are
not part of the program logic flow. Some processors treat the additional words in
multiple word instructions as data words, thus inducing pseudo branch vectors.
These false branch instructions are eliminated by using the 'not instruction fetch'
qualifying signal to produce a data track and negating branch vectors, which
correspond to these data domains. Composite instruction-data tracking results in
the generation of mixed data fields and instruction branch vectors. Intrinsically,
this system eliminates the multiple instruction word pseudo branch problem en-
countered in the former case. The most successful solution to separating the
instruction and data activity is to window filter the program memory area, the
disadvantage being that this requires some prior knowledge of the program being
run. This data operation is called by the SAS command DO.
(iv) Event correlation. A requirement to correlate sections of code with certain events
is evident when programs are being maintained or adapted, in particular when
accompanying documentation is either not available or inadequate. In such
circumstances, the correlation wand of SAS may be used. Essentially, the wand is
an electrical probe which may be placed in contact with the conductor trans-
mitting a signal, related to a section of software. The occurrence of this signal is
then used to cause the structure spy to store the address it is currently monitoring.
218 Y. Callagban and Ie. Barltu
Such values may then be either printed out or. marked on the structure map.
Event correlation on SAS is executed by using the WO and WZ commands.
(v) Structure comparison. SAS has two structure tables the contents of which may be
compared, the results providing a list of branch vectors and events which arc
either equal or not equal.
AND operator. The AND operator, AO, compares the contents of a reference
structure table to an operation structure table. Vectors which arc in the operation
table and not the reference table are set to zero.
EXOR operator. This algorithm, EO, compares the contents of two structure
tables, a reference and operation table. Vectors which appear in both tables arc
nulled in the operation table.
3. SAS application
3.1.1 Hardware. The program counter on modem digital computing machines consists
of either a set of discrete logic integrated circuits or is integrated into a VLSI device
(Osbourne & Kane, 1978; ERA, 1979a, b; Healey, 1979). Discrete program counter
chip sets are now mainly found in mini and mainframe computers where speed is a
primary concern, whilst VLSI circuits dominate the microcomputer, embedded computer
and instrumentation areas. Probes may be readily attached to discrete program counter
integrated circuits, whilst YLSI devices present problems due to inaccessibility of their
program counters. VLS1 circuits may be considered as belonging to one of two groups.
The first and largest group, microprocessors, are CPUs which usually do not contain any
integral memory elements with the exception of registers. The second group-micro-
computers and controllers-are CPUs with integral memory and sometimes I/O chan-
nels such as A/D conversion devices. As microprocessors require external memory
clements, their memory address lines are always available for probing. In contrast,
microprocessor circuits contain integral memory and rarely have their associated memory
address lines externally available and are therefore unsuitable for monitoring by SAS.
The majority of microprocessors provide qualificatory signals to indicate instruction
cycle fetches (see Table I) and where these are provided they are used to gate the memory
bus data to provide an effective program counter. As described earlier, where no in-
struction cycle qualificatory signals are provided window operations may be used to
isolate the relevant data.
Table 1
to complex multi programmed, timeshared and paged systems found in large data pro-
cessing systems (Anderson, 1981). The present configuration of SAS is designed to
monitor the execution of single program systems machine coded from either a compiler,
assembler or by hand, common to instrumentation, embedded and engineering ap-
plications.
3.1.3 Speed. A feature of the structure extraction technique is that tbe sequence of
nodal branch data acquisition is irrelevant as structural data is independent of execution
sequence. Thus, if the monitored program forms a closed loop, as is the case with most
embedded or realtime control systems, the instruction address register can be statistically
sampled rather than traced in real time without incurring loss of structural data. This
means that the monitoring system can be of slower speed thau the monitored system.
3.2 An example application: Location of the hexadecimal word output routine XOP 10
associated with the Texas Instruments TM 990{IOI.I and TM 990140I-3 microcomputer and
m o n ito r
Using SAS there are two principal methods which may be used to determine the memory
position of XOP 10. For clarity any interaction with XOP 12 is ignored.
(i) The first method entails writing two trivial programs, one which includes XOP 10,
the second which is identical except that it does not contain XOP 10. These pro-
grams are shown in Figure 8(a, b). Note that NOP, no operation, is used to replace
XOP 10.
The procedure then is:
SAS-a software analysis system 221
f1aw'e 7(e). Structure table 1 after acquisition Ffcure '(d). Structure table 2 after acquisition
o f v e c to n fro m p ro g ra m (a ), of vectors from program (b).
36A
FIpre 7(1). The contents or sltUc:lUn:table I FIpre 7(J) The dynamic SttuelUR map or pro-
soned and listed usin8 commands SV and LV. Jt210 (a) as p•.•••nted nn the system display.
4. C o n c lu s io n
Program maintenance dominates the cost associated with the software life cycle. Re-
search in this area and that of program execution monitoring is sparce. Escalating soft-
ware costs make the research for new tools to increase software productivity increasingly
urgent. The majority of existing hardware tools place an emphasis on program de-
bugging and often either are very specialized or require the programmer to possess
detailed knowledge of the machine to apply or interpret the results. In contrast, SAS is
concerned with monitoring, analysing and presenting fundamental program properties
which address program design and maintenance rather than debugging. It achieves this
criterion by using a universal hardware technique to extract the dynamic structure of the
software. A method based on directed graphs is used to provide a display particularly
suitable for small instrument screens. It is proposed that such techniques could either be
integrated into a new generation of logic analysers or as part of a universal test tool for
computer programmers.
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