MICROCONTROLLER [BEC405A] MCQs

1. 8051 has inbuilt RAM of:

a) 128 bytes
b) 256 bytes
c) 64 bytes
d) 512 bytes

2. 8051 series has how many 16-bit registers?

a) 2
b) 3
c) 1
d) 0

3. When 8051 wakes up then 0x00 is loaded to which register?

a) PSW
b) SP
c) PC
d) None of the mentioned

4. When the microcontroller executes some arithmetic operations, then the flag bits of which
register are affected?
a) PSW
b) SP
c) DPTR
d) PC

5. If we push data onto the stack then the stack pointer

a) increases with every push
b) decreases with every push
c) increases & decreases with every push
d) none of the mentioned

6. On power up, the 8051 uses which RAM locations for register R0- R7
a) 00-2F
b) 00-07
c) 00-7F
d) 00-0F

7. How many bytes of bit addressable memory is present in 8051-based microcontrollers?

a) 8 bytes
b) 32 bytes
c) 16 bytes
d) 128 bytes

8. A microcontroller at-least should consist of:

a) RAM, ROM, I/O ports and timers
b) CPU, RAM, I/O ports and timers
c) CPU, RAM, ROM, I/O ports and timers
d) CPU, ROM, I/O ports and timers

9. If we say the microcontroller is 8-bit then here 8-bit denotes the size of:
a) Data Bus
b) ALU
c) Control Bus
d) Address Bus

10. Abbreviate CISC and RISC.

a) Complete Instruction Set Computer, Reduced Instruction Set Computer
b) Complex Instruction Set Computer, Reduced Instruction Set Computer
c) Complex Instruction Set Computer, Reliable Instruction Set Computer
d) Complete Instruction Set Computer, Reliable Instruction Set Computer

11. “DJNZ R0, label” is ________ byte instruction.

a) 2
b) 3
c) 1
d) Can’t be determined

12. JZ, JNZ, instructions checked content of _______ register.

a) DPTR
b) B
c) A
d) PSW

13. When the call instruction is executed the topmost element of stack comes out to be
a) the address where stack pointer starts
b) the address next to the call instruction
c) address of the call instruction
d) next address of the stack pointer

14. LCALL instruction takes

a) 2 bytes
b) 4 bytes
c) 3 bytes
d) 1 byte

15. What is the meaning of the instruction MOV A,05H?

a) data 05H is stored in the accumulator
b) fifth bit of accumulator is set to one
c) contents of address 05H is stored in the accumulator
d) none of the mentioned

16. Do the two instructions mean the same?

1) BACK: DEC R0
 JZ BACK

2) BACK: DJNZ RO, BACK

a) yes
b) no
c) cannot be determined
d) yes and the second one is preferred

17. When we add two numbers the destination address must always be.
a) some immediate data
b) any register
c) accumulator
d) memory

18. DAA command adds 6 to the nibble if:

a) CY and AC are necessarily 1
b) either CY or AC is 1
c) no relation with CY or AC
d) CY is 1

19. If SUBB A, R4 is executed, then actually what operation is being applied?

a) R4+A
b) R4-A
c) A-R4
d) R4+A

20. Which instructions have no effect on the flags of PSW?

a) ANL
b) ORL
c) XRL
d) All of the mentioned

21. ANL instruction is used _______

a) to AND the contents of the two registers
b) to mask the status of the bits
c) all of the mentioned
d) none of the mentioned

22. XRL, ORL, ANL commands have _______

a) accumulator as the destination address and any register, memory or any immediate data
as the source address
b) accumulator as the destination address and any immediate data as the source address
c) any register as the destination address and accumulator, memory or any immediate data
as the source address
d) any register as the destination address and any immediate data as the source address
23. To initialize any port as an output port what value is to be given to it?
a) 0xFF
b) 0x00
c) 0x01
d) Port is by default an output port

24. Which out of the four ports of 8051 needs a pull-up resistor for using it is as an input or
an output port?
a) PORT 0
b) PORT 1
c) PORT 2
d) PORT 3

25. Which of the ports act as the 16-bit address lines?

a) PORT 0 and PORT 1
b) PORT 1 and PORT 2
c) PORT 0 and PORT 2
d) PORT 1 and PORT 3

26. Which of the following registers are not bit addressable?

a) SCON
b) PCON
c) A
d) PSW

27. Which instruction is used to check the status of a single bit?

a) MOV A, P0
b) ADD A, #05H
c) JNB PO.0, label
d) CLR P0.05H

28. Which addressing mode is used in pushing or popping any element on or from the
stack?
a) immediate
b) direct
c) indirect
d) register

29. Which operator is the most important while assigning any instruction as register indirect
instruction?
a) $
b) #
c) @
d) &

30. What is the advantage of register indirect addressing mode?

a) it makes use of registers R0 and R1
b) it uses the data dynamically
c) it makes use of operator @
d) it is easy

31. Which of the following comes under the indexed addressing mode?
a) MOVX A, @DPTR
b) MOVC @A+DPTR, A
c) MOV A,R0
d) MOV @R0,A

32. Is this a valid statement?

SETB A
a) yes
b) no
c) cannot be determined
d) none of the mentioned

33. What is the clock source for the timers?

a) some external crystal applied to the micro-controller for executing the timer
b) from the crystal applied to the micro-controller
c) through the software
d) through programming

34. What is the frequency of the clock that is being used as the clock source for the timer?
a) some externally applied frequency f’
b) controller’s crystal frequency f
c) controller’s crystal frequency /12
d) externally applied frequency/12

35. What is the function of the TMOD register?

a) TMOD register is used to set various operation modes of timer/counter
b) TMOD register is used to load the count of the timer
c) Is the destination or the final register where the result is obtained after the operation of
the timer
d) Is used to interrupt the timer

36. Auto reload mode is allowed in which mode of the timer?

a) Mode 0
b) Mode 1
c) Mode 2
d) Mode 3

37. Find out the rollover value for the timer in Mode 0, Mode 1 and Mode 2?
a) 00FFH,0FFFH, FFFFH
b) 1FFFH,0FFFH, FFFFH
c) 1FFFH,FFFFH,00FFH
d) 1FFFH,00FFH,FFFFH

38. What steps are followed when we need to turn on any timer?
a) load the count, start the timer, keep monitoring it, stop the timer
b) load the TMOD register, load the count, start the timer, keep monitoring it, stop the timer
c) load the TMOD register, start the timer, load the count, keep monitoring it, stop the timer
d) none of the mentioned

39. If Timer 0 is to be used as a counter, then at what particular pin clock pulse need to be
applied?
a) P3.3
b) P3.4
c) P3.5
d) P3.6

40. TF1, TR1, TF0, TR0 bits are of which register?

a) TMOD
b) SCON
c) TCON
d) SMOD

41. What should be done if we want to double the baud rate?

a) change a bit of the TMOD register
b) change a bit of the PCON register
c) change a bit of the SCON register
d) change a bit of the SBUF register

42. When an interrupt is enabled, then where does the pointer moves immediately after this
interrupt has occurred?
a) to the next instruction which is to be executed
b) to the first instruction of ISR
c) to a fixed location in memory called interrupt vector table
d) to the end of the program

43. After RETI instruction is executed then the pointer will move to which location in the
program?
a) next interrupt of the interrupt vector table
b) immediate next instruction where interrupt is occurred
c) next instruction after the RETI in the memory
d) none of the mentioned

44. Which pin of the external hardware is said to exhibit INT0 interrupt?
a) pin no 10
b) pin no 11
c) pin no 12
d) pin no 13

45. Which bit of the IE register is used to enable TxD/RxD interrupt?

a) IE.D5
b) IE.D2
c) IE.D3
d) IE.D4
46. Which of the following combination is the best to enable the external hardware interrupt
0 of the IE register (assuming initially all bits of the IE register are zero)?
a) EX0=1
b) EA=1
c) any of the mentioned
d) EX0=1 & EA=1

47. Why normally LJMP instructions are the topmost lines of the ISR?
a) so as to jump to some other location where there is a wider space of memory available to
write the codes
b) so as to avoid overwriting of other interrupt instructions
c) all of the mentioned
d) none of the mentioned

48. What is the correct order of priority that is set after a controller gets reset?
a) RI/TI > TF1 > TF0 > INT1 > INT0
b) RI/TI < TF1 < TF0 < INT1 < INT0
c) INT0 > TF0 > INT1 > TF1 > RI/TI
d) INT0 < TF0 < INT1 < TF1 < RI/TI

49. How are the status of the carry, auxiliary carry and parity flag affected if the write
instructions
MOV A,#9CH
ADD A,#64H
a) CY=0,AC=0,P=0
b) CY=1,AC=1,P=0
c) CY=0,AC=1,P=0
d) CY=1,AC=1,P=19.

50. In unsigned number addition, the status of which bit is important?

a) OV
b) CY
c) AC
d) PSW