12078 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO.

10, OCTOBER 2023

Decoupled Modeling and Wide-Range Power

Distribution Strategy for the Multisource
Inverter in Microgrids
Lijie Liu, Dehong Zhou , Senior Member, IEEE, Jianxiao Zou , Member, IEEE, and Weijun Wang

Abstract—Multisource inverter (MSI) provides a low-cost and iH , iL Output currents of high-voltage and low-
high-power-density solution for microgrids (MGs) applications due voltage ports.
to the removal of the dc/dc converter, which offers direct power flow Sx1 , . . ., Sx4 Switching states in phase x.
between the dc-side and the ac-side. The existing modulation strate-
gies for the MSI transplanted from those of multilevel inverters Dxu , Dxl Duty cycles of Sx1 and Sx2 .
experience a limited power distribution range due to the finite con- Voutx Output voltage vector in phase x.
trol freedom of degree provided by redundant vectors. Moreover, VU y , VLy Output voltage vectors of modeled upper and
the power distribution between the dc ports is highly coupled with lower inverters.
the vector synthesis, this is especially true when the voltages of the
Vgref , fgref Rated grid voltage and current.
dc port are unbalanced. To address the aforementioned issue, this
article proposes a decoupled modeling method and a wide-range Vref , Iref Reference voltage and current vectors.
power distribution strategy for the MSI. The decoupled model is P1 , P2 Output power of high-voltage and low-voltage
proposed to simplify the modulation implementation process and ports.
power distribution analysis. In the proposed model, the reference P1ref Reference power of high-voltage ports.
voltage vector of the MSI is proportionally decomposed into two
PU , PL Output power of modeled upper and lower in-
decoupled parts, which can be generated independently. As a result,
it can not only avoid complex modulation calculations but also en- verters.
sure decoupled power distribution. Moreover, detailed theoretical P, Q Active power and reactive power of ac-side.
analysis indicates that the proposed solution can offer an expanded Pref , Qref Reference active power and reactive power of
power distribution range by increasing the switching actions in one the ac side.
switching cycle. Finally, the effectiveness of the porposed power ξ Proportionality factor of reference voltage vec-
distribution strategy is verified by islanded MGs experimental tests.
tor decomposition.
Index Terms—Decoupled modeling, hybrid energy systems, ξmin , ξmax Minimum and maximum value of ξ.
multisource inverter (MSI), multiple-carrier modulation, power K P , KI Proportional-integral (PI) controller parameters
distribution.
in the power control loop.
TU z , TLz Dwell time in modeled upper and lower invert-
NOMENCLATURE ers.
VH , VL DC voltages of high-voltage and low-voltage dxu , dxl Duty cycles in modeled upper and lower invert-
ports. ers.
V1 , V2 DC voltages of upper and lower dc-side capac- dou , dol Zero-sequence injections in modeled upper and
itors. lower inverters.
du min , dl max Minimum of and dxu and maximum value of
dxl .
Manuscript received 20 December 2022; revised 11 May 2023; accepted
6 June 2023. Date of publication 12 June 2023; date of current version 1 dxl , dxl Modified duty cycles in modeled upper and
September 2023. This work was supported in part by the National Natural lower inverters.
Science Foundation of China under Grant 62173067, in part by the Natu- η1 , η2 Output power ratio of high-voltage and low-
ral Science Foundation of Sichuan Province under Grant 2023NSFSC0298,
and in part by the Shenzhen Science and Technology Program under Grant voltage ports.
JCYJ20220530165001003. Recommended for publication by Associate Editor Ptotal Total output power of two dc ports.
D. Mahinda. (Corresponding author: Dehong Zhou.) ηs System efficiency.
Lijie Liu and Weijun Wang are with the School of Automation Engineering,
University of Electronic Science and Technology of China, Chengdu 611731,
China (e-mail: [email protected]; [email protected]).
Dehong Zhou and Jianxiao Zou are with the School of Automation Engi- I. INTRODUCTION
neering, University of Electronic Science and Technology of China, Chengdu
ENEWABLE energy sources (RESs) such as wind and
611731, China, and also with the Shenzhen Institute for Advanced Study,
University of Electronic Science and Technology of China, Shenzhen 518110,
China (e-mail: [email protected]; [email protected]).
R photovoltaic (PV) play significant roles in tackling the
fossil energy source shortage and environmental pollution chal-
Color versions of one or more figures in this article are available at
https://doi.org/10.1109/TPEL.2023.3285008. lenges [1], [2]. However, high penetration of RESs is more likely
Digital Object Identifier 10.1109/TPEL.2023.3285008 to cause power/frequency fluctuations, voltage deviations, and

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 LIU et al.: DECOUPLED MODELING AND WIDE-RANGE POWER DISTRIBUTION STRATEGY 12079

charge (SOC) in the ESS. As a result, output voltage vectors

of MSI distribute asymmetrically. Therefore, the conventional
modulation strategies for a three-level converter could not be
adopted in the MSI. Numerous advanced modulation strategies
have been investigated for three-level converters with unbal-
anced port voltages. A simplified pulsewidth modulation (PWM)
strategy for a three-level converter with unbalanced dc-link was
proposed to achieve high-quality output voltages and maximize
the linear modulation range [17]. A two-stage modulation strat-
egy is proposed to produce the undistorted current even in the
presence of unevenly distributed space vectors [18]. To suppress
output harmonics and maximize the linear modulation region, as
well as to reduce switching losses, an analytical discontinuous
space vector PWM is proposed for three-level inverters with
unbalanced dc links [19]. To reduce the common-mode voltage
and obtain high-quality output current, a carrier-based modu-
lation is proposed for a three-level converter with unbalanced
neutral-point voltage conditions [20]. A hybrid PWM strategy
Fig. 1. Configurations of the MSI. (a) Concept with ideal switches. (b) T-NPC
type. (c) I-NPC type. composed of carried-based PWM and discontinuous PWM is
proposed to generate high-quality ac voltages [21]. A carrier-
based PWM strategy is proposed to improve the power conver-
sion efficiency [22]. Although the aforementioned modulation
even system instability in microgrids (MGs) applications [3]. strategies are effective under unbalanced port voltages and have
To tackle the aforementioned challenges, an attractive solution achieved a beneficial system performance, they could not be
is called energy storage technology, which can absorb or re- directly transplanted to the MSI because the major modulation
lease energy on demand [4]. An energy storage system (ESS) target for the MSI is to achieve flexible power control under
contributes to the integration of RESs into the MGs by power unbalanced port voltages.
quality improvement and smoothing power fluctuations. Multi- To realize the flexible power flow in the MSI, the dc-port
source systems composed of the RES and ESS can meet the ac power should be decoupled to meet the demand of RES/ESS,
MGs/load demand with high reliability and at moderate costs [5]. e.g., maximum power point tracking for PV modules. In addi-
Hence, multisource systems have gained considerable attention tion, an expanded power distribution range is required so that
in recent years [6], such as PV-battery hybrid systems [7], [8]. more RES generated energy can be harvested. Some previous
The multisource inverter (MSI) is a promising solution for the studies have made useful explorations for decoupled port power
integration of RES and ESS in MGs applications, which directly control. A unified model predictive control scheme is proposed
transfers power from RES/ESS to the ac-side without any dc/dc for the desirable port power management of the multiport in-
converters or magnetic elements [9], [10], [11], [12]. Fig. 1(a) verter [23]. However, the power distribution range is not ad-
shows its concept with ideal switches. The motivation of the dressed. A general control scheme is proposed for realizing
MSI is to improve the system efficiency and power density [13]. independent port power tracking of the dual-input three-level
As shown in Fig. 1(a), MSI offers one-stage power conversion inverter [24]. This method enhances the power distribution range
from RES/ESS to the ac-side. The RES dc port is unidirectional, effectively but brings the time-consuming control design. The
such as PV generation is adopted. And the ESS dc port is bidi- modulation-based power-sharing strategies can regulate port
rectional, for instance, the battery should be charged/discharged power effectively and show clear physical meaning [25], [26],
to compensate for the system power difference. In Fig. 1(a), the [27], [28], [29], [30]. Power sharing between two dc ports can
MSI topology essentially is a variant of a three-level inverter. be regulated by altering the small vectors in [25] and [26]. Un-
The three-level inverter is an attractive solution used as the MSI fortunately, the power-sharing capacity is not discussed in [25]
due to it offering low voltage/current stresses and high power and [26]. Decoupling port power distribution has been achieved
quality. The topology of the MSI can be constructed from the by regulating the dwell time of positive/negative small vectors
conventional three-level neutral-point-clamped (NPC) inverter in [27] and [28] and zero vector in [29] and [30]. Moreover,
by adding a dc port. Fig. 1(b) and (c) give the T-NPC type and the detailed power distribution range is given in [27], [28], [29],
I-NPC type implementations of the MSI. The T-NPC circuit is and [30]. However, the power distribution range is limited due
utilized to connect different level dc voltages in [14] and [15]. to the freedom of degree provided by the redundant small/zero
And the I-NPC circuit is adopted to integrate two dc sources vector being finite in the modulation process. This calls for a
in [16]. wide-range power distribution strategy for the MSI to increase
Though outstanding advantages could be achieved by the the energy harvested by RES and stored by the ESS.
MSI, it is challenging to design a modulation for the MSI due to To obtain flexible power control under unbalanced port volt-
the unbalanced port voltage feature. Unbalanced port voltages ages, this article proposes a decoupled model, in which the
are caused by intermittent RES generation and variable state of reference voltage vector is proportionally decomposed into two

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 12080 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO. 10, OCTOBER 2023

TABLE I
SWITCHING STATES AND OUTPUT VOLTAGES IN EACH PHASE

Fig. 2. Topology of the MSI with I-NPC-based circuit.

independent parts. With the proposed modeling method, the Fig. 3. Output voltage vectors of the MSI: (a) V2 > V1 , (b) V2 = V1 , and
MSI is modeled as two two-level inverters to generate the (c) V2 < V1 .
decomposed voltage. As a result, not only complex modulation
problems caused by unbalanced dc-link can be avoided, but also
independent port power control can be achieved. On top of that, VL , and 0, respectively. Fig. 3 shows output voltage vectors of
a multiple-carrier modulation is proposed for the equivalent the MSI: (a) V2 > V1 , (b) V2 = V1 , and (c) V2 < V1 . Output
models to output the decomposed voltage. By increasing the voltage vectors of the MSI are distributed unevenly due to the
switching actions in one switching cycle, the power distribution unbalanced port voltages.
range is expanded. The effectiveness of the proposed solution In this study, the high-voltage port-1 is connected to a uni-
is verified by detailed theoretical analysis and islanded MGs directional dc-source, such as PV. While the low-voltage port-2
experimental tests. is connected to a bidirectional dc-source, such as battery ESS.
The rest of this article is organized as follows. The MSI Therefore, the following three operation modes of the MSI are
and proposed modeling method are illustrated in Section II. considered.
Section III provides the proposed multiple-carrier modulation 1) Mode I: Only high-voltage port-1 supports the ac-side.
and power distribution strategy. Power distribution analysis is 2) Mode II: High-voltage port-1 and low-voltage port-2 sup-
given in Section IV. The experimental tests are conducted in port the ac-side together.
Section V. Finally, Section VI concludes this article. 3) Mode III: High-voltage port-1 not only supports the ac-
side but also charges to low-voltage port-2.
II. MSI AND PROPOSED MODELING METHOD In summary, the MSI has two system problems, i.e., unevenly
distributed voltage vectors caused by unbalanced port voltages
This section first introduces the topology and operation modes and coupled port power caused by complex operation modes.
of the MSI. Then, a decoupled modeling method for the MSI is The modulation strategy of the conventional 3L-NPC could not
proposed. be transplanted to the MSI directly. Hence, an effective strategy
is required to solve the aforementioned problems simultane-
A. Topology and Operation Modes of the MSI ously.
The topology of the MSI with the I-NPC-based circuit is
shown in Fig. 2. In this study, the I-NPC-type MSI is selected B. Decoupled Modeling Method for the MSI
and adopted for MGs applications. The MSI connects to ac To achieve flexible port power control under unbalanced port
MGs with an LC filter. The voltages of two dc inputs are VH voltages, the decoupled modeling for the MSI is proposed in
and VL . The dc port connected between P and N is defined as Fig. 4. The modeling principle is given as follows. To simplify
high-voltage port-1, and another dc port connected between O the analysis, the duty cycles for Sx1 and Sx2 are defined as Dxu
and N is defined as low-voltage port-2. In general, the dc-port and Dxl (x = a, b, c). Then, the output voltage vector of the MSI
voltages are unbalanced due to unpredictable RES generation can be expressed as follows:
and variable SOC of ESS. Then, the dc-side capacitor voltages
can be calculated as V1 = VH − VL and V2 = VL . And the Voutx = Dxu VH + (Dxl − Dxu )VL (1)
output currents of high-voltage port-1 and low-voltage port-2
where Voutx is the output voltage vector in phase x. Moreover,
are iH and iL .
(1) can be rewritten as follows:
To describe the operating principle of the MSI clearly,
Table I gives the switching states and output voltages in each Voutx = Dxu (VH − VL ) + Dxl VL
phase. The switching state in each phase Sx =P, O, N (x =
= Dxu V1 + Dxl V2 . (2)
a, b, c) is determined by the combinations of switching function
Sx1 Sx2 Sx3 Sx4 (1 means closed and 0 means open). Output It can be concluded that the output voltage vector of the MSI can
voltages corresponding to the three switching states are VH , be generated by two inverters with dc-link voltages V1 and V2 .

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 LIU et al.: DECOUPLED MODELING AND WIDE-RANGE POWER DISTRIBUTION STRATEGY 12081

TABLE II
EQUIVALENT OUTPUT VOLTAGE VECTORS OF THE LOWER/UPPER INVERTER
AND RESPONDING SWITCHING STATES OF THE MSI

Fig. 4. Decoupled modeling method for the MSI. (a) Equivalent circuit of
modeled inverters. (b) Space vector diagram of modeled inverters. Fig. 5. Multiple-carrier modulation-based power distribution strategy.

voltages is avoided as the synthesis of reference voltage vector

Hence, the MSI is decoupled into the upper and lower inverters
can be conducted in the two-level converer frame. Hence, the
in this study.
complexity of the modulation strategy is greatly reduced with
Modeling the three-level converter into the two-level one is an
this modeling method. In addition, decoupled port power can be
existing method, which is effective to reduce the computational
obtained by decomposing the reference voltage vectors. Detailed
burden. A three-level converter has conversed into a two-level
reference voltage vector distribution and responding port power
one through the coordinate transformation in [31] and [32].
analysis would be discussed in Section III.
Based on the vector-shifted method, the three-level NPC can
be simplified as a two-level converter in [33]. However, the
proposed decoupled method is essentially different from the III. PROPOSED MULTIPLE-CARRIER MODULATION-BASED
existing methods in [31], [32], and [33]. The existing methods POWER DISTRIBUTION STRATEGY
are based on the mathematical transformation [31], [32], [33]. The multiple-carrier modulation-based power distribution
On the contrary, the proposed method shows clearly physical strategy is shown in Fig. 5. The MSI is operated in an islanded
meaning. As shown in Fig. 4, The dc sources of the MSI can be MG mode. In this study, the double-loop proportional-integral
considered as two independent ones with voltages V1 and V2 . By (PI) control is adopted to track rated grid voltage/frequency
separating the two virtual dc sources, the MSI is modeled as two Vgref /fgref and generate reference voltage vector Vref . The
independent two-level inverters, i.e., the upper inverter and the double-PI control is composed of the voltage control loop and
lower inverter. Fig. 4(a) shows the equivalent circuit of modeled current control loop. And this method has been widely adopted
inverters. The dc-link voltages of the upper and lower inverters in MGs applications, the detailed block diagram can be found
are V1 and V2 , respectively. Considering that V1 only supports in [34]. On the dc-side, a power PI control is utilized to track
the ac-side in the case of Sx1 = 1, while V2 only supports the port-1 reference power P1ref , where P1ref can be obtained from
ac-side in the case of Sx2 = 1, the equivalent switching tubes the MGs power management strategy [35]. The output of the
for the upper inverter and lower inverter are selected as Sx1 /Sx3 power PI controller is parameter ξ, which plays an important
and Sx2 /Sx4 . Hence, the output switching states of the upper role in reference voltage vector distribution. Then, Vref would
and lower inverters can be regarded as N/O and O/P. Fig. 4(b) be synthesized by the multiple-carrier modulation.
gives the space vector diagram of modeled inverters, where As analyzed in Section II, the modulation design can be
VU y and VLy (y = 0, 1, 2, 3, 4, 5, 6) are the equivalent output simplified by the power-decoupled model. Thus, the multiple-
voltage vectors of the upper/lower inverter, respectively. The carrier modulation is derived based on the decoupled model. The
equivalent output voltage vectors of the lower/upper inverter and target of modulation is to achieve flexible power control under
responding switching states of the MSI are shown in Table II. unbalanced port voltages. Hence, decoupled port power analysis
Based on the proposed modeling method, the reference volt- based on the modeled inverters is first proposed. Then, multiple-
age vector is decomposed into two parts, which can be generated carrier modulation is proposed for the modeled inverters thanks
by the upper/lower inverter. Then, compared to conventional to its natural advantages, i.e., generating the decomposed voltage
modulation calculation in the three-level converter frame, the vector independently. The proposed modulation includes the
number of switching states is reduced from 27 to 16. Moreover, following parts: duty cycle calculation for the upper/lower in-
complicated triangle-function calculation under unbalanced port verter in the two-level converter frame, zero-sequence injection

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 12082 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO. 10, OCTOBER 2023

Fig. 7. Block diagram of the power control loop.

Fig. 6. Results of reference voltage vector distribution and responding active

power. where P1 /P2 is the dc-side high-/low-voltage port active power.
P1 /P2 can be calculated as
⎧ 
⎨P1 = (V1 + V2 )iH = (V1 + V2 ) (Dxu ix )
for modifying the duty cycle, and multiple-carrier comparison  x=a,b,c
(8)
for switching states generation. The detailed implementation ⎩ P 2 = V 2 iL = V 2 [(Dxl − Dxu )ix ]
x=a,b,c
process of each part is shown in the following text.
where ix (x = a, b, c) is the ac-side current. Due to the equivalent
switching tubes for the upper inverter and lower inverter being
A. Decoupled Port Power Analysis Based on Modeled
considered as Sx1 /Sx3 and Sx2 /Sx4 , the active power of the
Inverters
upper/lower inverter PU /PL can be represented as
Fig. 6 gives the results of reference voltage vector distribution ⎧ 
⎪
⎨P U = V 1 (Dxu ix )
and responding active power. For the unit power factor condition,
x=a,b,c

the voltage reference Vref is always synchronous with the current (9)
⎪
⎩PL = V2 (Dxl ix ) .
reference Iref . To ensure the reactive power remains zero, the x=a,b,c
voltage reference Vref is proportionally distributed to the upper
Then, relationship between P1 /P2 and PU /PL can be derived
and lower inverters. The reference voltage of the lower inverter
from (8) and (9) as
is set as ξVref , and the reference voltage of the upper inverter 
is set as (1 − ξ)Vref , where ξ is the proportionality factor. To P1 = V1V+V 2
PU
1
avoid the overmodulation problem of the upper/lower inverter, V2 (10)
P2 = − V 1 PU + PL .
ξ should satisfy the following equation:
 Due to the MSI and upper/lower inverter sharing the same
V1
(1 − ξ)Vref ≤ √
3
current Iref , it can be concluded from (6) that the active power
V2 (3) of the upper/lower inverter is proportional to the voltage vector,
ξVref ≤ √ 3
.
i.e., PU /PL is determined by ξ as

Then, the domain of ξ can be obtained as follows: PU = (1 − ξ)Pref
(11)
PL = ξPref .
ξmin ≤ ξ ≤ ξmax (4)
Therefore, flexible power control of PU /PL can be achieved
where by regulating ξ. Based (10) and (11), decoupled dc-port power
P1 and P2 can be realized by designing ξ. And vice versa, the
 V1
ξmin = 1 − √3V proportionality factor ξ can be obtained by controlling the dc-
V2
ref
(5) port powers P1 and P2 . In the case of constant grid active power,
ξmax = √3V .
ref desired ξ can be obtained by only regulating P1 . The relationship
between P1 and ξ can be expressed as
Reference vectors Vref can be generated by superimposing
(1 − ξ)Vref and ξVref of the upper and lower inverter. V1 + V2
P1 = (1 − ξ)Pref . (12)
Fig. 6 also gives the active power distribution of the MSI, V1
upper inverter, and lower inverter. In this study, the reactive Hence, a negative feedback control about port power P1 is
power remains zero. Hence, only the active power has been adopted to generate the proportionality factor ξ. Fig. 7 gives
further analyzed. After some simplifications, the ac-side active the block diagram of the power control loop. The closed-loop
power of the MSI can be calculated as transfer function can be expressed as

Pref = 1.5(Vrefα Irefα + Vrefβ Irefβ ) (6) P1 (s)

Φ(s) =
P1ref (s)
where Pref is the reference ac-side active power, Vrefα /Irefα and C1 /P1ref (s) − C1 GPI (s)
Vrefβ /Irefβ are the real and imaginary parts of the reference = (13)
1 − C1 GPI (s)
voltage/current vector. The active power equation of the MSI
can be expressed as where C1 = V1V+V 1
2
Pref is a constant, GPI (s) = KP + KsI is the
transfer function of the PI controller. Then, the system pole s1
P1 + P2 = Pref (7) can be obtained. To guarantee the stability of the system, s1 < 0

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 LIU et al.: DECOUPLED MODELING AND WIDE-RANGE POWER DISTRIBUTION STRATEGY 12083

Fig. 8. Multiple-carrier modulation and its implementation process.

should be satisfied. As a result, the following system stability where dxl (x = a, b, c) is duty cycle for the lower inverter. Sim-
condition can be achieved: ilarly, dxu (x = a, b, c) for the upper inverter can be achieved as
1
KP > . (14) ⎧
⎪ 1 TU 0
C1 ⎨dau = Ts (TU 1 + TU 2 + 2 )
1 TU 0
This system stability condition can be adopted as the guideline dbu = Ts (TU 2 + 2 ) (19)
⎪
⎩d = 1 TU 0
to design the parameters of the PI controller. According to the cu Ts 2 .
aforementioned analysis, the power control system is stable.
C. Zero-Sequence Injection for Modifying Duty Cycle
B. Duty Cycle Calculation for Upper and Lower Inverters
There are three different switching states of the MSI, i.e.,
To generate the decomposed reference voltage vector 1100, 0110, and 0011. It can be concluded that dxu > dxl (x =
(1 − ξ)Vref /ξVref , Fig. 8 gives the multiple-carrier modulation a, b, c) would result in unwanted switching states. To ensure
and its implementation process. The first step is to calculate dxu < dxl , the zero-sequence injection method is adopted. The
the duty cycle for upper and lower inverters according to the injected zero-sequence components for the upper inverter dou
conventional space vector modulation strategy. For the lower and lower inverter dol are designed as follows:
inverter, to synthesize the reference voltage vector ξVref in sector 
I, three nearest vectors VL0 , VL1 , and VL2 are selected. The dou = −1 − du min
(20)
dwell time of each vector can be calculated as dol = 1 − dl max

Ts ξVref = TL1 VL1 + TL2 VL2 + TL0 VL0 where
(15) 
Ts = TL1 + TL2 + TL0 du min = min (dau , dbu , dcu )
(21)
where Ts is the switching period. And the dwell time TLz (z = dl max = max (dal , dbl , dcl )
0, 1, 2) are expressed as are the minimum and maximum value of the original duty
⎧ √ √ cycle, respectively. Then, the modified duty cycle with the
⎪
⎨TL1 = √2V2s
3T
3ξVrefα − ξVrefβ zero-sequence injection can be expressed as
3Ts
T L2 = ξV (16)  
⎪
⎩ V2 refβ
dxu = dxu − 1 − du min
TL0 = Ts − TL1 − TL2 . (22)
dxl = dxl + 1 − dl max .
Similarly, dwell time TU z (z = 0, 1, 2) for the upper inverter can
Afterward, the modified duty cycle in sector I of upper/lower
be achieved as follows:
⎧ √ √ inverter can be rewritten as
⎪ 3T ⎧ 
⎨TU 1 = √2V1s 3(1 − ξ)Vrefα − (1 − ξ)Vrefβ 1
⎨dau = Ts (TU 1 + TU 2 )
3Ts
⎪ T U2 = V1 (1 − ξ)Vrefβ (17)  1
d = T s TU 2 (23)
⎩ ⎩ bu
TU 0 = Ts − TU 1 − TU 2 . dcu = 0
⎧  1
Then, the duty cycle for each phase can be obtained based on ⎨dal = Ts (TL1 + TL2 + TL0 )
the traditional seven-segment PWM strategy  1
d = Ts (TL2 + TL0 ) (24)
⎧ ⎩ bl
⎪ 1 TL0 dcl = T1s TL0 .
⎨dal = Ts (TL1 + TL2 + 2 )
1 TL0
dbl = Ts (TL2 + 2 ) (18) Then, the modified duty cycle dxl /dxu would be adopted as
⎪
⎩d = 1 TL0
cl Ts 2 modulation waveforms to obtain the switching sequences.

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 12084 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO. 10, OCTOBER 2023

Fig. 9. Results of multiple-carrier comparison: Switching states for the upper

inverter, lower inverter, and MSI.

Fig. 11. Port power ratio η2 with different modulation index m and different
port voltage ratio VL /VH .

The active power of high-voltage port-1 can be calculated as

P1 = (V1 + V2 )(dau ia + dbu ib + dcu ic ). (25)
Substituting (23) into (25), P1 can be rewritten as
Fig. 10. Modified duty cycle in phase a and AC-side current. (a) Modified V1 + V2
duty cycles of the upper and lower inverters. (b) AC-side current in one period. P1 = (TU 1 ia − TU 2 ic ). (26)
Ts
In sector I, ia > 0 and ic < 0 are considered. Hence, P1 >
0 should be satisfied. This is consistent with the preset in
D. Multiple-Carrier Comparison for Switching States Section II, i.e., the high-voltage port-1 is unidirectional.
Generation The active power of low-voltage port-2 can be calculated as
Fig. 9 shows the results of multiple-carrier comparison: P2 = V2 [(dal − dau )ia + (dbl − dbu )ib + (dcl − dcu )ic ].
switching sequences for upper inverter, lower inverter, and MSI. (27)
Switching sequences of upper/lower inverters are derived from Substituting (23) and (24) into (27), P2 can be rewritten as
multiple-carrier comparison. dxu products two states (P and O),
V2
which are adopted to control switches Sx1 and Sx3 , dxl products P2 = [(TL1 − TU 1 )ia + (−TL2 + TU 2 )ic ]. (28)
two states (O and N), which are adopted to control switches Sx2 Ts
and Sx4 . Afterward, the switching sequence of the MSI can be Based on (16) and (17), (28) can be rewritten as
constructed by superimposing those of upper/lower inverters. V2
Hence, the MSI outputs a three-level switching sequence. Then, P2 = [(TL1 − M TL1 )ia + (−TL2 + M TL2 )ic ]
Ts (29)
four switching actions in one switching cycle are unavoidable.
(1−ξ)V2
One drawback of the proposed modulation is higher switching where M is defined as M = Especially, P2 = 0 can be
ξV1 .
losses in comparison to the previously modulations. It can be achieved when M = 1. In this case, ξ can be obtained as
concluded from Fig. 9 that this disadvantage is caused by the V2 VL
modified duty cycle. However, the modified duty cycle provides ξ = ξ0 = = . (30)
V1 + V2 VH
a wider power distribution range, which would be discussed in
Section IV. This condition can be considered as the MSI operates in mode
I, and the output power of low-voltage port-2 is zero.

IV. POWER DISTRIBUTION ANALYSIS B. Discussion of Power Distribution Range

In this section, the active power of two dc ports is first Fig. 11 shows port power ratio η2 with different modulation
calculated. Then, the power distribution range and its influence index m and different port voltage ratio VL /VH . The port power
factors are discussed. ratio is defined as
P1 P2
η1 = , η2 = (31)
A. DC-Port Active Power Calculation Ptotal Ptotal
where Ptotal = P1 + P2 is the total output power of two dc ports.
Fig. 10 shows the modified duty cycle in phase a and ac-side
Ignoring the power losses, Ptotal can be formulated as
current. For the sake of simplicity, only modified duty cycle and
ac-side current in sector I are adopted to calculate dc-port power. Ptotal = 3Vref Iref . (32)

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 LIU et al.: DECOUPLED MODELING AND WIDE-RANGE POWER DISTRIBUTION STRATEGY 12085

Fig. 14. Experimental test plant.

TABLE III
Fig. 12. Port power ratio η2 with different port voltage ratio VL /VH under PARAMETERS OF THE TEST SYSTEM
modulation index m = 0.86: Proposed strategy (red line), power distribution
strategy in [28] (blue line).

    
V2 1−ξ 1−ξ
P2 = TL1 −
TL1 ia + −TL2 + TL2 ic
Ts ξ ξ
√ 
3 √  √
= (2ξ − 1) 3Vrefα − Vrefβ ia − 3Vrefβ ic
2
Fig. 13. Port power ratio with different ξ under balanced port voltages. = kξ + C
(33)
where k > 0, and C is independent of ξ. It can be concluded that
P1 /P2 is a monotonically decreasing/increasing function about
In Fig. 11, with the increasing modulation m, the power distri-
ξ. Hence, decoupled port power distribution can be achieved by
bution range decreases. With the decreasing modulation m, the
regulating ξ, i.e., proportionally distributing reference vectors
power distribution range increases but its maximum is limited.
to lower/upper inverters. On the condition of ξ = ξ0 , the MSI
In this study, the modulation index is set as 0.86.
operates at mode I, η1 = 1 and η2 = 0 have been obtained. In
Fig. 12 shows a port power ratio η2 with different port voltage
addition, the MSI operates at mode III when ξmin ≤ ξ ≤ ξ0 and
ratio VL /VH under modulation index m = 0.86: proposed strat-
operates at mode II when ξ0 ≤ ξ ≤ ξmax .
egy (red line), power distribution strategy in [28] (blue line).
√ All
ac-side power can be supported by port-2 when VL ≥ 6Vref .
V. EXPERIMENTAL RESULTS
The power distribution range increases as VL /VH increases.
It can be concluded from Fig. 12 that the power distribution As shown in Fig. 14, to verify the effectiveness of the proposed
range of the proposed strategy is wider than that of the power strategy, an islanded MGs experimental test plant is established
distribution strategy in [28]. The wider power distribution range in the laboratory. Parameters of the test system are given in
of the proposed strategy is realized by increasing the switching Table III. Two programmable dc sources are used to output
actions in one switching cycle. Though more switching losses high/low voltage. They are directly connected to the MSI.
are caused, larger power control capability can be obtained by Due to the experimental tests being conducted in islanded MG
the proposed strategy. conditions, the MSI connects the ac load via an LC filter. The
Fig. 13 shows the port power ratio with different ξ under proposed control method is implemented in the dSPACE Mi-
balanced port voltages. To explore the influence of ξ, balanced croLabBox DS1202 controller, the total execution time is about
port voltage conditions are considered to simplify analysis. As 20 μs composed of the ad/da conversion and algorithm perform-
shown in Fig. 13, the output power P2 increases as ξ increases, ing. The input signals of the controller are the voltage/current
and the output power P1 decreases as ξ increases. On the variables measured by the sensors. The sampling frequency is
condition of balanced port voltages, (29) can be expressed as set to 10 kHz, and the PWM generation and analog-to-digital

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 12086 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO. 10, OCTOBER 2023

Fig. 15. Switching sequences of the MSI under variable port voltages. (a) V1 = V2 . (b) V1 > V2 . (c) V1 < V2 .

Fig. 16. Steady-state performance under variable port voltages. (a) V1 = V2 . (b) V1 > V2 . (c) V1 < V2 .

conversion are realized by FPGA. The MSI is implemented by MSI can be considered as the superposition of those of upper and
insulated-gate bipolar transistors (IGBTs), and the switching fre- lower inverters. And the switching sequences of the upper and
quency is also set to 10 kHz. And an eight-channel oscilloscope lower inverters are determined by dxu and dxl , separately. Hence,
is adopted to capture experimental variables. the proposed modeling method is effective, i.e., the MSI can
The following experimental tests are conducted in islanded be equivalent to two independent inverters. As four switching
MGs mode, including the steady-state performance under vari- actions in one phase are inevitable, the proposed modulation
able port voltages, results of power distribution, the dynamic would cause more switching losses.
performance of mode/power change tests, and comparison with Fig. 16 demonstrates results of steady-state performance with
the conventional strategy. under variable port voltages: (a) V1 = V2 , (b) V1 > V2 , and
(c) V1 < V2 . From top to bottom: waveform is high/low port
voltage VH /VL , grid-side voltage/current uga /iga , grid-side ac-
A. Steady-State Tests tive/reactive power P /Q, and line-to-line voltage Vab . The unbal-
The steady-state tests under variable port voltages are con- anced line-to-line voltage Vab is caused by variable port voltages
ducted to verify the effectiveness of the proposed modeling and VH /VL . Fig. 16 indicates that the proposed strategy achieves
modulation methods. On the dc-side, the high voltage is set as desirable grid-side voltage/current tracking performance under
VH = 360 V. And the low voltage is set as VL = 180 V, 140 V, and variable port voltage conditions. Moreover, the active/reactive
220 V, which reflects the conditions of V1 = V2 , V1 > V2 , and power P/Q is regulated as desired, i.e., P = 1 kW, Q = 0 var.
V1 < V2 . The switching sequences, steady-state performance, Although the port voltages are different in these three conditions,
and dc/ac side current of the MSI are given as follows. the results of grid-side voltage/current are almost the same.
Fig. 15 illustrates the switching sequences of the MSI un- Fig. 17 shows results of dc/ac side current: (a) mode I and
der variable port voltages: (a) V1 = V2 , (b) V1 > V2 , and (b) mode II. From top to bottom: waveform is high-voltage port
(c) V1 < V2 . As shown in Fig. 15, the MSI outputs desirable current iH , low-voltage port current iL , and grid-side current
phase voltage under variable port voltages. In the zoom-in iga . The dc-side currents iH and iL are stably controlled with
part, there is a three-level switching sequence in one phase. As small ripples in both mode I and mode II. Fig. 17 also gives the
discussed in Section III, the three-level switching states of the total harmonic distortions (THDs) of the grid-side current, and

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 LIU et al.: DECOUPLED MODELING AND WIDE-RANGE POWER DISTRIBUTION STRATEGY 12087

different ξ under balanced port voltages. There are seven sets of

experimental data in Fig. 20. As shown in Fig. 20, experimental
results indicate that η1 /η2 monotonically decreases/increases as
ξ increases. The experimental results are consistent with the
theoretical analysis in Section IV. Hence, the decoupled port
power can be achieved by designing proper ξ.

C. Dynamic Performance
Fig. 17. Results of the DC/AC side current. (a) mode I. (b) mode II. Fig. 21 shows the results of the mode variation tests: (a) from
mode I to mode III, and (b) from mode III to mode I. The
mode change tests are conducted under balanced port conditions
with constant ac power. When the operation mode changes, the
port power P1 /P2 changes to reference quickly. As shown in
Fig. 21(a), high-voltage port-1 output power P1 changes from
1 to 1.35 kW, and low-voltage port-2 output power P2 changes
from 0 to -0.35 kW. Although the operation mode has changed,
the grid-side voltage/current and line-to-line/phase voltage keep
stable.
Fig. 22 shows the results of the ac power variation tests: (a)
Fig. 18. Power distribution results under unbalanced port voltages. (a) V1 > power steps up tests, and (b) power steps down tests. Due to the
V2 . (b) V1 < V2 .
ac power change tests being conducted in mode I, low-voltage
port-2 output power P2 remains at 0 kW as desired. High-voltage
port output power P1 and grid-side current change rapidly as the
the THDs of these two conditions are around 4.50%. Therefore, power steps up and down. As shown in Fig. 22(a), P1 changes
the proposed strategy shows a beneficial current quality. from 1 to 2.25 kW quickly when ac power steps up. Although ac
Figs. 15–17 verify that the proposed strategy is effective for power has been changed, grid-side voltage and line-to-line/phase
variable port voltages and has obtained desirable steady-state voltage remain stable.
performance. Figs. 21 and 22 suggest that the proposed strategy has fast and
smooth dynamic performance.
B. Results of Power Distribution
1) Power Distribution Under Unbalanced Port Voltages: D. Comparison With the Conventional Strategy
Power distribution results under unbalanced port voltages are To verify the effectiveness of the proposed strategy, the
given in Fig. 18. The low voltage is set as VL = 140 V and comparison between the conventional strategy in [28] and the
VL = 220 V in Fig. 18(a) and (b), respectively. Fig. 18(a) shows proposed strategy is carried out. The power losses and system
the results under V1 < V2 , P1 = 1.2 kW and P1 = −0.2 kW are efficiency are discussed first. Then, the power distribution range
obtained. Fig. 18(b) shows the results under V1 > V2 , P1 = 1 kW comparison is given. Finally, the evaluation of the comparison
and P1 = 0 kW are obtained. Moreover, the quality of output is carried out.
voltage/current is guaranteed. Therefore, the proposed strategy 1) Power Losses and System Efficiency: As shown in Fig. 15,
has achieved flexible port power distribution under unbalanced the proposed strategy generates nine-segment PWM signals.
port voltages. While the conventional strategy generates five-segment or
2) Power Distribution Under Balanced Port Voltages: seven-segment PWM signals. Hence, the power losses of the pro-
Fig. 19 shows the power distribution results under balanced port posed strategy are higher than that of the conventional strategy,
voltages: (a) mode I, (b) mode II, and (c) mode III. In mode I, i.e., the system efficiency of the proposed strategy is lower than
ξ = ξ0 is selected. As shown in Fig. 19(a), the output power of that of the conventional strategy. The power analyzer WT1800
low-voltage port-2 is zero, and all the ac-side power is supplied is adopted to test the system efficiency. The system efficiency
by port-1 (P1 = 1 kW, P2 = 0 kW). In mode II, high-voltage test circuit is shown in Fig. 23, where W1 and W2 are the dc-side
port-1 and low-voltage port-2 support the ac-side together (P1 = input powers, and W3 and W4 indicate the ac-side output powers.
0.7 kW, P2 = 0.3 kW). In mode III, high-voltage port-1 supplies Then, the system efficiency ηs can be calculated as
the ac-side, while charging low-voltage port-2 (P1 = 1.35 kW,
W1 + W 2
P2 = −0.35 kW). In the aforementioned three operation modes, ηs = . (34)
beneficial results of grid-side voltage/current and line-to-line/ W3 + W 4
voltage have been obtained. Therefore, the multimode operation Fig. 24 shows the system efficiency of the conventional strat-
of the MSI and its flexible power distribution have been realized. egy [28] and proposed strategy under different port voltage ratios
3) Power Distribution Discussion: To verify the power dis- VL /VH . The efficiency of the proposed strategy is approximately
tribution analysis in Section IV, the variable parameter ξ tests 0.5% lower than that of the conventional strategy, i.e., the
are carried out. Fig. 20 gives the port power ratio results with proposed strategy causes higher power losses. However, the

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 12088 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO. 10, OCTOBER 2023

Fig. 19. Power distribution results under balanced port voltages. (a) Mode I. (b) Mode II. (c) Mode III.

Fig. 20. Port power ratio results with different ξ under balanced port voltages.

Fig. 22. Results of the AC power variation tests. (a) Power steps up tests.
(b) Power steps down tests.

Fig. 23. System efficiency test circuit.

Fig. 21. Results of the operation mode variation tests. (a) From mode I to
mode III. (b) From mode III to mode I.

efficiency of the proposed solution is still higher than that of the

two-stage structure due to the removal of the dc/dc converter.
2) Power Distribution Range: Fig. 25 shows the power dis-
tribution results of the conventional strategy [28] (blue line)
and the proposed strategy (red line) under different port voltage
ratio VL /VH . The experimental results are consistent with the
theoretical results in Section IV. It can be concluded from Fig. 25
that the proposed strategy shows a wider power distribution Fig. 24. System efficiency of the conventional strategy [28] and proposed
range than that of the conventional strategy. strategy under different port voltage ratios VL /VH .

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 LIU et al.: DECOUPLED MODELING AND WIDE-RANGE POWER DISTRIBUTION STRATEGY 12089

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