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Chapter 3 Addressing Modes Lec

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0% found this document useful (0 votes)
16 views

Chapter 3 Addressing Modes Lec

Uploaded by

Azhar Mughni
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We take content rights seriously. If you suspect this is your content, claim it here.
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College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

ADDRESSING MODES
❖ Register addressing mode
❖ Immediate addressing mode
❖ Direct addressing mode
❖ Register indirect addressing mode
❖ Based relative addressing mode
❖ Indexed relative addressing mode
❖ Based indexed relative addressing mode
Chapter 3
CLO2

Microprocessors 503431-3
1 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

Objectives of Chapter 3
By the end of this chapter, the student will be able to:
❖ Explain the operation of each data-addressing
mode.
❖ Use the data-addressing modes to form assembly
language statements.
❖ Explain the operation of each program memory-
addressing mode.
❖ Use the program memory-addressing modes to form

Chapter 3 assembly and machine language statements.


❖ Select the appropriate addressing mode to
accomplish a given task.
CLO2

Microprocessors 503431-3
2 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

1- Register Addressing Mode


❖The most common form of data addressing.
❖once register names learned, easiest to apply.
❖The microprocessor contains these 8-bit register
names used with register addressing: AH, AL, BH,
BL, CH, CL, DH, and DL.
❖16-bit register names: AX, BX, CX, DX, SP, BP, SI,
and DI.

Microprocessors 503431-3
3 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

1- Register Addressing Mode

Source Destination

Register BX Register AX

Type Instruction
Resister MOV AX, BX

Microprocessors 503431-3
4 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

1- Register Addressing Mode


❖Memory is not accessed when this addressing mode is
executed; therefore, it is relatively fast.
MOV BX, DX ;copy the contents of DX into BX
MOV ES, AX ;copy the contents of AX into ES
ADD AL, BH ;add the contents of BH to contents of AL
❖It should be noted that the source and destination
registers must match in size.
❖In other words coding "MOV CL, AX" will give an error.

Microprocessors 503431-3
5 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

1- Register Addressing Mode


Examples of Register Addressing Mode

Microprocessors 503431-3
6 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

1- Register Addressing Mode


❖ The effect of executing the MOV BL, CL instruction
AX
BX 76 BB
CX 12 34
DX

After Execution
AX
BX 76 34
CX 12 34
DX

Microprocessors 503431-3
7 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

2- Immediate Addressing Mode


❖Term immediate implies that data immediately
follow the hexadecimal opcode in the memory.

Source Destination

Data
Register CH
3A H

Type Instruction
immediate MOV CH, 3AH

Microprocessors 503431-3
8 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

2- Immediate Addressing Mode


❖The operand comes immediately after the opcode. For
this reason, this addressing mode executes quickly.
❖Immediate addressing mode can be used to load
information into any of the registers except the
segment registers and flag registers.
MOV AX,2550H ;move 2550H into AX
MOV CX,625 ;load the decimal 625 into CX
MOV BL,40H ;load 40H into BL
ADD AL, 50H
Microprocessors 503431-3
9 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

2- Immediate Addressing Mode


❖ The operation of the MOV AX, 456H instruction
Program
AX 62 91
BX MOV AX, 456H
0456 H

After Execution

AX 04 56
BX

Microprocessors 503431-3
10 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

2- Immediate Addressing Mode


❖ Examples of Immediate Addressing Mode

Microprocessors 503431-3
11 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

3- Direct Addressing Mode


❖ Direct addressing moves a byte or word between a memory
location and a register.
❖ This address is the offset address and one can calculate the
physical address by shifting left the DS register and adding it to
the offset as follows:
MOV DL, [2400] ;move contents of DS:2400H into DL
❖ In this case the physical address is calculated by combining the
contents of offset location 2400 with DS, the data segment
register.

Microprocessors 503431-3
12 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

3- Direct Addressing Mode


❖Address is formed by adding the displacement to
the default data segment(DS) address or an
alternate segment address.

Source Destination
Memory Address
Register AX 11234H
11235H

Type Instruction
Direct MOV [1234H], AX

Microprocessors 503431-3
13 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

3- Direct Addressing Mode


❖Direct addressing with a MOV instruction transfers
data between a memory location, located within the
data segment, and the AL (8-bit), or AX (16-bit)
register.
❖MOV AL, DATA1 loads AL from the data segment
memory location DATA1 (1234H).
❖–DATA1 is a symbolic memory location, while 1234H
is the actual hexadecimal location

Microprocessors 503431-3
14 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

3- Direct Addressing Mode


❖ The operation of the MOV BL, [1234H] instruction when DS=1000H
❖ This instruction transfers a copy contents of memory location
11234H into BL.
❖ the effective address is formed by adding 1234H (the offset
address) and 10000H (the data segment address of 1000H
times 10H)
Registers Memory
AX 13 11235H
BX 8A 8A 11234H
CX F4 11233H
DX 7D 11232H

Microprocessors 503431-3
15 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

3- Direct Addressing Mode


❖ Example 3-1
❖ Find the physical address of the memory location and its
contents after the execution of the following, assuming that
DS = 1512H.
MOV AL, 99H
MOV [3518], AL
Solution:
❖ First AL is initialized to 99H, then in line two, the contents of
AL are moved to logical address DS:3518 which is 1512:3518.
❖ Shifting DS left and adding it to the offset gives the physical
address of 18638H (15120H + 3518H = 18638H).
❖ That means after the execution of the second instruction, the
memory location with address 18638H will contain the value
99H.
Microprocessors 503431-3
16 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

3- Direct Addressing Mode


❖Note the difference between
MOV AX, 1234H
This instruction load the data 1234H into AX register.
and
MOV AX, [1234H]
This instruction transfers a copy contents of memory
location 11234H and 11235H into AX register.
Microprocessors 503431-3
17 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

3- Direct Addressing Mode


❖ Examples of Direct Addressing Mode

Microprocessors 503431-3
18 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

4- Register indirect Addressing Mode


❖ Allows data to be addressed at any memory
location through an offset address held in
any of the following registers: BP, BX, DI,
and SI.
MOV [BX], CL
Address = DS x 10H + BX

Microprocessors 503431-3
19 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

4- Register indirect Addressing Mode


MOV [BX], CL
❖ Assume that DS = 1000H and BX = 0300H
❖ Memory location = DS x 10 + BX = 10000+0300 = 10300H

Source Destination

Memory Address
Register CL
10300H

Type Instruction
Register indirect MOV [BX], CL

Microprocessors 503431-3
20 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

4- Register indirect Addressing Mode


❖Note the difference between
MOV BX, CX
This instruction transfers a copy contents of CX register
to the BX register.
and
MOV [BX], CX
This instruction transfers a copy contents of CX register
to memory location addressed by BX

Microprocessors 503431-3
21 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

4- Register indirect Addressing Mode


❖ The operation of the MOV AX, [BX] instruction when BX = 1000H and DS =
0100H.
❖ Memory location = DS x 10 + BX = 01000+1000 = 02000 and 02001

Registers Memory
AX 34 12 02003H
02002H
34 02001H
1000
BX 10 00 + 12 02000H
2000

CS
01000
DS 0100

Microprocessors 503431-3
22 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

4- Register indirect Addressing Mode


❖ Example 3-2
❖ Assume that DS = 1120, SI = 2498, and AX = 17FE.
Show the contents of memory locations after the
execution of Memory
MOV [SI], AX
Solution: 1369A

❖ The contents of AX are moved into memory 17 13699


locations with logical address DS:SI and DS:SI+1. FE 13698
❖ The physical address starts at DS (shifted left) + SI
= 11200 + 2498 = 13698.
❖ According to the little endian convention, low
address 13698H contains FE, the low byte, and
high address 13699H will contain 17, the high byte.

Microprocessors 503431-3
23 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

4- Register indirect Addressing Mode


❖ Examples of Register indirect Addressing
Mode

Microprocessors 503431-3
24 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

5- Based Relative Addressing Mode


❖ In the based relative addressing mode, base registers BX and
BP, as well as a displacement value, are used to calculate what
is called the effective address.
❖ The default segments used for the calculation of the physical
address (PA) are DS for BX and SS for BP.
MOV CX, [BX] + 10 ;move DS:BX+10 and DS:BX+10+1 into CX
;PA = DS (shifted left) + BX + 10
❖ Alternative coding are
MOV CX, [BX+l0]
or MOV CX, 10 [BX]
❖ In the case of the BP register,
MOV AL, [BP] + 5 ;PA = SS (shifted left) + BP + 5

Microprocessors 503431-3
25 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

5- Based Relative Addressing Mode


❖ The operation of MOV AX, [BX+1000H] instruction, when
BX=0100H and DS=0200H.
❖ Address Generation = DS X 10H + [BX + offset] = 02000+100+1000=3100H and 3101H

Registers Memory
AX A0 76
A0 03101H
76 03100H
100H
BX 01 00

1000H
+
CS 1100H
2000H
DS 0200 + 3100H

Microprocessors 503431-3
26 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

6- Index Relative Addressing Mode


❖ The indexed relative addressing mode works the same as the
based relative addressing mode, except that registers DI and
SI hold the offset address.
❖ Examples:

MOV DX, [SI] + 5 ;PA = DS (shifted left) + SI + 5


MOV CL, [DI] + 20 ;PA = DS (shifted left) + DI + 20

Microprocessors 503431-3
27 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

6- Index Relative Addressing Mode


❖ The operation of MOV AX, [DI +1000H] instruction, when DI=0300H and DS=0200H.
❖ Address Generation = DS X 10H + [DI + offset] =
02000+300+1000=3300H and 3301H

Registers Memory
AX CD 45
CD 03301H
45 03300H
300H
DI 03 00

1000H
+
CS 1300H

DS 0200 + 3300H
2000H

Microprocessors 503431-3
28 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

6- Index Relative Addressing Mode


❖ Example 3-3
❖ Assume that DS=4500, SS=2000, BX=2100, SI=1486, DI=8500,
BP=7814, and AX=2512. Show the exact physical memory
location where AX is stored in each of the following.
(a) MOV [BX]+20, AX (b) MOV [SI]+10, AX
(c) MOV [DI]+4, AX (d) MOV [BP]+12, AX
Solution:
In each case PA = segment register x 10 + offset register + displacement
(a) DS:BX+20 PA = DS X 10 + BX +20 = 45000+2100+20=47120
location 47120=(12) and 47121=(25)
(b) DS:SI+10 location 46496=(12) and 46497=(25)
(c) DS:DI+4 location 4D504=(12) and 4D505=(25)
(d) SS:BP+12 location 27826=(12) and 27827=(25)

Microprocessors 503431-3
29 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

7- Base Index Addressing Mode


❖ By combining based and indexed addressing modes. a new
addressing mode is derived caned the based indexed
addressing mode.
❖ In this mode. one base register and one index register are
used.
MOV CL, [BX][DI]+8 ;PA = DS (Shifted left) + BX + DI + 8
MOV CH, [BX][SI]+20 ;PA = DS (shifted left) + BX + SI + 20
MOV AH, [BP][DI]+12 ;PA = SS (shifted left) + BP + DI + 12
MOV AH, [BP][SI]+29 ;PA = SS (Shifted left) + BP + SI + 29

❖ The coding of the instructions above can vary; for example,


the last example could have been written
❖ MOV AH, [BP+SI+29]
❖ or
❖ MOV AH, [SI+BP+29] ;the register order does not matter.
❖ Note that MOV CL, [SI][DI] + displacement is illegal.
Microprocessors 503431-3
30 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

7- Base Index Addressing Mode


❖ The operation of MOV DX, [BX + DI] instruction. Notice that memory address
02010H is accessed because DS=0100H, BX=1000H and DI=0010H.
❖ Address = DS x 10 + BX + DI = 01000+01000+0010 = 02010H and 02011H

Registers Memory
AX
1000H
BX 10 00
AB 02011H

DX AB 03 AB03 03 02010H

SI
0010H 1010H 2010H
DI 0010 + +
1000H
DS 0100 DS x 10

Microprocessors 503431-3
31 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

7- Base Index Addressing Mode


❖ The operation of base relative-plus-index addressing using a MOV
AX,[BX+SI+100H] instruction. Note DS=1000H, BX=0020H and SI=0010H.
❖ Address = DS x 10 + BX + SI+0100 = 10000+0020 + 010 +0100= 10130H and 10131H

Registers Memory
A316
AX A3 16
0020H
BX 00 20 10132H

CX A3 10131H

DX 16 10130H

0010H 0030H 0130H 10130H


SI 0010 + + +
0100H 10000H
DS x 10

Microprocessors 503431-3
32 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

7- Base Index Addressing Mode


❖ Examples of Based Indexed Addressing Mode

Microprocessors 503431-3
33 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

Default Segment
❖ The following table provides a summary of
the offset registers that can be used with
the four segment registers of the 80x86.

❖ Offset registers for various segments.

Segment register: CS DS ES SS
Offset register(s) IP SI, DI, BX SI, DI, BX SP, BP

Microprocessors 503431-3
34 Dr. Mohamed Abdelaziz
College of Computers and Information Technology ‫كلية الحاسبات وتقنية المعلومات‬

Segment Overrides
❖ The 80x86 CPU allows the program to override the default
segment and use any segment register.
❖ To do that, specify the segment in the code.
❖ For example, in "MOV AL, [BX]" , the physical address of the
operand to be moved into AL is DS:BX.
❖ To override that default, specify the desired segment in the
instruction as "MOV AL, ES:[BX]".
Instruction Segment Used Default Segment
MOV AX, CS:[BP] CS:BP SS:BP
MOV DX, SS:[SI] SS:SI DS:SI
MOV AX, DS:[BP] DS:BP SS:BP
MOV CX, ES:[BX]+12 ES:BX+12 DS:BX+12
MOV SS:[BX][DI]+32, AX SS:BX+DI+32 DS:BX+DI+32

Microprocessors 503431-3
35 Dr. Mohamed Abdelaziz

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