Chapter 3 Addressing Modes Lec
Chapter 3 Addressing Modes Lec
ADDRESSING MODES
❖ Register addressing mode
❖ Immediate addressing mode
❖ Direct addressing mode
❖ Register indirect addressing mode
❖ Based relative addressing mode
❖ Indexed relative addressing mode
❖ Based indexed relative addressing mode
Chapter 3
CLO2
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Objectives of Chapter 3
By the end of this chapter, the student will be able to:
❖ Explain the operation of each data-addressing
mode.
❖ Use the data-addressing modes to form assembly
language statements.
❖ Explain the operation of each program memory-
addressing mode.
❖ Use the program memory-addressing modes to form
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College of Computers and Information Technology كلية الحاسبات وتقنية المعلومات
Source Destination
Register BX Register AX
Type Instruction
Resister MOV AX, BX
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College of Computers and Information Technology كلية الحاسبات وتقنية المعلومات
Microprocessors 503431-3
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College of Computers and Information Technology كلية الحاسبات وتقنية المعلومات
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After Execution
AX
BX 76 34
CX 12 34
DX
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Source Destination
Data
Register CH
3A H
Type Instruction
immediate MOV CH, 3AH
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After Execution
AX 04 56
BX
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College of Computers and Information Technology كلية الحاسبات وتقنية المعلومات
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Source Destination
Memory Address
Register AX 11234H
11235H
Type Instruction
Direct MOV [1234H], AX
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College of Computers and Information Technology كلية الحاسبات وتقنية المعلومات
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College of Computers and Information Technology كلية الحاسبات وتقنية المعلومات
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College of Computers and Information Technology كلية الحاسبات وتقنية المعلومات
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Source Destination
Memory Address
Register CL
10300H
Type Instruction
Register indirect MOV [BX], CL
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Registers Memory
AX 34 12 02003H
02002H
34 02001H
1000
BX 10 00 + 12 02000H
2000
CS
01000
DS 0100
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College of Computers and Information Technology كلية الحاسبات وتقنية المعلومات
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College of Computers and Information Technology كلية الحاسبات وتقنية المعلومات
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College of Computers and Information Technology كلية الحاسبات وتقنية المعلومات
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Registers Memory
AX A0 76
A0 03101H
76 03100H
100H
BX 01 00
1000H
+
CS 1100H
2000H
DS 0200 + 3100H
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Registers Memory
AX CD 45
CD 03301H
45 03300H
300H
DI 03 00
1000H
+
CS 1300H
DS 0200 + 3300H
2000H
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Registers Memory
AX
1000H
BX 10 00
AB 02011H
DX AB 03 AB03 03 02010H
SI
0010H 1010H 2010H
DI 0010 + +
1000H
DS 0100 DS x 10
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Registers Memory
A316
AX A3 16
0020H
BX 00 20 10132H
CX A3 10131H
DX 16 10130H
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Default Segment
❖ The following table provides a summary of
the offset registers that can be used with
the four segment registers of the 80x86.
Segment register: CS DS ES SS
Offset register(s) IP SI, DI, BX SI, DI, BX SP, BP
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Segment Overrides
❖ The 80x86 CPU allows the program to override the default
segment and use any segment register.
❖ To do that, specify the segment in the code.
❖ For example, in "MOV AL, [BX]" , the physical address of the
operand to be moved into AL is DS:BX.
❖ To override that default, specify the desired segment in the
instruction as "MOV AL, ES:[BX]".
Instruction Segment Used Default Segment
MOV AX, CS:[BP] CS:BP SS:BP
MOV DX, SS:[SI] SS:SI DS:SI
MOV AX, DS:[BP] DS:BP SS:BP
MOV CX, ES:[BX]+12 ES:BX+12 DS:BX+12
MOV SS:[BX][DI]+32, AX SS:BX+DI+32 DS:BX+DI+32
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