Lab Manual to Accompany

Digital Electronics

4 th Edition o cd
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 Lab Manual
to Accompany

Digital Electronics

Fourth Edition

James Bignell
and
Robert Donovan
Manatee Community College

r*
Delmar
Thomson Learning™

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 contents

Preface. vi

Chapter 1 Number Systems. 1

Lab 1.1 74HC4024 Counting in Binary. 3

Lab 1.2 74HC583 4-Bit BCD Full Adder. 5

Lab 1.3 Troubleshooting a 4008 4-Bit Binary Full Adder. 9

Chapter 2 Logic Gates. 11

Lab 2.1 Logic Symbols. 13

Lab 2.2 Gate Expansion and Universal Building Blocks. 19

Lab 2.3 Troubleshooting Gate ICs. 29

Chapter 3 Waveforms and Boolean Algebra. 33

Lab 3.1 Boolean Theorems.'. 35

Lab 3.2 Designing Logic Circuits. 41

Lab 3.3 Troubleshooting Combinational Logic Circuits. 47

Chapter 4 Exclusive-OR Gates. 53

Lab 4.1 7485 4-Bit Magnitude Comparator. 55

Lab 4.2 74HC7080 16-Bit Even/Odd Parity Generator/Checker. 59

Lab 4.3 Troubleshooting Exclusive-OR Circuits. 65

Chapter 5 Adders. 69
Lab 5.1 74181 Arithmetic Operation. 71

Lab 5.2 74181 Logical Operation. 75

Lab 5.3 Troubleshooting Adder Circuits. 79

Chapter 6 Specifications and Open-Collector Gates. 85

Lab 6.1 Fan-Out. 87

Lab 6.2 Input-to-Output Transfer Characteristic Curves. 91

Lab 6.3 Troubleshooting Open-Collector Circuits. 95

Chapter 7 Flip-Flops. 97
Lab 7.1 Flip-Flops. 99

in
IV Contents

Lab 7.2 Flip-Flops. 103

Lab 7.3 Troubleshooting D Flip-Flops. 109

Chapter 8 Master-Slave D and JK Flip-Flops. Ill

Lab 8.1 JK Flip-Flops and Delayed Clock. 113

Lab 8.2 Shift Counter and Delayed Clock. 117

Lab 8.3 Troubleshooting Shift Counters. 123

Chapter 9 Shift Registers. 125

Lab 9.1 Shift Registers. 127

Lab 9.2 Shift Registers. 131

Lab 9.3 Troubleshooting Shift Registers. 133

Chapter 10 Counters. 135

Lab 10.1 Counters. 137

Lab 10.2 Counters. 143

Lab 10.3 Troubleshooting Counters. 149

Chapter 11 Schmitt-Trigger Inputs and Clocks. 151

Lab 11.1 Clocks and Timers. 153

Lab 11.2 Clocks and Timers. 157

Lab 11.3 Troubleshooting Clocks. 159

Chapter 12 One-Shots. 161

Lab 12.1 One-Shots. 163

Lab 12.2 One-Shots. 167

Lab 12.3 Troubleshooting One-Shots. 171

Chapter 13 Digital-to-Analog and Analog-to-Digital Conversions. 173

Lab 13.1 Digital-to-Analog and Analog-to-Digital Conversions. 175

Lab 13.2 Digital-to-Analog and Analog-to-Digital Conversions. 179

Lab 13.3 Troubleshooting Analog-to-Digital Converters. 183

Chapter 14 Decoders, Multiplexers, Demultiplexers and Displays. 185

Lab 14.1 Decoders, Multiplexers, Demultiplexers and Displays. 187

Lab 14.2 Decoders, Multiplexers, Demultiplexers and Displays. 191

Lab 14.3 Troubleshooting Decoders. 195

Contents v

Chapter 1 Tri-State Gates and Interfacing to High Current. 197

Lab 15.1 Tri-State Gates and Interfacing to High Current. 199

Lab 15.2 Tri-State Gates and Interfacing to High Current. 203

Lab 15.3 Troubleshooting High-Current Interfaces. 207

Chapter 1 Memories and Introduction to Microcomputers. 209

Lab 16.1 Memories and Introduction to Microcomputers. 211

Lab 16.2 Memories and Introduction to Microcomputers. 215

The purpose of this lab manual is to provide a wide assortment of lab exercises that give practical
hands-on experience for students of digital electronics. It was written to accompany Digital
Electronics, 4th edition, by Bignell and Donovan, and includes three lab exercises for each of the
chapters in that text. For example, Labs 1.1, 1.2, and 1.3 correlate directly with Chapter 1 in the
text. New Electronics Workbench® labs have been added using Electronics Workbench® Student
Edition, Version 5.12. These EWB labs contain circuits to analyze and troubleshoot.

Circuits are available to download by going to the Digital Electronics ’ Online Companion at:
www.electronictech.com.

Together with the lab exercise included at the end of each chapter in the text, the instructor
has the flexibility to assign any or all of the three labs to fit the needs of a particular class or
student. It is assumed that the students will read and study the associated chapter before
beginning any assigned lab exercise. Particular attention should be paid to the laboratory safety
rules listed in Chapter 1 of Digital Electronics. Refer to these rules often as you proceed through
the labs in this manual.

Each chapter in this lab manual begins with a discussion of the topics or integrated circuits to
be used in the lab exercises. The first page of each lab exercise lists the objectives to be
accomplished, the components required, and the equipment needed. A protoboard can be used to
construct the circuits, but a lab trainer that contains buffered LEDs, debounce switches, and data
switches is helpful. Although complete schematics are provided in the lab manual, students
should be encouraged to locate the ICs being use in TTL and CMOS data books.

This lab manual is designed to be a workbook with spaces provided for students responses.
The pages are perforated so that they can be easily removed and handed in for grading. Pages are
provided for lab notes and calculations.

We wish you great success with these lab exercises as you master the fundamentals of digital
electronics.
Number Systems

In Lab 1.1a ripple counter will be used to count in binary. Ripple counters will be studied
in detail in Chapter 10, so we will not be concerned here about how a ripple counter
works. When a signal is supplied to the input of the IC, the binary number on the outputs
increments to the next binary number. In this enjoyable lab, we will connect the outputs to
LEDs, supply a square wave signal called a clock to the proper input, and let the IC count
for us in binary.

The 74HC4024 is a 7-stage binary ripple counter. There are seven outputs, Q\
through Q7, which provide the binary output signals. The square wave input that causes
the output to increment to the next count is input to pin 1, clock (CLK). The only other
control signal on this IC is master reset (RST). When RST is connected to +5 volts, the
IC is reset so that the outputs are all 0. When RST is returned to 0 volts, the next clock
pulse on CLK will cause the IC to increment to 1.

In Lab 1.2 a 74HC583 4-bit binary-coded-decimal (BCD) full adder will be used
to add BCD numbers. The 74HC583 adds two 4-bit BCD numbers, A3A2A1A0 and
Bt,B2BxBq, and a carry-in, Cn. It produces a sum Z3Z2Z1Z0 and a carry-out, Cn+4. If the
initial addition produces a sum that is greater than 9, then 6 is added internally to
yield the correct result, and a carry-out Cn+4 is generated. To add BCD numbers of
greater than 4-bits, cascade 74HC583s by feeding carry-out of the lease significant
IC into carry-in of the next more significant digit.

In Lab 1.3 a 4008 4-bit binary full adder will be used to add 4-bit binary numbers.
Circuit LM-l.ewb contains a description of the circuit for familiarization. Circuits
LMl-2.ewb and LMl-3.ewb are troubleshooting exercises. Each contains a fault for you
to isolate. In circuit LMl-4.ewb, two 4008s have been cascaded to produce an 8-bit adder.
Circuit LMl-4.ewb contains a description of that circuit. Circuits LMl-5.ewb and
LMl-6.ewb are troubleshooting exercises. Each contains a fault to isolate.
74HC4024 Counting in Binary i.i
Name Class Date

Objectives After completing this lab, you should be able to:

• Connect the 74HC4024 to count in binary.

• Predict the next binary number.

Components 1 74HC4024
Needed 7 LEDs
7 330-£2 resistors
1 Debounced switch

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 Signal generator (5-volt square wave)

Procedure

74HC4024: Vcc = Pin 14, Gnd = Pin 7

1. The 74HC4024 is corner-powered. Connect pin 14 to +5 volts and pin 7 to ground.

2. Connect the seven outputs, Qx to 07, to 330-Q resistors and LEDs.

3. Connect the 5-volt square wave generator to CLK. Adjust its frequency to about 3 Hertz, or
slow enough that the LED connected to the least significant bit, Qu can be seen to toggle on
and off. Note that at faster frequencies the least significant bits appear to be on all the time.

4. Jumper the RST input to +5 volts to reset the IC to 0. Remove that connection and jumper
RST to ground to allow the IC to count up from 0.
4 LAB 1.1

5. Observe the patterns developed as the seven outputs count in binary.

6. How high can the 74HC4024 count?_

7. When the outputs are all HIGH, what happens on the next clock pulse?

8. Momentarily jumper the RST pin to +5 volts and then return it to ground. What happens?

9. Replace the signal generator with the debounced switch. Advance the counter to some
desired count. Predict the next binary number. Advance the counter to check your answer.

Next Number Next Number

Binary Number Predicted Observed

Now answer these questions.

10. Count in binary from 1001001 to 1010000.

11. How high can the 74HC4024 count?_

12. Including 0, how many different output states are there?

13. Describe the operation of the RST input signal.

74HC583 4-Bit BCD Full Adder

Name Class Date

Objectives After completing this lab, you should be able to:

• Add BCD numbers.

• Use the 74HC583 as a 4-bit BCD adder.

• Expand the 74HC583 into a 8-bit adder.

• Use the 74HC583 to convert binary numbers into BCD.

Components 2 74HC583s
Needed 9 LEDs
9 330-Q resistors
9 Logic switches or jumpers

Equipment 1 5-volt power supply

Needed 1 Protoboard

Procedure

1. The 74HC583 is comer-powered. Connect pin 16 to +5 volts and pin 8 to ground.

2. Connect A3A2AXA0 and B3B2BXB0 to logic switches to provide Is and Os for those inputs.
Set ,4 = 1010 and 5 = 0110.

3. Predict the sum of each of the following BCD additions.

Predicted Observed

A + B + cn Un+4 Cn+4

1000 + 0110 + 1 •

0111 + 0011 + 0

1001 + 1000 + 1

0111 + 0101 + 0
6 LAB 1.2

4. Cascade two 74HC583s to produce an 8-bit BCD adder. Draw your schematic below. Be sure
to include pin numbers.

Schematic: 8-bit BCD Adder

5. Predict the result of each of the following problems. Then use your 8-bit adder to confirm
the result.

Predicted Observed

A + B + Q Cn+8 ^7“ Cn+8 £7-^0

01100100 + 00111001 + 1

01111001 + 00101000 + 0

01111000 + 00010110 + 1

6. Convert a 74HC5893 adder into a binary-to-BCD converter by grounding all of the B inputs.

7. For each of these binary numbers (represented in hexadecimal) predict the corresponding
BCD output.

A Binary Predicted BCD Observed BCD

Bx6

£*16

^16
74HC583 4-Bit BCD Full Adder 7

8. Describe the difference between a 4-bit binary number and a BCD digit.

9. How is a binary number converted into a BCD number:

Troubleshooting a 4008 4-Bit Binary /. D
Full Adder

Name Class Date

Objectives After completing this lab, you should be able to:

• Analyze an adder circuit using Electronics Workbench.

• Troubleshoot an adder circuit using Electronics Workbench.

Preparation

The 4008 adds two 4-bit binary numbers, A3A2A1A0 and B3B2BXB0, and a carry-in CIN and
produces the 4-bit sum, S3S2SXS0, and a carry-out, COUt- In the example shown, CIN is 1,
A3A2A \Aq is 1001, and B3B2BXB0 is 0101. Those three numbers are being added to produce a
sum S3S2S\Sq, 1111, and a Cout of 0. l+9 + 5 = 15.

CjN 1
A3 A2 A i Ao 1001
+ B3 B2 5, B0 0101
CquT 1S 2 iS* j jSo 0 1111

VDD and Vss are the dc voltage supply connections for this IC. In Electronics Workbench,
VDD is +15 volts and Vss is 0 volts. The input pins of the 4008 are connected to VDD to
represent a 1 and to Fss or ground to represent a 0.

Procedure
1. From the website, download the circuit named LM1-1 .ewb. Open that circuit, turn on the
power switch, and answer these questions.

a. What two 4-bit numbers are being added?_

b. What is the state of CIN?_

c. Is the result correct?_

d. What is the maximum number this IC can output?_

2. Circuits LM1 -2.ewb and LM1 -3.ewb each contain one or no faults. First determine whether
the circuit is performing correctly. Try test problems to exercise COUT as well as S3S2SXS0. If
the circuit has a problem, use the multimeter to isolate the fault. The multimeter is included
in the instruments group. Double-click on the multimeter to expand its control panel. Select
DC (.) and Volts (V). Wire the + and - inputs to test points as needed. Follow the
guidelines presented in the troubleshooting section of Chapter 1. Keep a log of the steps
performed and your conclusion. Looking back at the log can help analyze your efficiency in
isolating the fault. Now troubleshoot circuits LM 1-2.ewb and LM 1-3.ewb.
10 LAB 1.3

CIRCUIT LMl-2.ewb:

Instructor's Signature:

CIRCUIT LMl-3.ewb:

Instructor's Signature:_

3. In circuit LMl-4.ewb two 4008s have been cascaded to produce an 8-bit adder. The
bottom adder adds A3A2AlA0 to B3B2BiB0 and C1N and produces an output S3S2S{S0 and
Coux. Cout of the first adder, Ul, is fed into CiN of U2 to expand U1 into an 8-bit adder.
The top adder U2 adds Coux from Ul to A7A6A5A4 and B7B6B5B4 to produce S7S6S5S4 and
Coux. Test the operation of this circuit by entering these hex numbers.

a. 00 + 00 + 0

b. 80 + 80 + 0
c. 08 + 08 + 0

d. OF + OF + 1

Is the 8-bit adder functioning correctly?_

Instructor's Signature:_

4. Circuits LMl-5.ewb and LMl-6.ewb each contain one or no faults. First determine
whether the circuit is performing correctly. Try test problems to exercise Coux as well as
S7S6S5S4S3S2SiS0. If the circuit has a problem, use the multimeter to isolate the fault.
Now troubleshoot circuits LMl-5.ewb and LMl-6.ewb. Keep a log of the steps
performed and your conclusion.

CIRCUIT LMl-5.ewb:

Instructor's Signature:

CIRCUIT LMl-6.ewb:

Instructor's Signature:
Logic Gates

Each of the basic gates can be represented by a traditional logic symbol and an inverted
logic symbol. One of the two describes the unique state of the gate and the other
describes the remaining lines of the truth table. Lab 2.1 emphasizes the fact that the two
symbols for each gate are equivalent; that is, they produce identical outputs for any
combination of inputs. The bubbled inputs on the inverted logic symbols will be
represented with inverters.

NAND gates and NOR gates are called universal building blocks. Using only NAND
gates or NOR gates, all the other gates can be constructed. In Chapter 2 it is determined
that OR gates, AND gates, NAND gates, and NOR gates can be expanded with the use of
additional gates. That is, they can each be made to function as a gate with a larger number
of inputs. ORs and NORs can be expanded with ORs, and ANDs and NANDs can be
expanded with ANDs. In Lab 2.2, NAND gates and NOR gates will be used as universal
building blocks, and each of the gates will be expanded.

In Lab 2.3 a variety of basic gate ICs are used in five Electronics Workbench circuits.
Each of the circuits LM2-l.ewb through LM2-5.ewb contains one or more faults. As a
troubleshooting exercise you will isolate each of the faults.

11
'
Logic Symbols 7
Name Class Date

Objectives After completing this lab, you should be able to:

• Draw the logic symbol and inverted logic symbol for each gate.

• Determine which logic symbol represents the unique state of each gate.

• Write the Boolean expression for the logic symbol and inverted logic symbol of
each gate.

Components 1 7400
Needed 1 7402
1 7404
1 7408
1 7432
2 LEDs
2 330-Q resistors

Equipment 1 5-volt power supply

Needed 1 Protoboard

Procedure

Part 1 AND gate

1. Draw the logic symbol and the inverted logic symbol for a two-input AND gate. Label the
inputs on each circuit A and B, and the outputs Yx and Y2.

2. Connect each circuit. Use inverters to represent the bubbles on the inputs of the inverted
logic symbol. Use one logic switch to set A for both circuits and one to set B for both.
14 LAB 2.1

3. Complete the truth table for each circuit.

B A V, v2

0 0
0 1
1 0
1 1

Summarize the results.

Part 2 NAND gate

1. Draw the logic symbol and the inverted logic symbol for two-input NAND gate. Label the
inputs on each circuit A and B, and the outputs Yx and Y2.

2. Connect each circuit. Use inverters to represent the bubbles on the inputs of the inverted
logic symbol. Use one logic switch to set A for both circuits and one to set B for both.

3. Complete the truth table for each circuit.

B A Vi v2
0 0
0 1
1 0
1 1

Summarize the results.

Part 3 OR gate

1. Draw the logic symbol and the inverted logic symbol for a two-input OR gate. Label the
inputs on each circuit A and B, and the outputs Y{ and Y2.
Logic Symbols
15

2. Connect each circuit. Use inverters to represent the bubbles on the inputs of the inverted
logic symbol. Use one logic switch to set A for both circuits and one to set B for both.

3. Complete the truth table for each circuit.

B A Y, y2
0 0

0 1

1 0

1 1

Summarize the results.

Part 4 NOR gate

1. Draw the logic symbol and the inverted logic symbol for a two-input NOR gate. Label the
inputs on each circuit A and B, and the outputs Y{ and Y2.

2. Connect each circuit. Use inverters to represent the bubbles on the inputs of the inverted
logic symbol. Use one logic switch to set A for both circuits and one to set B for both.

3. Complete the truth table for each circuit.

B A Y, y2

0 0

0 1

1 0

1 1

Summarize the results.

16 LAB 2.1

Now answer these questions.

4. Without looking back at any previous material, draw the logic symbol and inverted logic
symbol for a two-input AND, NAND, OR, and NOR. Write the Boolean expression for each
output.

Logic symbol Inverted logic symbol

AND

NAND

OR

NOR

5. Draw the logic symbol that expresses “any 1 in, 0 out.”

What gate is it?_

6. Draw the logic symbol that expresses “all Os in, 0 out.”

What gate is it?_

7. Draw the logic symbol that expresses “any 0 in, 1 out.”

What gate is it?

Logic Symbols
17

8. Draw the logic symbol that expresses “any 1 in, 1 out.”

What gate is it?__

9. Draw the logic symbol that expresses “any 0 in, 0 out.”

What gate is it?_

10. Draw the logic symbol that expresses “all Os in, 1 out.”

What gate is it?_

11. Draw the logic symbol that expresses “all Is in, 0 out.”

What gate is it?_

12. Draw the logic symbol that expresses “all Is in, 1 out.”

What gate is it?_

Check In problems 5 through 12, check that each two-input gate is represented twice.

13. You are designing a digital circuit and need a control signal that is HIGH when each of the
three existing signals is LOW. Which gate would you use?_
 _jf J
Gate Expansion and Universal Building L.L
Blocks

Name Class Date

Objectives After completing this lab, you should be able to:

• Expand each of the gates to a greater number of inputs.

• Use NAND gates to build each of the other gates.

• Use NOR gates to build each of the other gates.

Components 1 7400
Needed 1 7402
1 7404
1 7408
1 7432
5 Logic switches
1 LED
1 330-0 resistor

Equipment 1 5-volt power supply

Needed 1 Protoboard

Procedure

Expanding Each of the Gates

1. Expand one of the AND gates on a 7408 into an AND gate with as many inputs as possible.
Use only the other AND gates on the same 7408 IC. Draw the schematic here. Include pin
numbers. Label the inputs A, B, etc., and the output Y

19
20 LAB 2.2

2. Connect each of the inputs to a logic switch and the output to an LED. How many inputs are
required?_

3. For each of the input combinations, predict the output. Measure the output. Record the
results in the table below.

Predicted Observed
E D c B A Y Y

1 1 0 1 0
0 0 1 1 1
1 0 1 1 1
1 1 1 1 1

When is the output HIGH?

4. Expand one of the OR gates on a 7432 into an OR gate with as many inputs as possible. Use
only the other OR gates on the same 7432 IC. Draw the schematic here. Include pin numbers.
Label the inputs A, B, etc., and the output Y.

5. Connect each of the inputs to a logic switch and the output to an LED. How many inputs are
required?_

6. For each of the input combinations, predict the output. Measure the output. Record the
results in the table below.

Predicted Observed
E D c B A Y Y

1 1 0 1 0
0 0 1 1 1
0 0 1 0 0
0 0 0 0 0

When is the output HIGH?

Gate Expansion and Universal Building Blocks 21

7. Using only the gates on a 7400 two-input NAND gate IC, expand a NAND as fully as
possible. Draw the schematic here. Show pin numbers. Label the inputs A, B, etc., and
the output Y.

8. Connect the circuit. Wire the inputs to logic switches and the outputs to an LED. For each
line of the following truth table, predict the output and then observe the output.

Predicted Observed
c B A Y Y

0 0 0
0 0 1

0 1 0
0 1 1

1 0 0
1 0 1

1 1 0
1 1 1

When is the output LOW?

9. Using only the gates on a 7402 two-input NOR gate IC, expand a NOR as fully as possible.
Draw the schematic here. Show pin numbers. Label the inputs A, B, etc., and the output Y.
22 LAB 2.2

10. Connect the circuit. Wire the inputs to logic switches and the output to an LED. For each line
of the following truth table, predict the output and then observe the output.

Predicted Observed
c B A Y Y

0 0 0
0 0 1

0 1 0
0 1 1

1 0 0
1 0 1

1 1 0
1 1 1

When is the output LOW?

NOR as a Universal Building Block

11. Using a two-input NOR gate IC, wire an inverter. Draw the schematic here. Label the pin
numbers.

12. Connect the circuit. Wire the input to a logic switch and the output to an LED. Record the
results in the truth table.

Predicted Observed
A Y Y

Flow do you convert a NOR gate into an inverter?

Gate Expansion and Universal Building Blocks 23

13. Using a two-input NOR gate IC, wire a two-input OR gate. Draw the schematic here. Label
the pin numbers.

14. Connect the circuit. Wire the inputs to logic switches and the output to an LED. Record the
results in the truth table.

Predicted Observed
B A Y Y

0 0

0 1

1 0

1 1

How do you convert a NOR gate into an OR gate?

15. Using one two-input NOR gate IC, wire a two-input AND gate. Draw the schematic here.
Show pin numbers. Label the inputs to the AND gate A and B and the output Y.

Hint Draw the inverted logic symbol for an AND gate. Bubbled inputs can be
represented by inverters that can be constructed with NOR gates.
24 LAB 2.2

16. Connect the circuit. Wire the inputs to logic switches and the output to an LED. Record the
results in the truth table.

Predicted Observed
B A Y Y

0 0

0 1

1 0

1 1

How do you make an AND gate from NOR gates?

17. Using one two-input NOR gate IC, wire a two-input NAND gate. Draw the schematic here.
Show pin numbers. Label the inputs to the NAND gate A and B and the output Y.

Hint Draw the inverted logic symbol for a NAND gate. Bubbled inputs can be
represented by inverters that can be constructed with NOR gates.

18. Connect the circuit. Wire the inputs to logic switches and the output to an LED. Record the
results in the truth table.

Predicted Observed
B A Y Y

0 0

0 1

1 0

1 1

How do you make a NAND gate from NOR gates?

Gate Expansion and Universal Building Blocks 25

NAND as a Universal Building Block

19. Using a two-input NAND gate IC, wire a inverter. Draw the schematic here. Label the pin
numbers.

20. Connect the circuit. Wire the input to a logic switch and the output to an LED. Record the
results in the truth table.

Predicted Observed
A
Y V

0
1

How do you convert a NAND gate into an inverter?

21. Using a two-input NAND gate IC, wire a two-input AND gate. Draw the schematic here.
Label the pin numbers. Label the inputs A and B and the output Y
26 LAB 2.2

22. Connect the circuit. Wire the inputs to logic switches and the output to an LED. Record the
results in the truth table.

Predicted Observed
B A V Y

0 0

0 1

1 0

1 1

How do you convert a NAND gate into an AND gate?

23. Using one two-input NAND gate IC, wire a two-input OR gate. Draw the schematic here.
Show pin numbers. Label the inputs to the AND gate A and B and the output Y.

Hint Draw the inverted logic symbol for an OR gate. Bubbled inputs can be
represented by inverters that can be constructed with NAND gates.

24. Connect the circuit. Wire the inputs to logic switches and the output to an LED. Record the
results in the truth table.

Predicted Observed
B A Y Y

0 0

0 1

1 0

1 1

How do you make an OR gate from NAND gates?

Gate Expansion and Universal Building Blocks 27

25. Using one two-input NAND gate IC, wire a two-input NOR gate. Draw the schematic here.
Show pin numbers. Label the inputs to the NAND gate A and B and the output Y.

Hint Draw the inverted logic symbol for a NOR gate. Bubbled inputs can be
represented by inverters that can be constructed with NAND gates.

26. Connect the circuit. Wire the inputs to logic switches and the output to an LED. Record the
results in the truth table.

Predicted Observed
B A Y Y

0 0

0 1

1 0

1 1

How do you make a NOR gate from NAND gates?

'

.
 3 3
Troubleshooting Gate ICs l_i

Name Class Date

Objective After completing this lab, you should be able to:

• Troubleshoot basic gate ICs.

Procedure

In this lab you are asked to troubleshoot five ICs: a 74HC00 quad two-input NAND, a 74HC32
quad two-input OR, a 4001 quad two-input NOR, a 74LS11 triple three-input AND, and a
74LS04 hex inverter.

From the website, download the five circuits named LM2-l.ewb through LM2-5.ewb. Each
circuit contains one or more faults. Follow the procedure described for each circuit.

1. Open circuit LM2-1 .ewb. Check each gate in the 74HC00 quad two-input NAND IC to
determine any faults. Use this procedure.

a. Connect the square-wave generator to the gate under test. This will serve as the data input.

b. Use the other input as control. Connect it to the logic level (0 or 1) that will enable the gate.

c. Use the oscilloscope to check that the signal is passing as it should (inverted or not
depending on what type of gate is being tested). Use both channels to observe the input
and output simultaneously.

d. Change the control input to inhibit the gate. Use the oscilloscope to check that the signal
is not passing and that the output is locked at the proper level.

e. Keep a log of the steps performed to solve each circuit. Record your conclusions.

Instructor's Signature:

29
30 LAB 2.3

2. Open circuit LM2-2.ewb. Read the window description. Sketch a logic diagram of the circuit.
What is the function of this circuit? Isolate any faults. Record your results.

Instructor's Signature:_

3. Open circuit LM2-3.ewb. Read the window description. Sketch a logic diagram of the circuit.
What is the function of this circuit? Isolate any faults. Record your results.

Instructor's Signature:_

4. Open circuit LM2-4.ewb. Read the window description. Test each gate by using the
square-wave generator and oscilloscope. Follow the procedure described for circuit
LM2-l.ewb. Each gate has three inputs, so two inputs will serve as control and one as data.
To enable or inhibit a three-input gate, connect both control inputs to the proper logic level.
Record your results.

Instructor's Signature:
Troubleshooting Gate ICs
31

5. Open circuit LM2-5.ewb. Read the window description. Use the oscilloscope to trace the
square wave through the circuit. Determine any faults. Log your procedure. Record your
results.

Instructor's Signature:
 * t:

‘
Waveforms and
Boolean Algebra
Boolean algebra is used to describe how signals are combined to create a desired output. For
example, (A + B)C indicates that A and B are ORed together and the result is ANDed with
C. Boolean theorems are used to reduce expressions to minimal terms to minimize the
hardware required in constructing a circuit. In Chapter 3 of the text, many of these theorems
were proved by using truth tables. In Lab 3.1, each of the following Boolean theorems will
be verified by connecting gates to represent the Boolean expression under study.

1. 8. A+A = 1
II

I'*!

o
2. A -0 = 0 9. ll

3. A+0=A 10. A-B + A • C = A(B + Q

4. A • 1 =A 11. A+A■B =A+ B

5. A+ 1 = 1 12. A ■ B =A+ B (DeMorgan’s theorem)

6. A+A=A 13. A + B =A ■ B (DeMorgan’s theorem)

7.
II

In Lab 3.2, logic circuits will be designed to implement given truth tables by using
these Boolean theorems and by using the Karnaugh map method.

Lab 3.3 makes use of Electronics Workbench. In Part 1, you will construct a circuit in
Electronics Workbench and use the logic converter instrument to simplify its Boolean
expression and create a simplified logic circuit. In Part 2 you will design a logic circuit to
implement a given truth table. You will compare your design to that of the logic converter.
Part 3 contains five Electronics Workbench circuits that contain faults, LM3-l.ewb
through LM3-5.ewb. As a troubleshooting exercise you will isolate those faults.

33
■
Boolean Theorems i
Name Class Date

Objectives After completing this lab, you should be able to:

• Prove by using hardware, each of the Boolean theorems.

• Prove by using hardware, each of DeMorgan’s theorems.

Components 1 7400
Needed 1 7404
1 7408
1 7432
2 LEDs
2 330-Q resistors

Equipment 1 5-volt power supply

Needed 1 Protoboard

Procedure
-1
For each theorem, draw the schematic used. Record the results in the blanks provided. Summarize
the theorem in your own words.

1. To confirm that A = A, invert input A twice. (Use two inverters.) Compare the output of the
second inverter to the original signal.

When A = 1, A =_.

When A = 0,1 =_.

Summarize

2. Use a two-input AND gate to confirm that zl • 0 = 0.

When A = 1, the output =_.

When A = 0, the output =_.

Summarize
36 LAB 3.1

3. Use a two-input OR gate to confirm that A + 0 = A.

When A - 1, the output =_.

When A- 0, the output =_.

Summarize

4. Use a two-input AND gate to confirm that A • 1 - A.

When A = 1, the output =_.

When A = 0, the output =_.

Summarize

5. Use a two-input OR gate to confirm that ^4 + 1 = 1.

When A = 1, the output =_.

When A = 0, the output =_.

Summarize

6. Use a two-input OR gate to confirm that A + A = A. (Feed the same signal into each input.)

When A - 1, the output =_.

When A = 0, the output =_.

Summarize

7. Use a two-input AND gate to confirm that A ■ A-A. (Feed the same signal into each output.)

When A = 1, the output =_.

When A - 0, the output =_.

Summarize
Boolean Theorems
37

8. Use a two-input OR gate to confirm that A + A = 1. (One input should be the complement of
the other input.)

When A = 1, A = 0, and the output =_.

When A = 0, A = 1, and the output =_.

Summarize

9. Use a two-input NAND gate to confirm that A ■ A = 0.

When A — 1, A — 0, and the output =_.

When A - 0, A = 1, and the output =_.

Summarize

10. Use two two-input AND gates and one two-input OR gate to represent the expression
A ■ B + A ■ C. Use a two-input OR gate and a two-input AND gate to represent the expression
A(B + C). Use one logic switch to set the A inputs to both circuits, one switch for the B
inputs, and one for the C inputs. Record the results in this truth table.

c B A A B+A C A(B+C)

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

Summarize
38 LAB 3.1

11. Use a two-input AND and a two-input OR to represent the expression A+A ■ B. Use a
two-input OR gate to represent the expression A + B. Use one logic switch to set the A inputs
to both circuits, and one switch for the B inputs. Record the results in this truth table.

B A A + AB A+B

0 0

0 1

1 0

1 1

Summarize

12. (DeMorgan’s theorem) Use a NAND gate to represent the expression^ • B. Use two inverters
and an OR gate to represent the expression A + B. Use one logic switch to set the A inputs to
both circuits, and one switch for the B inputs. Record the results in this truth table.

B A A B A+B

0 0

0 1

1 0

1 1

Summarize

13. (DeMorgan’s theorem) Use a NOR gate to represent the expression A + B, and two inverters
and an AND gate to represent the expression^ • B. Use one logic switch to set the A inputs to
both circuits, and one switch for the B inputs. Record the results in this truth table.

B A A+B A B

0 0

0 1

1 0

1 1

Summarize
Boolean Theorems 39

Now answer these questions about Boolean theorems.

14. Without looking back at any previous material, list all the Boolean theorems that you can
remember, including DeMorgan’s two theorems.

15. Refer back to the introduction to this lab to complete or correct the list you made for
question 14 as necessary.

Use the list of theorems to simplify the following expressions.

16. X+X-Y = _

17. C + D = _

18. E ■ F ■ 0 = _

19. E + F+0 = _

20. E+F+G+ 0 = _

21. EF\ = _

22. E + F+\ = _

23. E-F + E-F = _

24. E + F+E = _

25. E ■ F E = _

26. E F G + E H G = __

27. E + EF = ___

28. F + EF = _

29. E ■ F ■ G = __

30. E + F+G
40 LAB 3.1

Use the Boolean theorems to reduce these expressions to minimal terms. Several steps may be
required.

31. CBA+CBA

32. CBA + CBA

33. CBA + CBA + CBA

34. CBA + CBA + CBA + CBA

Designing Logic Circuits

Name Class Date

Objectives After completing this lab, you should be able to:

• Use Boolean theorems to design a logic circuit to implement a given truth table.

• Use a Karnaugh map to design a logic circuit to implement a given truth table.

Components 2 7408
Needed 1 7432
1 7404
3 Logic switches
1 LED
1 330-Q resistor

Equipment 1 5-volt power supply

Needed 1 Protoboard

Procedure

For each truth table given, write the Boolean expression for the output. Reduce the expression to
minimal terms by two methods; first, by Boolean theorems and then by a Karnaugh map. Draw
the schematic diagram of the logic circuit that represents the reduced expression. Connect your
circuit. Supply the inputs of each line of the truth table to your circuit and observe the output.
Record the result in the last column of the truth table.

c B A Y Observed Y

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 0

Reduce by Boolean algebra:

42 LAB 3.2

Schematic Diagram:

Reduce by Karnaugh map:

CBCBCBCB
A_
A

c B A y Observed V

0 0 0 i
0 0 1 i
0 1 0 i
0 1 1 i
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1

Reduce by Boolean algebra:

Designing Logic Circuits 43

Schematic diagram:

Reduce by Karnaugh map:

CBCBCBCB
A_

D c B A Y Observed Y

0 0 0 0 1
0 0 0 1 0
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 0

Reduce by Boolean algebra:

44 LAB 3.2

Schematic diagram:

Reduce by Karnaugh map:

Answer these questions.

4. Which method do you prefer for designing logic circuits, Boolean algebra or Karnaugh map?

Why?
Designing Logic Circuits 45

5. What size subcubes can be used in a Karnaugh map?

6. Why must the subcubes chosen be as large as possible?

7. Circle the subcubes in each Karnaugh map.

CB CB CB C8 CB CB C8 CB
A 1 0 0 1 A 1 1 1 0
A 1 1 0 1 A 0 1 1 1

CB CB CB CB CB ce CB CB
A 1 0 0 0 A 1 0 1 0

A 1 1 1 1 A 0 i 1 1

CB CB CB C6 CB CB C8 C~B
A 1 0 1 1 A 1 0 0 1

A 0 0 0 0 A 1 0 1 0

CB CB CB C8 CB C8 CB ce
A 1 1 1 0 A 0 0 1 0

A 1 1 1 1 A 1 0 1 i

DC DC DC DC DC DC DC DC

BA 0 1 1 0 6A 1 0 0 1

BA 0 1 0 1 BA 1 0 1 1

BA 1 0 1 0 BA 1 1 0 0

BA 0 1 1 0 BA 1 0 0 1
'
 3 3
Troubleshooting Combinational 3.3
Logic Circuits

Name_._ Class_ Date_

Objectives After completing this lab, you should be able to:

• Create a truth table from a given circuit.

• Create a Boolean expression for the output of a given circuit.

• Simplify a Boolean expression to minimal terms.

• Create a NAND gate version of a given circuit.

• Design a circuit to implement a 4-variable truth table.

• Troubleshoot combinational logic circuits.

Preparation

This lab will be performed on Electronics Workbench. Parts 1 and 2 will use the logic converter
instrument. It performs much of the work studied in this chapter. For example, from a given truth
table, the logic converter can write the Boolean expression, reduce it to minimal terms, draw the
logic circuit, and draw the logic circuit using only NAND gates.

Procedure

Part 1
1. Construct this circuit in Electronics Workbench.

2. Connect the inputs of the logic converter to the inputs of the circuit and the output of the
logic converter to the output of the circuit.

47
48 LAB 3.3

3. Turn on the circuit and expand the logic converter instrument. Click on the “circuit to truth
table” button. Record the truth table.

4. Click on the “truth table to Boolean” button. Record the Boolean expression.

5. Click on the “truth table to simplified Boolean” button. Record the minimized Boolean
expression.

6. Click on the “Boolean to circuit” button. Draw the reduced circuit.

7. Finally, click on the “Boolean to NAND circuit” button. Record the NAND gate version of
the circuit.
Troubleshooting Combinational Logic Circuits 49

8. Write the Boolean expression for the output of the NAND gate version. Reduce to minimal
terms. How does it compare with the logic converter’s simplified Boolean expression?

Instructor's Signature:

Part 2

1. Use Boolean algebra or Karnaugh map to design a circuit to implement this 4-variable truth table.

A B c D Y

0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 1
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 0
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 0

2. Now enter the truth table into the logic converter. (Click on the circles above the variables A,
B, C, and D and the logic converter will count in binary for you.)

3. Have the logic converter write the Boolean expression.

50 LAB 3.3

4. Have the logic converter simplify the Boolean expression.

5. Have the logic converter draw the circuit.

6. How do your results compare to the logic converter’s?

Instructor's Signature:

Part 3

1. Download these five circuits for you to troubleshoot: LM3-1 .ewb through LM3B-5.ewb.
LM3-1 and LM3-2 are the same circuit studied in section 3.10, with different faults inserted.

Circuits LM3-3 through LM3-5 are the same with different faults inserted. Sketch a logic
diagram of the circuit under study to understand how it is connected, and transfer the pin
numbers from the EWB schematic to your logic diagram. Use the word generator to supply
inputs to the circuit. Choose Window Description to see the truth table that is being
implemented. Step through the truth table until a fault is encountered (the output does not
agree with the truth table). Leave the word generator in that state while you investigate. Log
the steps taken.

CIRCUIT LM3-l.ewb:

Instructor's Signature:
Troubleshooting Combinational Logic Circuits 51

CIRCUIT LM3-2.ewb:

Instructor's Signature:

CIRCUIT LM3-3.ewb:

Instructor's Signature:

CIRCUIT LM3-4.ewb:

Instructor's Signature:

CIRCUIT LM3-5.ewb:

Instructor's Signature:
'
Exclusive-OR Gates
The 7485 is a 4-bit magnitude comparator. It compares two 4-bit binary numbers,
AyA2A\Ao and Bt,B2B\Bq, and determines whether A is less than B(A < B), A is greater than
B(A > B), or A equals B(A = B). The corresponding output—QA<B, Qa>b, or QA=B—goes
HIGH to signify the result. The three inputs—IA<B, IA>B, and IA=B— are called expander
inputs. When operating as a stand alone 4-bit comparator, IA<B and IA>B are grounded and
IA=B is tied HIGH. These expander inputs are used to expand the 7485 in circuits with
more than four bits. To expand the 7485, QA<B, QA>B, and QA=B of the least significant IC
must be tied to IA<B, IA>B, and IA=B respectively of the next 7485. As many 7485s as needed
can be cascaded in this manner. In Lab 4.1, 7485s will be used to compare 4-bit and 8-bit
binary numbers.

The 74HC7080 can be used as a 16-bit parity checker, 15 data bits and 1 parity bit, or
as a parity generator with up to 16 data bits. The output E/O is determined by the data
inputs 70 through /15 and the voltage level on input X. With input X HIGH and an even
number of Is on inputs 70 through /15, E/O goes HIGH to indicate even parity. If X is
changed to LOW, then an even number of Is on inputs I0 through /)5 causes E/O to go
LOW. In Lab 4.2 the 74HC7080 will be used both as a parity checker and parity
generator.

Lab 4.3 contains five Electronics Workbench circuits based on the 7486 quad
exclusive-OR gate IC, circuits LM4-l.ewb through LM4-5.ewb. These circuits contain
faults that are to be isolated as a troubleshooting exercise.

53
I

: :
 IJ 1
7485 4-Bit Magnitude Comparator t.i
Name Class Date

Objectives After completing this lab, you should be able to:

• Connect the 7485 to compare 4-bit binary numbers.

• Expand the 7485 for 8-bit operation.

• Predict the output for given inputs.

Components 2 7485s
Needed 6 LEDs
6 330-Q resistors
16 Data input switches or jumpers

Equipment 1 5-volt power supply

Needed 1 Protoboard

Procedure

1. The 7485 is comer-powered. Connect pin 16 to +5 volts and pin 8 to ground.

2. Connect IA<B and IA>B to ground and IA=B to Vcc. This initializes the 7485 to function as a
4-bit comparator or as the least significant IC in an expanded format.
 LAB 4.1
56

3. Wire A3A2AXA0 and B3B2BXB0 to logic switches to provide Is and Os to those inputs.

Predicted Output Actual Output

Ayi2A\Ao B3B2B xBq Qa>b

Co
Qa<b Qa>b Qa=b Qa<b

11
0 111 10 0 1

10 10 10 0 1

10 10 10 10

4. For each of the following combinations, predict the output levels on QA<B, QA>B, and Qa=b-

5. Connect a second 7485 to produce an 8-bit comparator.

6. For each of the following combinations predict the outputs on QA<B, Qa>b> and Qa=b-

Predicted Actual

a7a6a5a4a3a2axa0 B7B(yB3B4B3B2B xBq Qa<b Qa>b Qa=b Qa<b Qa>b Qa=b

10 11110 0 1 0 0 1 0 0 1 1

0 0 10 10 11 10 0 10 110

10 10 1110 10 10 1110

Now answer these questions.

7. For a stand alone 4-bit comparator, how are the expander inputs wired?
7485 4-Bit Magnitude Comparator 57

8. For these inputs, predict the outputs.

AyA2A\A0 b3b2bxb0 Qa<b Qa>b Qa=b

10 0 1 110 0

0 10 1 10 10

110 0 110 0

9. How can 7485s be cascaded for larger numbers?

10. For each of these combinations predict the output of the most significant 7485.

Predicted
A jA $A $A $A yA 2A1A 0 B^Bffi^B^B t,B2B ] B 0
Qa<b Qa>b Qa=b

0 0 11110 0 0 0 0 1 1 0 1 1

10 10 10 11 10 10 0 110

0 0 0 0 1 1 1 0 0 0 0 0 1 1 1 0
 IJ D
74HC7080 16-Bit Even/Odd Parity I.C
Generator/Checker

Name Class Date

Objectives After completing this lab, you should be able to:

• Predict even- and odd-parity bits.

• Use the 74HC7080 as an even- or odd-parity generator.

• Use the 74HC7080 as an even- or odd-parity checker.

Components 2 74HC7080s
Needed 1 LED
1 330-Q resistor
16 Logic switches

Equipment 1 5-volt power supply

Needed 1 Protoboard

Procedure

74HC7080

74HC7080: V = Pin' 20, Gnd = Pin 10

1. The 74HC7080 is corner-powered. Connect pin 20 to +5 volts and pin 10 to ground.

2. Create an organized method of supplying Is and Os to /0 through /15.

59
60 LAB 4.2

3. Use the 74HC7080 as a 16-bit odd-parity generator (15 data bits, 1 parity bit). Set input X to
the proper level so that an even number of Is in will cause E/O output to go HIGH to create
odd parity. Sketch the schematic diagram of your circuit.

Schematic: 16-bit odd-parity generator

4. Predict the odd-parity bit for each of the following 15-bit numbers. Then use your 16-bit
odd-parity generator to generate the parity bit. The numbers are expressed as four
hexadecimal digits. In each case the most significant digit is less than 8, making the most
significant bit 0. Use the lower 15 bits of each number as inputs into your parity generator.

Predicted Observed
Hexadecimal Binary Parity Bit Parity Bit

7F06

0000

7FFF

3ACD

5. Modify your circuit so that it becomes an even-parity generator.

Schematic: 16-bit even-parity generator

74HC7080 16-Bit Even/Odd Parity Generator/Checker
61

6. Predict the even-parity bit for each of the following 15-bit numbers. Then use your 16-bit
even-parity generator to generate the parity bit.

Predicted Observed
Hexadecimal Binary Even-Parity Bit Even-Parity Bit
6543

7ABC

0123

0E0E

7. Leave the generator connected and wire the second 74HC7080 as a 16-bit odd-parity checker
(15 data bits and 1 parity bit). Wire the 15 data bits to the same logic switches used for the
parity generator. Have an LED light if there is a parity error.

Schematic: 16-bit odd-parity checker

8. Each of the following 16-bit numbers represents 15 data bits and an odd-parity bit. First,
decide whether there is an odd-parity error, then enter the 16-bit numbers into your
odd-parity checker and observe any parity errors.

Predicted Parity Observed Parity

Hexadecimal Binary Error (yes or no) Error (yes or no)

FA09

3080

AE85

CCEE
62 LAB 4.2

9. Convert your parity checker into a 16-bit even-parity checker (15 data bits and 1 parity bit).

Schematic: 16-bit even-parity checker

10. Each of the following 16-bit numbers represent 15 data bits and an even-parity bit. First,
decide whether there is even-parity error, then enter the 16-bit numbers into your even-parity
checker and observe any parity errors.

Predicted Parity Observed Parity

Hexadecimal Binary Error (yes or no) Error (yes or no)

DB09

492D

5555

ACDF

11. Combine your even-parity generator and even-parity checker by feeding the 15 data bits into
each IC. Feed the parity bit generated by the generator into the checker as the 16th bit. For
any combination of data bits, the error light on the checker should not light.

Results:

Now answer these questions.

12. Describe the difference between a parity generator and a parity checker.
74HC7080 16-Bit Even/Odd Parity Generator/Checker 63

13. Determine the odd-parity bits for each of the following numbers.

Hexadecimal Binary Odd-Parity Bit

2345

7BCE

90FB

6C0F

14. Determine the even-parity bits for each of the following numbers.

Hexadecimal Binary Even-Parity Bit

5FF2

35EC

4447

5CEB
..
Name Class Date

Objectives After completing this lab, you should be able to:

• Troubleshoot a quad EX-OR IC using Electronics Workbench.

• Troubleshoot a 4-bit comparator using Electronics Workbench.

Procedure

1. Open circuit LM4-l.ewb. Use the square-wave generator as data input. Use Vcc and ground
to supply control input. Use the oscilloscope to compare the input waveform to the output to
determine whether each gate is inverting or not inverting properly. Log your procedure and
results.

Instructor's Signature:_

2. Open circuit LM4-2.ewb. Determine how the circuit is connected, then determine whether it
is functioning correctly. If not, isolate the faults. Keep a log of your steps. What is your
conclusion?

Instructor's Signature:

65
66 LAB 4.3

3. Open circuit LM4-3.ewb. Answer these questions.

a. Sketch the equivalent logic diagram of this circuit using individual gates.

b. What is the function of this circuit?

c. What does the light-emitting diode signify?

d. The word generator is being used to supply data to the circuit. The most significant four
bits (nibble) supply data to 4A 3 A 2A 1 A, and the least significant nibble supplies data to
4B 3B 2B IB. Enter the numbers to test the circuit. Try some of your own inputs.

4. Open circuit LM4-4.ewb. This circuit is the same as LM4-3.ewb except one fault has been
introduced. Isolate the fault. Keep a log of your steps. What is your conclusion?

Instructor's Signature:_

5. Open circuit LM4-5.ewb. This circuit is the same as LM4-3.ewb except one fault has been
introduced. Isolate the fault. Keep a log of your steps. What is your conclusion?

Instructor's Signature:
Troubleshooting Exclusive-OR Circuits 67

6. Open circuit LM4-6.ewb. This circuit is the same as LM4-3.ewb with a different fault.
Isolate the fault. Keep a log of your steps. What is your conclusion?

Instructor's Signature:_

7. Open circuit LM4-7.ewb. This circuit is a modification of LM4-3.ewb. Draw the equivalent
individual gates. A fault has been introduced. Isolate the fault. Keep a log of your steps.
What is your conclusion?

Instructor's Signature:_

8. Open circuit LM4-8.ewb. This circuit is a modification of LM4-3.ewb. Draw the equivalent
individual gates. A fault has been introduced. Isolate the fault. Keep a log of your steps.
What is your conclusion?

Instructor's Signature:
'

■
Adders
The 74181 is a four-bit arithmetic logic unit (ALU) that performs both arithmetic (add,
subtract, compare, double) and logic functions (AND, OR, Exclusive-OR, NAND, NOR).
The mode control input, M determines whether arithmetic or logic functions are to be
performed. When M is HIGH, logic functions are performed; and, when LOW, arithmetic
functions are performed. The select inputs S2, S2, Sx, S0 select which of the 16 arithmetic
or 16 logic functions are to be performed.

Arithmetic operations are performed on two 4-bit words—A3, A2,AU A0 and S3, B2,
Bu B0. The result appears on F3, F2, Fu F0. The 74181 is a full adder. The carry-in is
called Cn and the carry-out is called Cn+4. Cn and Cn+4 are active low. Place a LOW on Cn
to represent a carry-in and a HIGH to represent no carry-in. Negative results are
presented in 2’s complement form. The G and P outputs are used to interface this IC to a
74182 look-ahead carry IC for faster operation. Otherwise, ripple carries are used. Lab
5.1 is dedicated to a study of the arithmetic operations performed by the 74181.

Logic operations are performed on individual pairs of bits. The function^ + B ORs
Ao with B0 and the result appears on F0. Likewise, Ax is ORed with 5, and the result
appears on Fx and so on. For example, when 1010 is ORed with 1001, the result is 1011.
The carries Cn and Cn+4 are disabled during logical operations. Lab 5.2 is dedicated to a
study of the logical operations performed by the 74181.

Lab 5.3 is an Electronics Workbench troubleshooting exercise. The BCD adder, 1 ’s

complement adder/sub tractor, and 2’s complement adder/subtractor are covered in circuits
LM5-l.ewb through LM5-15.ewb.

Here is a list of the 16 arithmetic functions and the 16 functions performed by the
74181.

ACTIVE HIGH DATA

Mode Select Inputs Arithmetic Functions Logic Functions

s3s2sxs0 M = LOW Cn = HIGH (no carry) M- HIGH

0 0 0 0 A A
0 0 0 1 A+B A+B

0 0 10 A+B AB

0 0 11 -1 (2’s comp) 0

0 10 0 A plus AB AB

0 10 1 (A + B) plus AB B

69
70 CHAPTER 5

ACTIVE HIGH DATA (continued)

Mode Select Inputs Arithmetic Functions Logic Functions

S3W0 M = LOW Cn = HIGH (no carry) M- HIGH

0 110 A minus B minus 1 A+B

0 111 AB minus 1 AB

10 0 0 A plus AB A+B

10 0 1 A plus B A+B

10 10 (A + B) plus AB B

10 11 AB minus 1 AB

110 0 A plus A 1

110 1 (A + B) plus A A+B

1110 (A + B) plus A A+B
1111 A minus 1 A
Note: (A + B) signifies “A OR 5” and AB signifies “A AND B.”
74181 Arithmetic Operations

Name Class Date

Objectives After completing this lab, you should be able to:

• Initialize the 74181 for arithmetic operation.

• Predict the output for all 16 functions.

• Use the 74181 to solve specific problems.

Components 1 74181
Needed 12 Logic switches
5 LEDs
5 330-£2 resistors

Equipment 1 5-volt power supply

Needed 1 Protoboard

Procedure

U1

74181: Vcc= Pin 24, Gnd = Pin 12

1. The 74181 is corner-powered. Connect pin 24 to +5 volts and pin 12 to ground.

2. Connect A3A2A i^o and B3B2B]B0 to logic switches to provide 1 s and Os for those inputs.
Set A = 1000 and Z? = 0110.

3. Wire M to ground to select the arithmetic functions.

71
72 LAB 5.1

4. Wire Cn to +5 volts to make Cn = 0 (active LOW).

5. Wire S3S2SXS0 to logic switches. For each setting of S3S2SXS0 predict the outputs Cn+4,
F3F2F\F0. Verify by observing the actual result. Record predicted and observed outputs on
the following worksheet.

Predicted Output Observed Output

S3S2S\Sq Cn+4 F3 f2 F\ F0 Cn+4 F~i f2 Fx F0

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1 1

Now work these problems.

6. If A = 1010 and B = 1100, predict the outputs Cn+4, F3F2FXF0 for each setting of S3S2SXS0.

Predicted Output Observed Output

S3S2SXS0 Cn+4 F3 f2 F, F0 S3S2S\S0 Cn+4 F3 F2 Fx F0
0 0 0 0 1 0 0 0
0 0 0 1 1 0 0 1
0 0 1 0 1 0 1 0
0 0 1 1 1 0 1 1
0 1 0 0 1 1 0 0
0 1 0 1 1 1 0 1
0 1 1 0 1 1 1 0
0 1 1 1 1 1 1 1
74181 Arithmetic Operations 73

7. If A = 0111 and B = 1010 predict the results + B. Use the 74181 to confirm.

Predicted Result_ Observed Result_

8. If A = 1011 and B = 0011 predict the result of A • 2. Confirm.

Predicted Result_ Observed Result_

9. If A = 1000 and 5 = 0101 predict the result of A - B - 1. Confirm.

Predicted Result_ Observed Result_

10. If ,4 = 1010, 5 = 1000, and C3C2C,C0 =1101, predict the output and confirm.

Predicted Result Observed Result_

! ' , ' . ■ 1 1 . •
74181 Logical Operations

Name Class Date

Objectives After completing this lab, you should be able to:

• Initialize the 74181 to perform logical operations.

• Predict the output for all 16 functions.

• Use the 74181 to mask out specific bits.

• Use the 74181 to toggle specific bits.

Components 1 74181
Needed 12 Logic switches
5 LEDs
5 330-Q resistors

Equipment 1 5-volt power supply

Needed 1 Protoboard

Procedure

ui
9
^0 Fo
23 10
Ay Fy
21 11
a2 f2
19 13
A3 f3

B0
22
By
20
b2
18
b3
14
A-B
16
Cn Cl+4
YT
G
15
So P
Si

S2
s3
M

74181

74181: V/cc= Pin 24, Gnd = Pin 12

1. The 74181 us comer-powered. Connect pin 24 to +5 volts and pin 12 to ground.

2. Connect AyA2A\A0 and B2B2B^B0 to logic switches to provide 1 s and Os for those inputs.
Set A = 1010 and B = 0110.
76 LAB 5.2

3. Wire M to +5 volts to select the logic function.

4. Cn is ignored in the logic mode. Its logic state does not matter.

5. Wire S3S2SlSQ to logic switches. For each setting of S3S2SiS0 predict the outputs F3F2FlFQ.
Verify by observing the actual result. Record predicted and observed outputs in the chart below.

Predicted Output Observed Output

S3S2S{S0 F, f2 F\ Fo Fi f2 Fi Fo
0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1 1

6. If A = 0111 and B = 1011, predict the outputs F3F2FXF0 for each switch setting of

Predicted Output Observed Output

W.Sb Ft, F2 F, Fo Fi f2 Fl F0
0 0 0 0
0 0 0 1
0 0 10
0 0 11
0 10 0
0 10 1
0 110
0 111
74181 Logical Operations 77

Predicted Output Observed Output

S3S2S\Sq f2 Ft F0 f3 f2 Fx F0
10 0 0

10 0 1

10 10

10 11

110 0

110 1

1110

1111

Now that you are familiar with the 74181, work the following problems.

7. Logical operations are used to “mask out” certain bits, that is, set them to 0. Choose the
proper function and value of B that will mask out bits 2 and 1 of A.

Hint Any bit ANDed with 0 is 0.

Predicted Solution: Observed Solution:

F3B2BXBQ = - Bt,B2B\Bq = -

S$S2S\Sq = - s3s2sxs0 =-

If A3A2A1A0 = 1010 If A3A2A,A0 = 1010

Then F3F2FXF0 = _ Then F3F2FlF0 = _

8. Use the same function and value of B to mask out bits A with A — 1111.

Predicted Result_ Observed Result_

9. Logical operations are used to “toggle” or complement specific bits in a word. Choose the
proper function and value of B that will toggle bits 2 and 1 of A. Bits 3 and 0 should remain
unchanged.

Hint Any bit Exclusive-ORed with 1 is complemented.

Predicted Solution: Observed Solution:

B3B2B\Bq — B3B2BxBq =
S3S2S\S0 = _ S3S2SyS0 -
If A3A2A]A0 = 1010 If A3A2AXA0 = 1010

Then F3F2F{F0 = _ Then F3F2FXF0 = -

10. Use the same function and value of B to toggle A with ,4 = 1111.

Predicted Result Observed Result

 -

.
Troubleshooting Adder Circuits

Name Class Date

Objectives After completing this lab, you should be able to:

• Troubleshoot a BCD adder circuit.

• Troubleshoot a 1 ’s complement circuit.

• Troubleshoot a 2’s complement circuit.

Preparation

In each part of this lab you are asked to troubleshoot one of the three adder/subtractor circuits
covered in this chapter. In each circuit the word generator is used to supply inputs to the circuits.
The first three addresses of the generator contain test problems. If you cannot determine the fault
by studying the test problems, create some tests of your own. Use the lamp indicators, volt
indicators, or voltmeters to check critical voltages. Keep a log of your procedure and write a
paragraph discussing your conclusion.

Part 1

1. In Electronics Workbench open circuit 5B-1 .ewb and answer these questions,

a. What is the function of this circuit?

b. Which bits of the word generator are supplying the B inputs?

A inputs?

c. The first three lines of the word generator contain test problems for the circuit. What are
the three test problems?

d. Is the final result correct in each case? •

e. Is the preliminary sum (output of the first 7483) correct in each case?

79
80 LAB 5.3

f. In each situation, should 6 be added to correct the preliminary result?

g. If so, is 6 being added correctly?

2. Open circuit LM5-2.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

3. Open circuit LM5-3.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

4. Open circuit LM5-4.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

5. Open circuit LM5-5.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

Part 2

1. In Electronics Workbench open circuit LM5-6.ewb and answer these questions.

a. What is the function of this circuit?

b. Which bits of the word generator are supplying the B inputs?

A inputs?

Add/subtract control signal?

Troubleshooting Adder Circuits 81

c. The first three lines of the word generator contain test problems for the circuit. What are
the three test problems?

d. Is the final result correct in each case?

e. Is the preliminary sum (output of the first 7483) correct in each case?

f. In each situation, should an end-around carry be added into the preliminary sum? If so, is
it being added correctly?

g. In each situation, should the preliminary sum be complemented? If so, is it being

complemented correctly?

2. Open circuit LM5-7.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

3. Open circuit LM5-8.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

4. Open circuit LM5-9.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

5. Open circuit LM5-10.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:
 LAB 5.3
82

Part 3
1. In Electronics Workbench open circuit LM5-11 .ewb and answer these questions,

a. What is the function of this circuit?

b. Which bits of the word generator are supplying the B inputs?

A inputs?

Add/subtract control signal?

c. The first three lines of the word generator contain test problems for the circuit. What are
the three test problems?

d. Is the final result correct in each case?

e. Is the preliminary sum (output of the first 7483) correct in each case?

f. In each situation, should the preliminary sum be complemented? If so, is it being

complemented correctly?

2. Open circuit LM5-12.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

3. Open circuit LM5-13.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:
Troubleshooting Adder Circuits 83

4. Open circuit LM5-14.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

5. Open circuit LM5-15.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:
 *

• '.

• *

.
 CHRPTER i~

Specifications and
Open-Collector Gates
Fan-out refers to the number of gates or loads that can be connected to the output of a
gate or other driving device. Fan-out is calculated by dividing the low-level output current
of the driving device by the low-level input current of the device to be driven.

fan-out = Iol /Iil

As more devices are driven, the output current of the driving device increases. As the
low-level output current increases so does the output voltage. If output current rises too
high, the output voltage rises above the legitimate LOW-level output voltage and the
following devices may not recognize the output voltage as a LOW level. Also, the noise
margin is no longer maintained.

In Lab 6.1, we will determine fan-out by adding load until the low level output rises
above the maximum allowable low-level output voltage. One input into a 7400 NAND
gates draws a maximum of 1.6 mA. This is called one standard load. The 7400 gates will
be used to load down each of the gates studied.

High-level input voltage (VIH), low-level input voltage (VIL), high-level output voltage
( Voh)-> and low-level output voltage (V0j of a digital device can all be summarized on a
graph called the input-to-output transfer characteristic curve. On this curve the output
voltage VQ is plotted on the vertical axis as a function of input voltage on the horizontal
axis. In Lab 6.2, input and output voltage measurements will be taken so that transfer
characteristic curves can be plotted for several gates.

Lab 6.3 is based on an Electronics Workbench circuit in which an open-collector

inverter drives a relay coil operating at 15 volts. The relay contactors control 120-volt
bulbs. Circuit LM6-l.ewb describes the circuit, and circuits LM6-2.ewb through
LM6-8.ewb contain faults. As a troubleshooting exercise you will isolate each of the
faults.

85
.
Name Class Date

Objectives After completing this lab, you should be able to:

• Define and calculate fan-out.

• Experimentally determine fan-out.

• Contrast the fan-out abilities of the LS, HC, and AC subfamilies.

Components 7 7400s
Needed 1 74LS00
1 74HC00
1 74AC1100
Graph paper

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 dc voltmeter

Procedure

Fan-Out—74LS00
1. From a spec book find the maximum low-level output voltage and low-level output current
for a 74LS00 NAND gate.

V(DL max “- iOL max —-

2. From a spec book find the maximum low-level input current of a 7400.

I!L max —-

3. Calculate the number of 7400 gates that a 74LS00 should be able to drive.

Fan-out =_

4. Tie the inputs to one of the 74LS00 NAND gates HIGH to force the output LOW. Measure
the output voltage and record it in the table on page 89.

5. Connect an input of a 7400 NAND gate to the output of the 74LS00 NAND gate. Record the
output voltage of the 74LS00.

6. Continue connecting 7400 NAND gates as loads until the measured output voltage of the
74LS00 rises above VOL max. Each time a gate is added, measure and record in the table the
output voltage of the 74LS00. Expand the chart as needed.

87
88 LAB 6.1

7. Contrast the calculated and measured fan-out for a 74LS00 feeding 7400 NAND gates.

Fan-Out—74HC00
8. From a spec book find the maximum low-level output voltage and low-level output current
for a 74HC00 NAND gate.

^OL max - ^OL max -

9. Calculate the number of 7400 gates that a 74HC00 should be able to drive.

Fan-out =_

10. Following the method previously outlined, measure the fan-out of a 74HC00 driving 7400
NAND gates. Each time a gate is added to the load, measure and record the output voltage in
the chart on page 89.

11. Contrast the calculated and measured fan-out for a 74HC00 feeding 7400 NAND gates.

Fan-Out—74AC1100
12. From a spec book find the maximum low-level output voltage and low-level output current
for a 74AC1100 NAND gate.

13. Calculate the number of 7400 gates that a 74AC1100 should be able to drive.

Fan-out -_

14. Following the method previously outlined, measure the fan-out of a 74AC1100 driving 7400
NAND gates. Each time a gate is added to the load, measure and record the output voltage in
the chart on page 89.

15. Contrast the calculated and measured fan-out of a 74AC1100 feeding 7400 NAND gates.

16. Contrast the fan-out capabilities of the 74LS00, the 74HC00, and the 74AC1100.
Fan-Out 89

Load Voltage Out Voltage Out Voltage Out

74LS00 74HC00 74AC1100
1 7400 loads

2 7400 loads

3 7400 loads

4 7400 loads

5 7400 loads

6 7400 loads

7 7400 loads

8 7400 loads

9 7400 loads

10 7400 loads

11 7400 loads

12 7400 loads

13 7400 loads

14 7400 loads

15 7400 loads

16 7400 loads

17 7400 loads

18 7400 loads

19 7400 loads

20 7400 loads

21 7400 loads

22 7400 loads

23 7400 loads

24 7400 loads

25 7400 loads

26 7400 loads

27 7400 loads

28 7400 loads
 ■

.
 C
Input-to-Output Transfer o.c -I

Characteristic Curves

Name Class Date

Objectives After completing this lab, you should be able to:

• Graph input-to-output transfer characteristic curves for selected ICs.

• Identify VIH, VIL, VOH, and V0L on transfer curves.

Components 1 7400
Needed 1 74LS00
1 74HC00
1 74HCT00

Equipment 1 5-volt power supply

Needed 1 Variable dc power supply
1 Protoboard
1 dc voltmeter

Procedure

7400 Input-to-Output Transfer Characteristic Curve

1. Connect the inputs of one of the NAND gates together so that it functions as an inverter.

2. Use the variable dc power supply to provide 0 volts to the input of the NAND gate.

3. Measure the output voltage. Record input and output voltage in the data table on page 93.

4. Vary the input in 0.5 volt increments from 0 to 5 volts. Record the input and output for each
step on page 93.

5. Return to any interval where the output changed drastically and take measurements in
smaller increments. Record the results of each step.

91
 LAB 6.2
92

6. Graph voltage out (Va) on the vertical axis and voltage in (V/) on the horizontal axis. Choose
the scale so that your graph covers a large area of your graph paper. Draw a trial graph while
the equipment is still connected so that dubious results can be confirmed. Watch for regions
where more data is required for a smooth curve. Take additional readings as required. Label
the vertical and horizontal axes with both the quantity being presented (V0 and V,) and the
units being displayed (volts). Label the curve 7400.

7. From your graph, find typical values for these quantities for the 7400.

VIH_ VIL_ VOH- V0L-

74LS00 Input-to-Output Transfer Characteristic Curve

8. Repeat the process for a 74LS00 NAND gate. Record your data in the data table on page 93.

9. Draw your final graph on the same axis as the 7400 curve.

10. From your graph, find typical values for these quantities for the 74LS00.

Vm_ Vfi_ VOH- V0L-

74HC00 Input-to-Output Transfer Characteristic Curve

11. Repeat the process for a 74HC00 NAND gate. Record your data in the data table on page 93.

12. Draw your final graph on the same axis as the 7400 curve.

13. From your graph, find typical values for these quantities for the 74HC00.

kih_ Vm- VOH- V0L-

74HCT00 Input-to-Output Transfer Characteristic Curve

14. Repeat the process for a 74HCT00 NAND gate. Record your data in the table on page 93.

15. Draw your final graph on the same axis as the 7400 curve.

16. From your graph, find typical values for these quantities for the 74HCT00.

Vm_ VIL_ VOH_ VOL_

17. Contrast the input-output transfer characteristic curves for the 7400, 74LS00, 74HC00, and
74HCT00.
Input-to-Output Transfer Characteristic Curves 93

DATA TABLE

V, Vo V0 V0 V0
7400 74LS00 74HC00 74HCT00

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0
 C 3
Troubleshooting Open-Collector Circuits 0.3
Name Class Date

Objectives After completing this lab, you should be able to:

• Troubleshoot an open-collector inverter circuit.

• Troubleshoot a relay circuit.

Preparation

This lab uses an open-collector inverter to control a relay. The symbol used by Electronics
Workbench for a relay is shown here.

Normally-Closed Contacts
Armature
Normally-Open Contacts
c
c > -*- Relay Coil

The bottom part of the symbol represents a coil of wire, the relay coil. This relay has two sets of
contacts, one normally-closed set and one normally-open set. The symbol shows that, when no
current is flowing through the coil, the armature makes contact with the top contact but not with
the bottom contact. When sufficient current flows through the coil, a magnetic field is produced
that causes the armature to be pulled down toward the coil. The armature breaks contact with the
top contact and makes contact with the bottom contact.

The circuit that you will troubleshoot in this lab uses a TTL open-collector inverter operating
at 5 volts to control a 15-volt relay coil circuit. The normally-open and normally-closed
contactors are used to control two 120-volt lamps.

Procedure
1. In Electronics Workbench open circuit LM6B-1 .ewb and study the circuit description to
understand the operation of the circuit. There are no faults in circuit LM6-l.ewb.

2. Open circuit LM6-2.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:

95
96 LAB 6.3

3. Open circuit LM6-3.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

4. Open circuit LM6-4.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

5. Open circuit LM6-5.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

6. Open circuit LM6-6.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

7. Open circuit LM6-7.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:_

8. Open circuit LM6-8.ewb. Isolate any faults. Keep a log of your procedures and results.

Instructor's Signature:
Flip-Flops
Chapter 7 is the beginning of the study of flip-flops. The labs will introduce the student to
the basic SET-RESET flip-flop, gated SET-RESET flip-flop, transparent D flip-flop,
master-slave D flip-flop, and the pulse-triggered D flip-flop. Flip-flops are often used to
store binary data and to debounce noisy switches. These labs explore the basic operation
of the flip-flops and introduce the student to the ability of a master-slave flip-flop to
toggle. This will lead to the material in the next chapter where this study is continued.

If the circuits do not work correctly, first check the power supply of each IC at the
Vcc and Gnd pins with a voltmeter or oscilloscope set on dc. Protoboards can often have
bad connections. Small wires with thin insulation can be pressed into the protoboard too
deeply, causing the insulation on the wire to make a bad or broken electrical contact with
the protoboard pins. An input pin, which should have a logic 1 or 0 on it and measures
between 1 and 2 volts, is not connected to anything. An open TTL input will measure
about 1.2 volts. This is a dead giveaway that there may be a wiring error.

The master-slave flip-flop in Part 2 of Lab 7.2 can often be difficult to get to work
correctly. If you cannot make it work correctly, try disconnecting the slave from the
master and get the master to work correctly first. The master is a transparent D flip-flop
and can be debugged much easier alone. After the master is working correctly, check the
operation of the slave by itself, then connect the two together.
 ■

' •

.
 L 1oIU
o
1

Flip-Flops i IB
Name Class Date

Objectives After completing this lab, you should be able to:

• Construct and explain the operation of a pulse-triggered D flip-flop.

• Construct and explain the operation of a master-slave D flip-flop.

• Use typical D flip-flop ICs to latch data.

Components 1 74LS00 IC
Needed 1 74LS08 IC
1 74LS04IC
2 74LS10ICs
1 74LS74IC
1 74LS75IC
2 330-Q X-W resistors
2 Red LEDs

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 Dual-trace oscilloscope
1 TTL signal generator

103
 LAB 7.2
104

Procedure

Part 1
Construct the circuit below and have your instructor check its operation. Use the circuit to answer
questions 1 and 2.

74LS00 Vcc = Pin 14, Gnd = Pin 7

74LS04 Vcc = Pin 14, Gnd = Pin 7
74LS08 Vcc- Pin 14, Gnd = Pin 7

1. When do the Q and Q outputs of the pulse-triggered D flip-flop change states and why?

2. Place a 10-kHz TTL square-wave signal on the CLOCK input to the pulse triggered D
flip-flop. Use the dual-trace oscilloscope to observe the 10-kHz TTL signal and the output of
the AND gate which pulses the D flip-flop (Pin 3 U3A). Draw the two waveforms below.
Measure the pulse width of the trigger pulse.

high
CLOCK
low -
high -
Pin 3 U3A

low
Flip-Flops
105

Part 2
Construct the circuit below and have your instructor check its operation. Use the circuit to answer
questions 3 through 5.

PRESET

CLEAR

74LS00: Ucc = Pin 14, Gnd = Pin 7

74LS10: Vcc= Pin 14, Gnd = Pin 7

3. Complete the truth table shown below using the master-slave D flip-flop found in Part 2 of
the procedure.

CLOCK i D CLEAR PRESET Q Q

1 X 1 1

0 X 1 1

t X 1 1

i 0 1 1

i 1 1 1

X X 0 1

X X 1 0

X X 0 0

Note: X = 1 or 0
106 LAB 7.2

4. Place a 1 on the CLEAR and PRESET and put a 1-kHz TTL square-wave signal on the
CLOCK input. Use a piece of wire to connect the Q output to D input. Use the dual-trace
oscilloscope to observe the clock input and the Q output of the flip-flop. Draw the
waveforms below and measure their frequency. The ability of a master-slave flip-flop to
toggle or divide an input frequency by 2 will be studied in depth in Chapter 8.

high -
CLOCK
low -
high -
Q Output
low -

CLOCK Frequency_ Q Output Frequency_

5. With the master-slave flip-flop set up as discussed in question 4, place a 0 on the CLEAR
input. What happens to the Q output and why?

Part 3
Construct the circuit below and have your instructor check its operation. Use the circuit to answer
questions 6 and 7.

'Ac

74LS74: Vcc = Pin 14, Gncl = Pin 7

74LS04: Vcc = Pin 14, Gnd = Pin 7
Flip-Flops 107

6. What happens when the CLOCK is brought from a low to a high and why?

7. With the clock low, bring the CLEAR pins low and then back high. What happens and why?

Part 4
Construct the circuit below and have your instructor check its operation. Use the circuit to answer
question 8 through 10.

U2A 74LS04

o^
10 Hz
1C>" Dy

02 q2 'cc
q2
d3 o3
u3
d4 q4
u4
CLOCK 13
> C12
> C34

U1 74LS75

74LS75: 1/ = Pin 5, Gnd = Pin 12

8. Bring the CLOCK input low. What happens and why?

108 LAB 7.2

9. What is the difference between the operation of the circuits in Part 3 and Part 4?

10. How can the two circuits in Parts 3 and 4 be used?

Name___ Class_ Date_

Objectives After completing this lab, you should be able to:

• Use Electronics Workbench to troubleshoot a simple D flip-flop operation.

• Construct digital circuits using simple D flip-flops.

Procedure
Open the Workbench file named LM7-l.ewb and then answer the following questions.

1. What type of flip-flop is being used in this circuit?

2. Will the logic states of the Q output of flip-flop 1 and flip-flop-2 ever be the same? Why or
why not?

3. Why is the LED driven from the Q complement output instead of the Q output?

4. What should be the state of the two LEDs if the switch, SI, is opened after being closed?

This circuit (LM7-l.ewb) does not work correctly. Use the following steps to find the problem.

1. Place a logic indicator on the D inputs and slow down the 10-kHz clock to a one-half second
rate.

2. Toggle the switch back and forth and observe the condition of the LEDs.

109
3. What is wrong with this circuit?

4. Use Workbench to fix the problem and have the instructor OK its operation.

Instructor's Signature:
 CHRPTER o
o
Master-Slave D and
JK Flip-Flops
The toggling of a flip-flop is explored in this set of labs. Lab 8.1 uses NAND gates to
build a master-slave JK flip-flop. JK flip-flops are the building blocks of many digital
circuits because of their flexibility and ability to toggle. Lab 8.2 uses 74LS76 negative
edge-triggered JK flip-flops to build a nonoverlapping clock and shift counter. This
counter was used in previous chapters to study the properties of gates and combinations
of gates. The output waveforms of the shift counter should be familiar to the student.

When constructing the circuits in these labs, be sure not to leave an input open with
the idea that the IC will consider the unconnected input as a logic 1. JK flip-flops do
funny things when inputs such as the JK or CLEAR are left unconnected.

Ill
 / GO
LI IU

Q 1r
JK Flip-Flops and Delayed Clock o.i <

Name___ Class_ Date

Objectives After completing this lab, you should be able to:

• Construct a master-slave JK flip-flop and make it toggle.

• Use a JK flip-flop to make a nonoverlapping clock.

Components 1 74LS00
Needed 1 74LS08
1 74LS10

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 Dual-trace oscilloscope
1 TTL signal generator

Procedure

Part 1
Construct the JK flip-flop shown below. When you have finished constructing the flip-flop, have
your instructor check the operation of the flip-flop. Then answer questions 1 through 5.

PRESET

9- Q

CLEAR

74LS00: Vcc = Pin 14, Gnd = Pin 7

74LS10: Vcc-Pin 14, Gnd = Pin 7

113
 LAB 8.1
114

1. Place a logic 1 on the PRESET, CLEAR, J, and K inputs to the flip-flop. Use a 2-kHz TTL
signal to drive the C or clock input. Draw the C input waveform and the Q output waveform
below.

high -

C
low
high -

low -

2. What would you change in this flip-flop to make it a positive edge-triggered flip-flop?

3. With the flip-flop configured for question 1, bring the CLEAR input low. What happens to
the Q output and why?

4. Use the JK flip-flop in Part 1 to complete the truth table shown below.

PRESET CLEAR J K c Q Q
0 1 X X X

1 0 X X X

0 0 X X X

1 1 0 1 i
1 1 1 0

1 1 0 0 X

1 1 1 1 i
JK Flip-Flops and Delayed Clock 115

5. Place a logic 1 on the CLEAR, PRESET, J, and K inputs. Use a debounce switch to raise the
C input high and low again. Draw the Q' and Q outputs below as the C or clock input is
raised and lowered.

high -
C
low -
high -

low
high -

low -

Part 2
Add the two AND gates shown below to the Q outputs of the JK flip-flop shown in Part 1 of this
lab. Answer question 6.

Q
CP

c
CP'
Q

74LS08: Vcc= Pin 14, Gnd = Pin 7

6. Use the dual-trace oscilloscope to observe the C, Q, Q, CP' waveforms. Draw them below.

high -
C
low -
high -

low -
high -

Q
low -
high -
CP
low -
high -
CP'
low
 .

•»
 1 oo
. L1 1U
O 3
Shift Counter and Delayed Clock O.C
Name_ Class_ Date

Objectives After completing this lab, you should be able to:

• Construct a nonoverlapping clock from JK flip-flops.

• Construct a shift counter from JK flip-flops.

• Use the nonoverlapping clock and shift counter to produce desired waveforms and
to predict waveforms for given logic circuits.

Components 2 74LS76
Needed 1 74LS08
1 1-kQ y4-W resistor
1 N/O push button
1 74LS32
1 74LS00

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 Dual-trace oscilloscope
1 TTL signal generator

Procedure

Part 1
Construct the nonoverlapping clock shown below. When you have completed it, have your
instructor check its operation, then answer questions 1 and 2 on the worksheet for this lab.

Q
U1A
15
U3A r\i_ CP
74LS08
J PR Q y

c c> CLK
16 14
K CL
TT
Q U3B r\e_ CP’
74LS08
74LS76 y
Q
6 V,cc

74LS76: Vcc = Pin 5, Gnd = Pin 13

74LS00: l/cc = Pin 14, Gnd = Pin 7

117
 LAB 8.2
118

1. Place a 12-kHz TTL signal on the C or clock input of the nonoverlapping clock circuit shown
in Part 1. Use the dual-trace oscilloscope to observe the C, Q, Q, CP, and CP' signals. Draw
them below.

high -

C
low -
high -

low
high -

Q
low -
high -
CP
low -
high -
CP'
low -

2. What is the frequency of the CP signal?

CP Frequency_

Part 2
Construct the shift counter below and use the CP from the circuit in Part 1 to drive it. When you
have completed it, have your instructor check the operation of the circuit, then answer questions 3
through 5 on the worksheet for this lab.

Vcc O-

11 15
J PR Q J PR Q J PR Q

CP — o> CLK -C> CLK C> CLK

12 10 16 14 12 10
K CL Q It CL Q ^ CL Q
TJ Tr
U1B 74LS76 U2A 74LS76 U2B 74LS76

RESET 1 k
B

'cc B

74LS76: Vcc-Pin 5, Gnd = Pin 13

Shift Counter and Delayed Clock
119

3. Press the RESET button oirthe shift counter circuit and then use the dual-trace oscilloscope
to observe the CP, A, A, B, B, C, and C signals. Draw the waveforms below. Draw at least six
clock cycles of CP and CP'. Number them from 1 to 6.

high
CP
low
high
CP'
low
high

low
high

low
high
B
low
high
B
low
high
C
low
high
C
low

4. What is the frequency of the A signal?

A frequency _

5. Using the waveforms in question 3, design a circuit that will output the following waveforms.
Connect the circuit to the shift counter and observe the output waveform on the oscilloscope.
Draw the logic drawing of the circuit below each waveform on the answer sheet.
120 LAB 8.2

cp _m_[21_[ii_[41_fil_ra—

cp' _R1_fil_[3!_fil_fil-Tel-

Output _11_n-11-
Draw the logic circuit for the above waveform here.

cp _JTI_fil_fil_if fil_lei_

cp' fTI_fil_fil_fil_fil_liL

Output _I I_

Draw the logic circuit for the above waveform here.

cp _fTI_fil_fil_if_Til_fil

cp' _fil_fil_Til_fil_fil_TiL

Output _I |_

Draw the logic circuit for the above waveform here.

Shift Counter and Delayed Clock 121

Part 3
Construct the logic circuits shown below to the shift counter in Part 2 and use them to answer
questions 6 and 7 on the worksheet for this lab.

CP'
Output
A

Circuit A

Output

74LS00: Vcc = Pin 14, Gnd = Pin 7

74LS32: Vcc= Pin 14, Gnd = Pin 7

6. Predict the output waveform for circuit A in Part 3 and draw it below. Use the oscilloscope to
confirm your answer.

high -
Output
low -

7. Predict the output waveform for Circuit B in Part 3 and draw it below. Use the oscilloscope to
confirm your answer.

high
Output
low
.
Name Class Date

Objectives After completing this lab, you should be able to:

• Use Electronics Workbench to troubleshoot a delayed clock and shift counter.

• Design and construct logic circuits to produce desired waveforms from the delayed
clock and shift counter.

Procedure
-1
Open the Workbench file named LM8-1 .ewb and find the fault in the circuit. Fix the fault so the
circuit works correctly and then use the circuit to answer the following questions.

1. What is the frequency of output QA1

2. What is the frequency of CP'l

3. How many CP clock in one cycle of QA1

4. Draw the indicated waveforms below:

Qa

Qb

Qc

CP

CP'

123
124 LAB 8.3

5. Draw the waveform for the logic circuit shown below.

6. Design a logic circuit that will produce the following waveform. Draw the logic diagram
below and have the instructor OK its operation in Workbench.

CP ~T[jrrTTljrrrTLir77Tl_J77TTl_J77TTlJTTT7LiTTT7LJTTTTlJTrTT
cp' .JTTTljrTTTljrTTriJ^TTlJ^TTlJTTTTlJTTTTlJTTTTlJTTrTlJT

Waveform 1 .1.[ . . [~71 . I.

Instructor's Signature:
 CHAPTER Q
-v WHOM

Shift Registers
Shift registers are a basic type of digital circuit made from flip-flops that can be used for
many types of applications such as serial data transmission, control of stepper motors,
and sequencing of digital circuits. The first two labs will introduce the student to
parallel-in serial-out and serial-in parallel-out shift registers. The student will also be
introduced to serial data transfer and the basic RS-232C serial data transfer standard.

Construction of the circuits in these labs is not difficult. A good voltmeter or

oscilloscope set to dc operation is useful in debugging these circuits if they do not work
properly. Remember to check the power to each IC at the IC’s power pins and do not leave
a flip-flop CLEAR or PRESET unconnected.

If a storage oscilloscope is available, the student can run the shift register at a fast
speed and use the storage oscilloscope to grab the waveforms as the shift register clocks
the data out or in. This is a good circuit to teach the use of a storage oscilloscope.

125
.
Shift Registers

Name Class Date

Objectives After completing this lab, you should be able to:

• Construct a shift register from flip-flops.

• Understand the serial-to-parallel and parallel-to-serial data conversion.

Components 4 74LS76
Needed 2 74LS00
1 74LS04
8 Red LEDs
8 330-Q ]/4-W resistors
2 1-kQ /4-W resistors

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 TTL signal generator
1 Debounce switch

Procedure

Part 1
Construct the 4-bit shift register shown below and connect the clock input to a debounce switch.
If a debounce switch is not available on your trainer or signal generator, you can build it using a
SET-RESET flip-flop made from the NAND gates as was done in Lab 7.1. Answer questions 1
through 5.

74LS76: Vcc = Pin 5, Gnd = Pin 13

74LS00: Vcc~ Pin 14, Gnd = Pin 7
74LS04: Vcc = Pin 14, Gnd = Pin 7
128 LAB 9.1

1. Place the number 8 on the parallel load inputs and then bring the LOAD input high and then
low. What happens and why?

2. Press the debounce switch five times. What happens and why?

3. What will be the logic state of the Q output of the flip-flop when the LED is on?

4. Draw the waveforms for questions 2 and 3.

high
LOAD
low -
high -
CLOCK
low -
high -

low -
high -

Qs
low -
high -

Qc
low -
high -

Qd
low
Shift Registers 129

5. Place a 1-Hz TTL clock from the signal generator on the CLOCK inputs instead of the
debounce switch. Now raise the LOAD input high and then low several times. What happens
and why?

Part 2
Construct the serial-to-parallel shift register shown below and answer questions 6 through 10.

vcc

6. Connect the CLOCK input to a debounce switch. Make the DATA input high and
momentarily bring the clear inputs on the 74LS76 ICs low. Use the debounce switch to
pulse the shift register four times. Explain what happens and why?

7. What is the state of the Q outputs of the flip-flops when the LED is on?
 LAB 9.1
130

8. Use the DATA input and the debounce switch to shift the binary numbers 1011 onto the
LEDs. Draw the waveforms needed to shift in the number below.

high -
DATA
low -
high -
CLOCK
low -
high -

Qa

low
high -

Qb
low
high -

low
high ----

Qd
low

9. Connect the DATA input to the Q output of the parallel-in serial-out shift register in Part 1 of
this lab, then connect the debounce switch to both sets of CLOCK inputs. Clear the serial-in
shift register of Part 2 by bringing clear inputs low momentarily. Place the binary number
1010 on the parallel inputs of the shift register of Part 1 and momentarily bring the LOAD
input high. Now pulse the debounce switch four times. What has happened and why?

10. Place a 1-Hz TTL signal on the CLOCK inputs from the signal generator. With the 1-Hz
clock clocking the shift register, describe how you would use the LOAD and parallel inputs
to send data to the shift register in Part 2.
Shift Registers

Name Class Date

Objectives After completing this lab, you should be able to:

• Use parallel-in serial-out IC shift registers.

• Understand the parallel-to-serial data conversion.

• Use typical TTL to RS-232 IC conversion ICs.

Components 2 74ALS165
Needed 1 1488

Equipment 1 5-volt power supply

Needed 1 ±12-volt power supply
1 Protoboard
1 TTL signal generator
1 Debounce switch
1 Oscilloscope
1 ASCII terminal or computer with a standard serial port

Procedure

Construct the parallel-to-serial shift register shown below and use a TTL signal generator to
supply a 9600-Hz signal to the CLOCK input. Then answer the following questions.

74ALS165: Ucc= Pin 16, Gnd = Pin 8

131
 LAB 9.2
132

1. Connect the oscilloscope to the RS-232C output of the shift register and place the ASCII
code for the capital letter A (41 Hex) on the parallel inputs of the shift register. Use the
second TTL signal generator to produce a 200-Hz signal. Connect this signal to the LOAD
input of the shift register. This should cause the shift register to repeat the serial output of the
ASCII letter A about every 5 msec, which will enable you to sync the shift register output on
the oscilloscope and observe it. Draw the waveform for the ASCII letter A in the space
provided.

+ voltage -

RS-232C ASCII letter A

- voltage -

2. Repeat the procedure in question 1 with the capital ASCII letter C.

+ voltage -

RS-232C ASCII letter C

- voltage -

3. With the circuit set up as described in question 1, use the other channel of the oscilloscope to
observe the TTL output of the shift register for the capital ASCII letter F and draw the two
waveforms below.

+ voltage -
RS-232C ASCII letter F
- voltage -
high
TTL ASCII letter F
low -

4. Connect the RS-232C Output to pin 3 of the DB-25 connector of the computer terminal for a
DTE RS-232C device or pin 2 if your terminal is DCE. If you are not sure which type of
device your terminal or computer serial port is, then measure the voltage on pins 2 and 3.
One pin will measure a solid negative voltage of-9 to -15 volts. This is the terminal data
output pin. You will use the other pin, which should measure a voltage between -5 and +5.
Check the CLOCK frequency for a precise 9600 Hz. If the CLOCK frequency is not correct,
the terminal will get incorrect data from your shift register. Now place the first letter of your
name in ASCII code on the data inputs of the shift register and use a debounce switch to
pulse the LOAD input low then high. What happens and why?

5. Using the method in question 4, place your complete name on the screen. Have the instructor
OK the operation.

Instructor's Signature:
Troubleshooting Shift Registers

Name Class Date

Objectives After completing this lab, you should be able to:

• Use Electronics Workbench to troubleshoot a typical shift register system.

• Design and construct logic to expand a typical shift register system.

Procedure
-1
Open the Electronics Workbench file LM9-1 .ewb Find the problem with the circuit and fix it
using Workbench. Use the circuit to answer the following questions.

1. What type of shift register is the circuit to the left of the schematic?

2. What type of serial transmission is being used with these two shift registers? (Asynchronous
or Synchronous)

3. Use Workbench to add four more bits to each of the shift registers so the whole system will
shift eight bits, one byte from input to output. Have the instructor OK the operation of the
circuit.

Instructor's Signature:

133
Counters
The labs contained in Chapter 10 are designed to show the operation of several types of
counters and to teach the use of a dual-trace oscilloscope to look at waveforms. When
building the counters, it is advisable to use a debounce clock or very slow TTL clock to
check the count of the counter to see if it is counting correctly before using a faster clock
and an oscilloscope.

Remember not to leave any inputs such as J or K inputs unconnected. Unconnected

flip-flop inputs do not always look like logic Is. The decode-and-clear counter in the first
lab used a decoder that has a large string of gates in it. This is done to make a large
decode spike so the student can see the spike in the Q output of the counter on the
oscilloscope.

Today, counters are seldom made from individual JK flip-flops but are incorporated
on ICs as complete counters. There are many special function ICs that have various types
of counters as part of their logic. If the student is to understand the function and use of
these more complex ICs, he or she must first understand the basic counter and its many
variations.

135
Name Class Date

Objectives After completing this lab, you should be able to:

• Construct a ripple counter.

• Construct a presettable counter.

• Understand the decode-and-clear method of designing a divide-by-TV counter.

Components 1 74LS04
Needed 2 74LS76
2 74LS00
1 74LS08
4 330-Q / -W resistors
4

4 Red LEDs

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 Dual-trace oscilloscope
1 TTL signal generator

Procedure

Part 1
Construct the circuit shown below and then answer questions 1 through 5.

74LS76: Vcc = Pin 5, Gnd = Pin 13

137
138 LAB 10.1

1. Place a 4-kHz TTL clock on the counter’s clock and then use the dual-trace oscilloscope to
observe the QA, QB, Qc, and QD output of the counter. Draw the waveforms below.
0123456789ABCDEF

njnjiJiriririRr^rLnn^

high -

low -
high -

Qb
low
high -

low -
high -

Qd
low ----

2. Change the signal feeding the CLK of flip-flop B, C, and D to Q of the previous flip-flop.
What will this do to the counter?

3. Draw the indicated waveforms for the altered circuit in question 2. Use a 1-kHz TTL clock
signal and a dual-trace oscilloscope to observe the waveforms.

0 1 23456789ABCDEF

rirLrinru-Lr^^
high -

Qa
low -
high

Qb
low -
high -

Qc
low -
high -

Qd
low
Counters 139

4. Connect all the flip-flop CLEAR inputs to the output of the decode circuit shown below.
What will this do to the counter when it runs?

23
2°
12
74LS00 74LS00 10 74LS00 74LS00
13

74LS04 74LS04 74LS04 74LS04 74LS04

A
00

1
■*< p^<]
O

- To CLEAR of ,4 Flip-Flops

74LS00: Vcc = Pin 14, Gnd = Pin 7

74LS04: \/cc= Pin 14, Gnd = Pin 7

5. Use a 1-MHz CLOCK to the counter and a dual-trace oscilloscope to observe the waveforms.
Draw the waveforms below. You should be able to see the decode spike in the QA waveform.

0 1 23456789ABCDEF

Rrir^~uni^TRririJTann_nn_
high -

Qa
low -
high -

Qb
low
high -

0c
low -
high -

Qd
low
140 LAB 10.1

Part 2
Construct the circuit shown below and then answer questions 6 through 11.

74LS00: Vcc- Pin 14, Gnd = Pin 7

74LS04: Vcc = Pin 14, Gnd = Pin 7
74LS76: Vcc = Pin 5, Gnd = Pin 13

6. What kind of counter is this circuit? How high will it count?

7. Use a debounce button as the CLOCK input so you can see the counter change states slowly.
Place the number 3 (011) on the LOAD inputs of the counter and bring the LOAD input high
and then low. What does this do and why?
Counters 141

8. Use the debounce switch to toggle the counter one count at a time. Draw the waveform
outputs below.

0 1 23456789ABCDEF

rinj^LTTRriririj^

high -

low -
high -

Qb
low -
high -

0c
low ... -

9. Add the decode 0 circuit shown below to the counter in Part 2. Connect the inputs to the Q
complement outputs. What will this do to the counter and why?

2° -L_1

21 _J-
2
} F- LOAD

22 -

74LS08: Vcc = Pin 14, Gnd = Pin 7

142 LAB 10.1

10. Place the number 4 (100) on the LOAD inputs to the counter and use a 1-kHz TTL signal for
the CLOCK input. Use a dual-trace oscilloscope to observe the waveforms and draw them
below.

01 23456789ABCDEF

^in^rinrir^iiTRnj^nr^

high ----

Qa
low -‘
high -

0s
low -
high -

low -

11. What is the frequency of the Qc output and why?

Counters
—

9. Draw the pinout for a divide-by-5 counter using a 74LS90 IC.

V
Name Class Date

Objectives After completing this lab, you should be able to:

• Use Electronics Workbench to troubleshoot counters.

• Design and construct logic circuits to produce the desired counters.

Procedure

Open Electronics Workbench file LMlO-l.ewb The file contains one fault. Find the fault and use
Workbench to fix it. Use the working circuit to answer the following questions.

1. What type of counter is it?

2. Does the counter change on the rising or falling edge of the clock?

3. Draw the waveforms for the counter.

Clock

2°

2* 1

22

23 4

4. Add two more bits to the counter using Workbench and have the instructor OK its operation.
Instructor's Signature:_

149
150 LAB 10.3

5. Use Workbench to construct a decode-and-clear ripple counter that will count from 0 to 9.
Have the instructor OK its operation.

Instructor's Signature:

6. Draw the waveforms for the counter in question 5.

Clock

2°

21

22

23
Schmitt-Trigger Inputs
and Clocks
Clocks and squarewave oscillators, also called astable multivibrators, are basic circuits
used in most digital systems. Where very precise frequency control is needed, a crystal
oscillator is used; but many digital systems can be driven by clocks such as the 555 timer.
The 555 timer has the advantage of high-current output of about 200 mA. This means that
it can drive small relays or many LEDs.

The Schmitt-trigger inverter can be used to create a relaxation oscillator because it

has the property of hysteresis. The Schmitt-trigger clock used in Lab 11.1 uses a
74HCT14 IC. This IC has a very high input impedance of about 10 MQ. The high
impedance means that the input will not affect the operation of the RC timing circuit and
the calculations can be made quite easily by using the formula for the charging of a
capacitor.

The logic drawing of the LM555 IC shown in Lab 11.2 helps the student understand
what is going on inside the 555 timer. The more advanced student can use an LM399
comparator and some basic logic gates to construct a circuit that will work just like the
LM555 timer by using the drawing in Lab 11.2.

151
Clocks and Timers m
Name Class Date

Objectives After completing this lab, you should be able to:

• Measure the hysteresis of a Schmitt trigger.

• Design a Schmitt-trigger clock.

Components 1 74HCT14
Needed 1 .01-fiF capacitor
1 1-kQ %-W resistor

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 Dual-trace oscilloscope

Procedure

Part 1
Place a 1-kHz 4-volt peak sine wave signal on the input of the 74HCT14 Schmitt-trigger inverter
and answer questions 1 and 2.

74HCT14

74HCT14: Ucc= Pin 14, Gnd = Pin 7

1. Use a dual-trace oscilloscope to display the input and output of the Schmitt-trigger inverter.
What are the upper threshold and lower threshold of the inverter?

Upper threshold voltage _

Lower threshold voltage ._

2. Draw the waveforms for the input voltage at pin 1 and the output voltage at pin 2 of the
inverter.

high-

ac voltage
low
154 LAB 11.1

high-
TTL output
low-

Part 2
Use the same 74HCT14 Schmitt-trigger inverter that you used in Part 1 of this lab to construct the
relaxation oscillator or clock shown below. Then answer questions 3 through 5.

3. Use a dual-trace oscilloscope to observe the voltage across the capacitor and the output
voltage of the buffer inverter. Draw the waveforms.

high-
Capacitor voltage
low
high-
Output voltage
low - - - -

4. Use the capacitor charge time formula shown below to calculate the frequency formula for
the clock in Part 2. Remember that the time of one cycle is the time it takes the capacitor to
charge and discharge between the upper and lower thresholds of the Schmitt-trigger inverter.
Use the space provided to show your work.

T (RC)\n 1
Vs
Where

Vc Capacitor Voltage
Vs Inverter High Output Voltage
R Resistance of the Resistor
C Value of the Capacitor
T Time to Reach the Charge Voltage
Clocks and Timers
155

Use the power supply voltage (+ 5 volts) to calculate the charge time. Use the upper
threshold voltage ot the 74HCT14 as Vs to calculate the discharge time. The charge time is
shorter than the discharge time because AV (voltage between the upper and lower threshold)
is not in the center of the supply voltage as it is in the LM555.

5. Use the formula you derived in question 4 to calculate the resistor value needed to produce a
10-kHz clock if a .01-|iF capacitor is used. Show your work below. Construct the circuit and
measure the output frequency.
V >
Name Class Date

Objectives After completing this lab, you should be able to:

• Use a 555 timer to construct a clock.

• Calculate the operating frequency of a 555 timer clock.

Components 1 LM555
Needed 2 10-k£2 k4-W resistors
1 .01-|iF capacitor
1 5-kQ X-W resistor
2 Resistors chosen by students
1 Capacitor chosen by students
1 220-Q K-W resistor
1 Red LED

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 Dual-trace oscilloscope

Procedure
Construct the 555 timer clock shown below. Then answer questions 1 through 3.

Output

157
158 LAB 11.2

1. Use the formula in the textbook to calculate the operating frequency of the 555 timer clock.

Clock frequency _

2. Use the dual-trace oscilloscope to observe the output waveform and the capacitor voltage and
to measure the output frequency. Draw these waveforms below.

Measured frequency _

high-
Output
low
high-
Capacitor voltage
low - - - -

3. Place a 5-kO resistor from pin 5 (voltage control) to ground and then observe the output and
capacitor voltage on the dual-trace oscilloscope. What happens and why?

4. Place a 200-0 resistor and a red LED from the 555 output and +5 volts. Use the frequency
formula to determine the value of capacitor and resistors needed to make the LED blink at a
rate of X Elz. Show all work below.
 i OO
LI iu

Troubleshooting Clocks

Name Class Date

Objectives After completing this lab, you should be able to:

• Use Electronics Workbench to troubleshoot a clock.

• Design and construct logic circuits to produce a desired clock.

Procedure
--(

Open Electronics Workbench file LM11-1.ewb There is one fault in the clock circuit. Find it and
use Workbench to fix it. Then use the circuit to answer the following questions.

1. What is the calculated frequency of the clock?

2. What is the measured frequency of the clock?

3. Draw the waveforms for the output of the clock and capacitor voltage.

5V

4V

3V

2V

1 V

0V

159
160 LAB 11.3

4. Place a 5-kf2 Pot across the lower 5-kQ resistor. What will happen to the output waveform if
the Pot is moved from 500 Q to 5 k£2?

5. Draw the waveforms for the output and capacitor voltage when the Pot is at 10% of its rated
value.

5V

4V

3V

2V

1 V

0V
 CHRPTER ID
mm

One-Shots
One-shots are used in digital systems to produce needed delays and proper pulse widths.
The pulse time can be from a few microseconds to hours. The labs presented here will
introduce the student to some of the theory and design of one-shots.

There are two places in Lab 12.1 in which an even-duty cycle TTL signal is used. If
the signal generator you are using does not produce an even-duty signal, then use a
flip-flop to divide the signal by 2 to produce the even-duty cycle signal. Remember to
feed the flip-flop twice the frequency.

The drawing of the 555 timer shown in Lab 12.2 helps the student understand what is
happening inside the 555. The circuit shown as the 555 timer can be built by using an
LM339 comparator and some basic logic circuits.

161
Name Class Date

Objectives After completing this lab, you should be able to:

• Use a one-shot as a debounce switch.

• Design a pulse stretcher.

• Construct a retriggerable one-shot using Schmitt-trigger inverters.

Components 1 74HCT14
Needed 1 7406
1 100-Q X-W resistor
2 .01-p,F capacitors
1 1N914 diode or equivalent
1 1-kCt -W resistor
1 10-p.F capacitor
1 74LS93
4 330-Q %-W resistor
4 Red LEDs
1 N/O push-button switch

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 Dual-trace oscilloscope
1 TTL signal generator

Procedure

Part 1
Construct the debounce switch and then answer questions 1 and 2.

Vcc ^cc

74HCT14: Vcc= Pin 14, Gnd = Pin 7

74LS93: V/cc = Pin 5, Gnd = Pin 10

163
 LAB 12.1
164

1. Remove the output of the 74HCT14 inverter from the clock input of the 74LS93 counter.
Place a wire from the push button to the clock input of the 74LS93. Press the button. What
happens and why?

2. Remove the wire from the push button and replace the wire from the 74HCT14 inverter
output to the 74LS93 clock input. Now press the button and explain what is happening
and why.

Part 2
Construct the pulse stretcher shown and answer questions 3 through 5.

20 kHz
Output
TTL Signal

74HCT14: Vcc= Pin 14, Gnd = Pin 7

7406: \/cc = Pin 14, Gnd = Pin 7

3. Place a 20-kHz even-duty cycle TTL clock on the input of the pulse stretcher. Place probe
one of a dual-trace oscilloscope on the input to the pulse stretcher and sync the oscilloscope
on this signal. Then use the dual-trace oscilloscope to observe the capacitor voltage and the
output of the 74HCT14 Schmitt-trigger with the other probe. How much does the pulse
stretcher stretch the positive part of the TTL clock?

Stretch time _

4. Draw the three waveforms in question 3.

high-
Input
low
One-Shots 165

high -
Capacitor voltage

low -
high -
Output

low -

5. At what frequency will the pulse stretcher quit putting out pulses?

No pulse frequency _

Part 3
Add the capacitor, diode, and resistor shown below to the pulse stretcher shown in Part 2 of this
lab. Then answer questions 6 and 7.

v,cc

Output

6. What will the added diode, capacitor, and resistor do to the output of the 74HCT14?

7, Place probe one of a dual-trace oscilloscope on the input to the one-shot and sync the
oscilloscope on this signal. Then use the dual-trace oscilloscope to observe the capacitor
voltage and the output of the 74HCT14 Schmitt-trigger with the other probe. Draw the three
waveforms below.

high-

Input
low
high-

Capacitor voltage
low-
high-

Output
low - - - -
Name Class Date

Objectives After completing this lab, you should be able to:

• Use a 555 timer as a one-shot.

• Use typical one-shot ICs.

Components 1 LM555
Needed 1 74123
2 l-MEl / 4-W resistors
1 .22-(iF capacitor
1 LED
2 l-k£l '4-W resistor
1 1.4-kQ ,‘4-W resistor
2 .01-|iF capacitors
1 10-k pot
1 330-Q /4-W resistor
1 N/O push button

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 Dual-trace oscilloscope
1 TTL signal generator

Procedure

Part 1
Construct the one-shot timer shown below and then answer questions 1 through 3.

Vcc

167
 LAB 12.2
168

1. Explain what happens when the button is pressed and why?

2. Calculate the pulse time of the 555 timer output. Show your work below.

3. What happens if the button is kept pressed for a time longer than the pulse width of the 555
timer?

Part 2
Construct the circuit shown below and connect an even-duty cycle 10-kHz TTL signal to the first
one-shot trigger input. Then answer questions 4 through 6.

10 k
One-Shots 169

4. Use a dual-trace oscilloscope to observe the 10-kHz TTL input and the output of the two
one-shots. Draw the waveforms. Show the maximum and minimum positions of the one-shot
pulse.

high-
10 K signal

low

high-
Output pulse
low - - - -

5. Use the oscilloscope to measure the pulse width of the output pulse.

Pulse width _

6. Redraw the circuit to produce a low-going pulse during the high part of the 10-TTL signal.
Show your circuit below and then connect it up and use the oscilloscope to see if it works
properly.
 ■
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.
■
-i '
'
.
■. -:r 1
' V'' ' - ' l ■

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D 3f
Troubleshooting One-Shots i amm m mmr

Name Class Date

Objectives After completing this lab, you should be able to:

• Use Electronics Workbench to troubleshoot a typical one-shot circuit.

• Design and construct logic circuits to produce a desired one-shot output.

Procedure
Open Electronics Workbench file LM12-l.ewb. Find and fix the circuit problem using
Workbench and then use the circuit to answer the following questions. Note: When opening the
Workbench file, use the circuit model when asked.

1. What is the time of the on pulse width of the one-shot output?

2. What type of one-shot is this?

3. What is the output pulse width if capacitor Cl is made .2 (J.F?

4. Draw the waveforms for the circuit when the resistor R] is made 15 kQ?

5V

4V

3V

171
172 LAB 12.3
Digital-to-Analog and
Analog-to-Digital
Conversions
These labs cover the basics of digital-to-analog and analog-to-digital conversion. Today
most A-to-D and D-to-A converters are built on single ICs and made to be interfaced to
computer systems. It is necessary to understand the basic methods of conversion to fully
understand and use the more complex ICs.

The more accurate the 10-k£2 resistors used for the 2R ladder, the better the
converters in these labs will work. Many students have trouble wiring the 2R ladder
correctly. This causes the converters to give incorrect results and confuses the student.
A good way to check the operation of the 2R ladder is to view the output of the ladder
on an oscilloscope while the counter driving the inputs is running at a fast frequency.
The oscilloscope should show a stair-step pattern of increasing output voltages if the 2R
ladder is wired correctly.

The small motor used in the first lab can be a small hobby motor or any other motor
as long as it does not draw more current than the transistor or power supply can handle. If
large currents are used, the TIP 120 transistor should be well heat sinked.

173
am
"**
Digital-to-Analog and
Analog-to-Digital Conversions

Name Class Date

Objectives After completing this lab, you should be able to:

• Understand a 2R ladder used in digital-to-analog conversion.

• Construct a digital-to-analog converter.

• Understand the effect of increased load on the digital-to-analog converter.

Components 1 7407
Needed 12 10-kQ X-W resistors
4 1-kQ ^-resistors
1 LM741 Op Amp
1 TIP 120 NPN transistor or equivalent
1 Small 12-volt motor
1 2-kQ K-W resistor
1 5-k£2 X-W resistor

Equipment 1 5, 12, -12 volt power supply

Needed 1 Protoboard
1 Voltmeter

Procedure

Part 1
Construct the digital-to-analog converter shown and then answer questions 1 through 4.

Output

7407: l/cc = Pin 14, Gnd = Pin 7

175
176 LAB 13.1

1. Calculate the change in voltage for one unit change in the binary number on the D-to-A
converter. Show your work below.

2. Use a voltmeter to measure the voltage for each binary number from 0 to 15 and record it in
the table below. Then place a 5-k£J load from the output of the D-to-A converter to ground
and repeat the measurements. Change the resistor to the 2 k£2 and then to 1 k£2 and repeat
the measurements.

Output Voltage Output Voltage

Input Input
Number None 5 k 2 k 1 k Number None 5 k 2 k 1 k

0000 1000
0001 1001
0010 1010
0011 1011
0100 1100
0101 1101
0110 1110
0111 mi

3. Graph the data in the table in question 2. Place all four graphs on the same sheet and label
each graph line.

Binary Input
Digital-to-Analog and Analog-to-Digital Conversions 177

4. Explain what happen to the output voltage and why.

Part 2
Add the output buffer to the digital-to-analog converter shown, then answer question 5 through 7.
Note that the D-to-A voltage was changed to +12 volts.

+12 V

5. Calculate the change in voltage for one unit change in the binary number on the D-to-A
converter. Show your work below.
178 LAB 13.1

6. Measure the change in voltage from 0001 to 0010 and from 1100 to 1101.

Voltage change for 0001 to 0010___

Voltage change for 1100 to 1101_

7. Explain how the digital-to-analog converter can drive the heavy current needed to run the
motor and not show any loss in linearity.
Digital-to-Analog and
Analog-to-Digital Conversions

Name Class Date

Objectives After completing this lab, you should be able to:

• Understand a 2R ladder used in analog-to-digital conversion.

• Construct a count-up and compare analog-to-digital converter.

• Understand the successive approximation method of analog-to-digital conversion.

Components 1 7407
Needed 1 7406
5 Red LEDs
4 220-Q X-W resistors
1 330-Q X-W resistor
12 10-kQ X-W resistors
6 l-kL2 X-W resistors
1 LM741 Op Amp
1 74LS93
1 LM339
1 74LS00
1 10-k£2 potentiometer

Equipment 1 5, 12, -12 volt power supply

Needed 1 Protoboard
1 Dual-trace oscilloscope
1 TTL signal generator

Procedure

Part 1
Construct the 4-bit count-up and compare analog-to-digital converter shown and then answer
questions 1 through 4.

179
 LAB 13.2
180

74LS00: Vcc= Pin 14, Gnd = Pin 7

74LS93: Vcc= Pin 5, Gnd = Pin 10
7407: Vcc= Pin 14, Gnd = Pin 7
7406: Vcc = Pin 14, Gnd = Pin 7

23 22 21 2°

1. Disconnect the output of the LM339 comparator (pin 2) from the pull-up resistor and the
NAND gate input. Place a probe of the oscilloscope on pin 4 of the LM339 comparator.
Place a 10-kHz TTL signal on the CLOCK input of the counter. What will be on the
oscilloscope and why?
Digital-to-Analog and Analog-to-Digital Conversions 181

2. Draw the waveform you observe on the oscilloscope. Have the instructor check the operation
of the analog-to-digital comparator.

3. How many steps are present in the waveform of the output? What is the voltage change of
the steps?

Number of steps_

Voltage change_

4. Reconnect the circuit as shown in Part 1 of this lab. Place a voltmeter on the input of the
LM339 (pin 5). Use the pot to control the input voltage to the analog-to-digital converter and
compare the binary number to the voltage shown on the voltmeter. Does the binary number
indicate a voltage higher or lower than the voltage shown on the voltmeter and why?

Part 2
Remove the 74LS93 counter and the 74LS00 NAND gate from the analog-to-digital converter and
add a 330-£2 resistor and LED to the output of the LM339 comparator. Bias the LED so it will
light when the output of the comparator goes to ground. Then answer questions 5 through 8.

5. What will be the state of the LED if the voltage of the 2R ladder is greater than the input
voltage on pin 5 of the LM339?

LED state_
182 LAB 13.2

6. Use a voltmeter and set the input voltage to 4.25 volts. Made the 23 input of the 2R ladder
logic 1 and the rest of the inputs logic 0. What is the state of the LED and why?

7. Using the successive approximation method, should the 23 input be left logic 1 or returned to
logic 0?

8. Use the successive approximation method to determine the correct binary number for the
4.25 voltage on the analog-to-digital converter.

Binary number_
Troubleshooting
Analog-to-Digital Converters

Name Class Date

Objectives After completing this lab, you should be able to:

• Use Electronics Workbench to troubleshoot a typical count-up and compare

analog-to-digital converter.

• Design and construct an analog-to-digital converter circuit in Workbench.

Procedure
Open Electronics Workbench file LM13-l.ewb. It has one fault in it. Find the fault and fix it
using Workbench. Then use the circuit to answer the following questions.

1. What is the maximum analog voltage that can be measured by the A-to-D converter?

2. What is the voltage increment for a change of one in the binary output of the A-to-D
converter?

3. What would happen if the output of the LM339 voltage comparator was disconnected from
the NAND gate?

4. Use Workbench and add components to the 4-bit A-to-D converter to make an 8-bit A-to-D
converter. Have the instructor OK the converter’s operation.

Instructor's Signature:

183
 CHRPTER 1U

Decoders, Multiplexers,
Demultiplexers, and
Displays
Decoders are one of the more widely used digital circuits in the computer field. The
decoder is the basic circuit used for selecting memory input-output ports and other
computer peripherals. The LED is used as displays and indicators in all types of digital
systems.

The seven-segment display used in Labs 14.1 and 14.2 is an FND 507 common-
anode display but any common-anode display will work well. Lab 14.2 has the student
increase the current through an LED far beyond the working limits of the LED. This is
done to show the student how the forward bias of the LED changes with current increase
and color change. The student may destroy a few LEDs in the process. A method of
determining the pinout of a standard seven-segment display is covered so the student will
be able to use it later.
■
Demultiplexers, and Displays

Name Class Date

Objectives After completing this lab, you should be able to:

• Construct a simple multiplexer.

• Construct a simple demultiplexer.

• Use a seven-segment display.

• Use a seven-segment decoder driver IC.

Components 3 74LS10
Needed 1 74LS08
2 74LS04
1 74LS47
1 FND-507 or 510 seven-segment LED (common-anode or equivalent)
7 220-Q X-W resistors

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 TTL signal generator

Procedure

Part 1
Connect +5 volts to one of the pins of the FND-507 seven-segment LED. Use a 220-0 resistor as
a probe to see if you can light any of the segments. If you cannot light any segments, move the +5
volts to the next pin and use your resistor to probe again. Once you are able to light a segment
leave the +5 volts on that pin and use the resistor probe to determine the pinout of the rest of the
segments. Then answer question 1.

1. Record the letter of the segments on the correct pin in the drawing below.

187
188 LAB 14.1

Part 2
Construct the circuit shown below and use the pinout for the seven-segment LED from Part 1 ot
this lab. Then answer questions 2 through 4.

2. Complete the table below with the display that the seven-segment LED produces for the
given binary number.

0000= 0001 = 0010= 0011 =

0100= 0101= 0110= 0111 =

1000= 1001 = 1010= 1011 =

1100= 1101= 1110= 1111 =

3. Make the test input (pin 3) low. What happens?

4. Bring the test input pin back high and make the RBI pin (pin 5) low. What happens and for
what would this be used?
Decoders, Multiplexers, Demultiplexers, and Displays 189

Part 3

Construct the multiplexer shown below and connect the output to the 2° input of the 74LS47
decoder in Part 2 of this lab. Place a logic 0 on the 2\ 22, and 23 inputs. Answer questions 5
through 7.

Select Inputs

21 2°

74LS10: V/cc = Pin 14, Gnd = Pin 7

74LS08: Vcc = Pin 14, Gnd = Pin 7
74LS04: V/cc = Pin 14, Gnd = Pin 7

5. Using the select inputs to the multiplexer, find which frequency will be placed on the output
for each of the four possible binary numbers placed on the select inputs.

00 =_ 01=_ 10=_ 11=_

6. How many and what type of NAND gates are needed to make a multiplexer with three select
inputs?
190 LAB 14.1

Part 4
Construct the demultiplexer shown below and connect the outputs to the inputs of the 74LS47
seven-segment decoder. Then connect the demultiplexer input to the multiplexer output in Part 2
of this lab. Answer question 7.

Select Inputs
2^ 2°

7. Explain the operation of the combined circuit.

Demultiplexers, and Displays

Name Class Date

Objectives After completing this lab, you should be able to:

• Understand the operation of a typical LED.

• Use a seven-segment decoder driver IC.

Components 1 Red LED

Needed 1 Yellow LED
1 Green LED
1 100-Q 1-W resistor
2 74LS47
2 FND-507 or FND-510 seven-segment LED (common-anode or equivalent)
14 220-Q. '/4-W resistors
2 74LS90

Equipment 1 5-volt power supply, variable to 20 volts

Needed 1 Protoboard
1 TTL signal generator

Procedure

Part 1
Test a red, a green, and a yellow LED by increasing the current through each in even steps. Use a
100-£2 1-W resistor as a sense resistor. Calculate the voltage drop across the 100-Q resistor for
the desired current. If you wanted to have 10 mA of current flowing, then the voltage across the
resistor would be 10 mA x 100 or 1 volt. Increase the voltage supplied to the resistor and LED
until the voltage across the resistor is at 1 volt. Then measure the voltage drop across the LED.
Record your data in the table below and then graph the data on the graph supplied. Place the
graph of each color on the same graph.

100 Q
AVr T——
LED, -o +V
T

Current
Sense

191
192 LAB 14.2

LED Forward LED Forward

Bias Voltage Bias Voltage

Current Red Yellow Green Current Red Yellow Green

5 mA 55 mA

10 mA 60 mA

15 mA 65 mA

20 mA 70 mA

25 mA 75 mA

30 mA 80 mA

35 mA 85 mA

40 mA 90 mA

45 mA 95 mA

50 mA 100 mA

LED Current
Decoders, Multiplexers, Demultiplexers, and Displays 193

Part 2
Design a two-digit BCD counter using two seven-segment LEDs, two 74LS47 decoders and two
74LS90 counters. Draw the circuit below and construct the circuit. Have your instructor check its
operation.
'
 *
i DO
L11 u
- 7U J
Troubleshooting Decoders i i.j
Name Class Date

Objectives After completing this lab, you should be able to:

• Use Electronics Workbench to troubleshoot a decoder circuit.

• Design and construct logic circuits to produce a desired decoder.

Procedure
- •
Open the Electronics Workbench file LM14-l.ewb. Find the fault in the circuit and use
Workbench to fix it. Use the running circuit to answer the following questions.

1. How many counts or addresses is each low-going output of the decoder?

2. Which pin of the 74LS138 would go low if the address E065 Hex was placed on the inputs of
the decoder?

3. Why are the inverters open-collectors?

4. Use Workbench to add components needed to expand the decoder to decode the same
address but with blocks of 4 bytes each. Have the instructor OK the circuit operation.

Instructor's Signature:

195
V

•
 CHRPTER
! mmmmssm m

Tri-State Gates and

Interfacing to High
Current
To control the outside world with a 5-volt logic signal is the desire of the digital designer.
Lab 15.1 has the student interface a 5-volt TTL signal to a 12-volt relay, which then
switches on and off 110 volts ac. The relay is a good method of isolating the two circuits.

Tri-state gates are widely used in the computer to control the flow of data on and off a
bus. Lab 15.2 uses some LEDs and counters connected to .a 4-bit bus to show how this
can be done.

The two frequencies needed in Lab 15.2 (X Hz and 5 Hz) can be obtained by using a
74LS90 to divide the 5-Hz signal of a TTL signal generator by 10.

The instructor should check the wiring of the 110 volt ac part of the lab to make sure
that it is correct before the student plugs the line cord into the outlet. The instructor may
ask the student to construct the lightbulb and relay circuit in an electrical box for safety.

197
 . '

...

'
Tri-State Gates and Interfacing to
High Current

Name Class Date

Objectives After completing this lab, you should be able to:

• Design a high-current interface to TTL logic using a transistor.

• Design a high-current interface using a 75492 IC.

Components 1 TIP 120 transistor

Needed 1 7406
1 12-volt relay
1 Line cord
1 110-volt ac lightbulb and socket
1 Resistor of student’s choice
1 75492

Equipment 1 5, 12 volt power supply

Needed 1 Protoboard

Procedure

Part 1
Construct the high-current interface to the 110-volt ac lamp shown. Calculate the value of the
resistor needed if the transistor’s HFE = 1000. Show your work on the next page. Have your
instructor check your work before you add the 100 volt ac.

+ 12 V

110 Volts
ac

199
 LAB 1 5.1
200
--
—
Tri-State Gates and Interfacing to High Current 201

Part 2
Design a high-current interface to the 12-volt relay in Part 1 of this lab using a 75492 IC. Draw
the logic diagram below and then construct the circuit. Have your instructor check the circuit
before you add the 110 volt ac.
 I oo
L11 u

Tri-State Gates and Interfacing to

High Current

Name_ Class_ Date

Objectives After completing this lab, you should be able to:

• Understand the operation of tri-state gates.

• Understand the use of a bus to pass data.

Components 1 74LS245
Needed 8 Red LEDs
8 330-Q y4-W resistors
1 7490
1 7493
1 74240

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 TTL signal generator

203
204 LAB 15.2

Procedure

Part 1
Construct the circuit shown below and then use it to answer questions 1 through 6.

74LS245: Vcc = Pin 20, Gnd = Pin 10

74LS240: Vcc = Pin 20, Gnd = Pin 10
74LS90: Vcc= Pin 5, Gnd = Pin 10
74LS93: Vcc = Pin 5, Gnd = Pin 10

1. What would be the logic values for the labeled inputs to make group A count at / Hz and
group B count at 5 Hz?

Input A_ Input B_ Input C_ Input D_

2. What would be the logic values for the labeled inputs to make group A and group B count
fast?

Input A_ Input B_ Input C_ Input D_

3. What would be the logic values for the labeled inputs to make group A and group B count
slow?

Input A_ Input B_ Input C_ Input D_

4. What would be the logic values for the labeled inputs to make group A count and group B
not count?

InPut A_ Input B_ Input C_ Input D_

Tri-State Gates and Interfacing to High Current 205

5. What would be the logic values for the labeled inputs to make group A and group B not
count?

Input A_ Input B_ Input C_ Input D_

6. What would be the logic values for the labeled input to make group A not count and group B
count?

Input A_ Input B_ Input C_ Input D_

i
Troubleshooting High-Current Interfaces

Name Class Date

Objectives After completing this lab, you should be able to:

• Use Electronics Workbench to troubleshoot a high-current interface.

• Design and construct a high-current interface.

Procedure
Open Electronics Workbench file LM15-l.ewb. Find and fix the fault using Workbench, then use
the circuit to answer the following questions.

1. What could have happened to Q1 if the fault had been left in the circuit and why?

2. How much wattage did Q1 dissipate when the fault was in the circuit?

3. Design and construct a similar high-current interface that will drive two 12-volt relays. One
relay will turn on and off a 110-volt ac light and the other will control a 24-volt light. Have
the instructor OK the circuit’s operation.

Instructor's Signature:

207
mmmmm m mmmmm mmmm msmm m m mmmmmm

Memories and
Introduction to
Microcomputers
The circuit in Lab 16.1 uses a pair of 2114 RAM ICs to convert a standard hex digit
expressed in four bits of binary to the 8-bit binary code necessary to display the hex digit
on a seven-segment LED. Code conversion is quite often done with ROM instead of
RAM. A typical example of this is the character generator ROM used in a CRT controller
circuit. This ROM generates the correct code to be shifted out across the computer
monitor screen from the ASCII code input to the address pins of the ROM.

Lab 16.2 uses a Z80 CPU to produce the basic signals used to control the memory of
the computer system. This is done by forcing the CPU to enter the halt state. While in this
state, the CPU will continue to produce the control signal to keep the dynamic RAM
going. This is a good time for the student to see the waveforms on the oscilloscope
because they are repeating and can be synced on the oscilloscope. This is quite hard when
the CPU is running a program because the signals are continually changing.

209
Memories and Introduction to
Microcomputers

Name_ Class_ Date

Objectives After completing this lab, you should be able to:

• Understand the use of static RAM.

• Understand the use of a memory as a decoder.

Components 2 2114 RAM ICs

Needed 6 l-k£2 K-W resistors
8 220-Q. X-W resistors
14 10-kQ X-W resistors
2 Dip switches
1 74LS245
1 FND-507 seven-segment LED or equivalent

Equipment 1 5-volt power supply

Needed 1 Protoboard
212 LAB 16.1

Procedure
Construct the circuit below and open all the dip switches before applying power. Then answer the
questions.

74LS245: Vcc = Pin 20, Gnd = Pin 10

2114: Vcc= Pin 18, Gnd = Pin 9

1. With all the dip switches open the 2114 RAM outputs are in HiZ state and the seven-segment
LED will be off. Set the four address switches to a logic 0 value. This will select the 0
memory location inside the RAM. Now use the data switches to display a 0 on the seven-
segment LED. Remember that a 0 on a data bit will light a segment. You now have the
correct data on the data bus to produce a 0 on the display LED and the address 0 selected on
the RAM. Store the data on the data bus in the RAM by bringing the WR (write) line low
and then bringing the CS (chip select) low and then high.
Memories and Introduction to Microcomputers 213

This will store the information in the RAM to produce a 0 on the display when the 0
memory location is addressed on the RAM address inputs. To read the memory in the RAM,
open all the data switches so the RAM outputs can drive the data bus. With the same 0 on all
address lines and 1 on the WR line, bring the CS low. The seven-segment display will
produce a 0. Any pattern can be stored in the RAM memory and the memory cell is chosen
by the address on the address inputs. Calculate the memory value for each of the 16 digits
from 0 to F and record them in the table below.

Address Number Data Display

23 22 21 2° d7 d6 d5 d4 d2 Digit
d3 D, D0
0 0 0 0 0

0 0 0 1 1

0 0 1 0 2

0 0 1 1 3

0 1 0 0 4

0 1 0 1 5

0 1 0 0 6

0 1 1 1 7

1 0 0 0 8

1 0 0 1 9

1 0 1 0 A

1 0 1 1 B

1 1 0 0 C

1 1 0 1 D

1 1 1 0 E

1 1 1 1 F

2. Use the method described in question 1 to load the RAM with all 16 codes for the hex
display. Have your instructor check the operation.

3. Create a second set of codes with the decimal point of the display on. Bring the A4 address
line high and place these codes in the RAM also.

4. How many memory locations could the RAM hold?

Number of memory locations_

.
Memories and Introduction to
Microcomputers

Name_ Class Date

Objectives After completing this lab, you should be able to:

• Understand the use of control signals.

• Understand the basic operation of a microprocessor.

Components 1 Z80 A CPU

Needed 1 7407
1 220-Q X-W resistor
1 74LS245
1 Red LED
1 N/O push button
2 10-kl2 X-W resistors

Equipment 1 5-volt power supply

Needed 1 Protoboard
1 TTL signal generator
1 Dual-trace oscilloscope

215
216 LAB 16.2

Procedure
The circuit shown below will cause the Z80 CPU to run the HALT instruction when it is reset by
pressing the RESET button. This will happen because the binary number 76 Hex is hard-wired to
the data bus and will be read by the CPU as its first instruction after the RESET is brought back
high. When the Z80 is in the HALT state it continues to do Ml machine cycles one after the other.
This is to prevent dynamic memory from becoming senile because of lack of memory refresh.
This continuous Ml machine cycle can be observed by using a dual-trace oscilloscope to sync
one probe on MREQ and using the other probe to observe the other signals. Draw the waveforms
asked for at the end of this lab.

-MAr- -o V,cc
220 Q LED

A 7407 27

19
Ml

MREQ
Aq
Aj
a2
30

31

32

20 33
IORQ A3
22 34
WR a4
21. 35
RD A5
36
A6
28 37
REFSH A7
38
As
18. HALT 39
Ag
40
A jo
24
WAIT
1
Ajj
2
A12
16 3
10 k INT A13
17 4
—Wv- NMI A14
5
A 15 74LS245
26
' cc RESET
14 2 18
D0 Aj *1
25 15 3 17
BUSRQ D, a2 b2
23, 12 4 16
BUSAK d2 A3 76
8 5
b3 15 HEX
d3 A4 b4
7 6 14
> CLK d4 A5 b5
9 7 13
d5 ^6 b6
10 8 12
d6 A~i Bn
13 9 11
Z80 d7 ^8 Be
6
19. 'Ac
G
2 MHz DIR
10 k
Vcc °—M/V

Z80: Vcc= Pin 11, Gnd = Pin 29

7407: V/cc= Pin 14, Gnd = Pin 7

high
CLOCK
low -
high -
MREQ

low
Memories and Introduction to Microcomputers
217

high -
Ml

low -
high -
RD

low -
high -
RFSH

low -
'
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