ACE

Engineering College
An Autonomous Institution
(NBA ACCREDITED B.TECH COURSES: EEE, ECE, MECH & CSE, ACCORDED NAAC ‘A’GRADE)
Ghatkesar, Hyderabad- 501 301

DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

COMPUTER ORGANIZATION AND ARCHITECTURE (CS304PC) – 20 Batch

UNIT – 2

1. With neat diagram explain the functioning of Micro Program

sequencer for a control memory.
Answer:
 The basic components of a microprogrammed control unit are the control memory and the circuits
that select the next address.
 The address selection part is called a microprogram sequencer.
 Next-address generator (sequencer): Determines the next address of microinstruction within
control memory.
 A microprogram sequencer can be constructed with digital functions to suit a particular application.

Routine

 Microinstructions are stored in control memory in groups, with each group specifying a
routine.

 Each computer instruction has its own microprogram routine to generate microoperations that
execute the instruction.

 The hardware that controls the address sequencing of the control memory must be capable of
sequencing the microinstructions within a routine and be able to branch from one routine to
another.

Address Sequencing in a microprogram control unit

− An initial address is loaded into the CAR when power is turned on in the computer.

− This address is the address of the first microinstruction that activates the instruction fetch routine.

− At the end of the fetch routine, the instruction is in the Instruction Register of the computer.

− The control memory next must go through the routine that determines the effective address of the
operand.

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 − When the effective address computation routine is completed, the address of the operand is
available in the memory address register.

Address Sequencing Capabilities required in a control memory are:

1. Incrementing of the control address register.

2. Unconditional branch or conditional branch, depending on status bit conditions.

3. A mapping process from the bits of the instruction to an address for control memory.

4. A facility for subroutine call and return.

The below figure shows microprogram sequencer

Mapping of Instruction

 Each computer instruction has its own microprogram routine stored in a given location of the control
memory.

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Mapping process

 The transformation from the instruction code bits to an address in control memory where the routine
is located is referred to as a mapping process.

Design of input logic

 The input logic circuit in Fig. has three inputs, I0, I1, and T, and three outputs, S0, S1, and L .

 Variables S0 and S1, select one of the source addresses for CAR . Variable L enables the load input
in SBR .

 The binary values of the two selection variables determine the path in the multiplexer.

2. Explain Instruction formats based on address fields with examples?

Answer:

 A computer will have a variety of instruction code formats.

 It is the function of the control unit within the CPU to interpret each instruction code and provide the
necessary control functions needed to process the instruction.

 Computers may have instructions of several different lengths containing varying number of
addresses.

 The number of address fields in the instruction format of a computer depends on the internal
organization of its registers.

The three most common CPU organizations:

1. Single accumulator organization:

− All operations are performed with an implied accumulator (AC) register.

− The instruction format in this type of computer uses one address field.

− Eg: ADD X /* AC  AC + M[X] */ (One Address)

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 2. General register organization:

− Computers contains multiple processor registers.

− The instruction format in this type of computer needs three address fields or two address
fields (register / memory) .

Eg: ADD R1, R2, R3 /* R1  R2 + R3 */ (Three Addresses)

ADD R1, R2 /* R1  R1 + R2 */ (Two Addresses)
MOV R1, R2 /* R1  R2 */ (Two Addresses)
ADD R1, X /* R1  R1 + M[X] */ (Two Addresses)
3. Stack organization:

− Operands are implied to be in the stack.

− Operation-type instructions do not need an address field or zero address fields.

− PUSH and POP instructions, need an address field to specify the operand.

Eg: PUSH X /* TOS  M[X] */

ADD (two operands on stack added, Zero Address)

 To illustrate the influence of the number of addresses on computer programs, we will evaluate the
arithmetic statement

X = (A + B) ∗ (C + D)

Using zero, one, two, or three address instruction.

 We will use the symbols

− 4 arithmetic operations : ADD, SUB, MUL, DIV

− 1 transfer operation to and from memory and general register : MOV

− 2 transfer operation to and from memory and AC register : STORE, LOAD

− Operand memory addresses : A, B, C, D

− Result memory address : X

Example: Evaluate (A+B)  (C+D)

i. Three-Address Instructions

1. ADD R1, A, B ; R1 ← M[A] + M[B]

2. ADD R2, C, D ; R2 ← M[C] + M[D]

3. MUL X, R1, R2 ; M[X] ← R1  R2

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  Each address fields specify either a processor register or a memory operand

 Short program

 Require too many bits to specify 3 address

ii. Two-Address Instructions

1. MOV R1, A ; R1 ← M[A]

2. ADD R1, B ; R1 ← R1 + M[B]

3. MOV R2, C ; R2 ← M[C]

4. ADD R2, D ; R2 ← R2 + M[D]

5. MUL R1, R2 ; R1 ← R1  R2

6. MOV X, R1 ; M[X] ← R1

 The most common in commercial computers.

 Each address fields specify either a processor register or a memory operand.

iii. One-Address Instructions

1. LOAD A ; AC ← M[A]

2. ADD B ; AC ← AC + M[B]

3. STORE T ; M[T] ← AC

4. LOAD C ; AC ← M[C]

5. ADD D ; AC ← AC + M[D]

6. MUL T ; AC ← AC  M[T]

7. STORE X ; M[X] ← AC

 All operations are done between the implied AC register and memory operand, result is stored in AC.

iv. Zero-Address Instructions

1. PUSH A ; TOS ← A
2. PUSH B ; TOS ← B
3. ADD ; TOS ← (A + B)
4. PUSH C ; TOS ← C
5. PUSH D ; TOS ← D
6. ADD ; TOS ← (C + D)

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 7. MUL ; TOS ← (C+D)(A+B)
8. POP X ; M[X] ← TOS
 Stack-organized computer does not use an address field for the instructions ADD, and MUL
 PUSH, and POP instructions need an address field to specify the operand
 Zero-Address : absence of address ( ADD, MUL )

3. Explain various addressing modes with an example.

Answer:
 The way the operands are chosen during program execution is dependent on the addressing mode of
the instruction.
 The addressing mode specifies a rule for interpreting or modifying the address field of the
instruction before the operand is actually referenced.

Types of Addressing Modes

1. Implied Mode
2. Immediate Mode
3. Register Mode
4. Register Indirect Mode
5. Auto increment or Auto decrement Mode
6. Direct Address Mode
7. Indirect Address Mode
8. Relative Address Mode
9. Indexed Addressing Mode
10. Base Register Addressing Mode

1. Implied Mode
− Operands are specified implicitly in definition of the instruction
− Effective Address(EA) = Implied

Examples
• AC is implied in “ADD M[AR]” in “One-Address” instruction.
• TOS is implied in “ADD” in “Zero-Address” instruction.

 All register reference instructions that use an accumulator

 Zero-address instructions.

2. Immediate Mode
 The operand is specified in the instruction itself.
 Operand field contains the actual operand not the address
 Useful for initializing registers to a constant value
 Effective Address(EA) = Operand

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 Example :
• The use of a constant in “MOV R1, 5”, i.e. R1 ← 5
• LD #NBR

3. Register Mode
 the operands are in registers that reside within the CPU.

 EA = Register
 Register is selected from a register field in the instruction.
− k-bit register field can specify any one of 2k registers.
− Example : LD R1 AC  R1

4. Register Indirect Mode:

 The instruction specifies a register in the CPU whose contents give the address of the operand in
memory.
 The selected register contains the address of the operand rather than the operand itself.
 EA =(Register)
Example : LD (R1) AC  M [R1]

5. Auto-increment or Auto-decrement Mode:

 Same as the Register Indirect, but;
 When the address in the register is used to access memory, the value in the register is incremented or
decremented by 1 (after or before the execution of the instruction)
 EA = (Register) +/- 1
 Advantage: To refer table of data stored in Memory.

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6. Direct Address Mode:
 The operand resides in memory and its address is given directly by the address field of the
instruction.
 In a branch-type instruction the address field specifies the actual branch address.
 EA = Address Part of the instruction

7. Indirect Address Mode:

 The address field of the instruction gives the address where the effective address is stored in
memory
 EA = (Address Part of the instruction)

8. Relative Address Mode:

 The content of the program counter is added to the address part of the instruction in order to obtain
the effective address.
 Relative addressing is often used with branch-type instructions when the branch address is in the area
surrounding the instruction word itself.
 EA = PC + Relative Address

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9. Indexed Addressing Mode:
 In this mode the content of an index register is added to the address part of the instruction to obtain
the effective address.
 The index register is a special CPU register that contains an index value.
 The address field of the instruction defines the beginning address of a data array in memory. Each
operand in the array is stored in memory relative to the beginning address. The distance between the
beginning address and the address of the operand is the index value stores in the index register.
 EA = XR + Relative Address

10. Base Register Addressing Mode:

 The content of a base register is added to the address part of the instruction to obtain the effective
address.
 EA = BR + Relative Address

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4. How LIFO list is implemented in computer? What are the
applications of LIFO.
or
Demonstrate Stack Organization and its applications with example?
Answer:

 A useful feature that is included in the CPU of most computers is a stack or last-in, first-out (LIFO)
list.
 A stack is a storage device that stores information in such a manner that the item stored last is the
first item retrieved.

Stack Pointer
 The stack in digital computers is essentially a memory unit with an address register that can count
only (after an initial value is loaded into it).
 The register that holds the address for the stack is called a stack pointer (SP) because its value
always points at the top item in the stack.

Stack Operations

The two operations of a stack are the insertion and deletion of items.
 Insertion and Deletion of Items
− PUSH : Push-Down = Insertion : pushing a new item on top.
− POP : Pop-Up = Deletion : removing one item

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Stack can be organized in two ways
1) Register Stack (Stack Depth)
− a finite number of registers(stand alone)
2) Memory Stack (Stack Depth)
− a portion of a large memory

Register Stack
 A stack can organized as a collection of a finite number of registers.
 Below Figure shows the organization of a 64-word register stack.

 The stack pointer register SP contains a binary number whose value is equal to the address of the
word that is currently on top of the stack.
 Four items are placed in the stack: A, B, C and D, in that order. Item D is on top of the stack so that
the content of SP is now 4.
 To remove the top item, the stack is popped by reading the memory word at address 4 and
decrementing the content of SP .
 To insert a new item, the stack is pushed by incrementing SP and writing a word in the next-higher
location in the stack.

Push Operation
 Initially, SP is cleared to 0, EMTY is set to 1, and FULL is cleared to 0, so that SP points to
the word at address 0 and the stack is marked empty and not full.

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  If the stack is not full (if FULL = 0), a new item is inserted with a push operation.
 The push operation is implemented with the following sequence of microoperations:

SP ← SP + 1 Increment stack pointer

M[SP] ← DR Write item on top of the stack
If (SP = = 0) then (FULL ← 1) Check if stack is full
EMPTY ← 0 Mark the stack not empty

Pop Operation
 A new item is deleted from the stack if the stack is not empty (if EMTY = 0).
 The pop operation consists of the following sequence of microoperations:

DR ← M[SP] Read item from the top of stack

SP ← SP - 1 Decrement stack pointer
If (SP = = 0) then (EMPTY ← 1) Check if stack is empty
FULL ← 0 Mark the stack not full

Memory Stack

 A stack can be placed in a portion of a large memory as a collection of a finite number of memory
words.
 Below figure shows a portion of computer memory partitioned into three segments: program, data,
and stack.

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  The program counter PC points at the address of the next instruction in the program.
 The address register AR points at an array of data.
 The stack pointer SP points at the top of the stack.
 The three registers are connected to a common address bus, and either one can provide an address for
memory.
 PC is used during the fetch phase to read an instruction.
 AR is used during the execute phase to read an operand.
 SP is used to push or pop items into or from the stack.
 As shown in Figure, the initial value of SP is 4001 and the stack grows with decreasing addresses.
Thus the first item stored in the stack is at address 4000 , the second item is stored at address 3999,
and the last address that can be used for the stack Is 3000.

Push Operation
A new item is inserted with the push operation as follows:
SP ← SP - 1
M[SP] ← DR

Pop Operation
A new item is deleted with a pop operation as follows:
DR ← M[SP]
SP ← SP + 1
Stack Limits
 Check for stack overflow(full) /underflow(empty)
− Checked by using two registers
• Upper Limit and Lower Limit Register
− After PUSH Operation
• SP compared with the upper limit register
− After POP Operation
• SP compared with the lower limit register

Applications of Stack

 A stack organization is used for evaluating arithmetic expressions.

 The common mathematical method of writing arithmetic expressions are:
1. Infix Notation A+B

2. Prefix or Polish Notation +AB

3. Postfix or Reverse Polish Notation (RPN) AB+

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Conversion form Infix Notation to Reverse Polish Notation
1. The conversion from infix notation to reverse Polish notation must take into consideration the
operational hierarchy adopted for infix notation.

2. This hierarchy dictates that first perform all arithmetic inside inner parentheses, then inside outer
parentheses, and do multiplication and division operations before addition and subtraction operations.

Evaluation of RPN Arithmetic Expressions

Stack Operation
1. Scan the RPN expression from left to right
2. Push operands on to the stack
3. When operator comes, pop top two operands from stack and perform operation, store
the result back at top of the stack
4. Repeat step 2 & 3 until all operands and operators scanned
Example:
A*B+C*D  AB * CD * +

(3*4)+(5*6)  34*56*+

PUSH 3
PUSH 4
MULT
PUSH 5
PUSH 6
MULT
ADD

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5. Write short notes on the following.
i. Differentiate between hardwired Control Unit and Micro
programmed Control Unit.
ii. Define the following:
(a) microoperation
(b) microinstruction
(c) microprogram
(d) microcode
Answer:
i. Differentiate between hardwired Control Unit and Micro
programmed Control Unit.

 The control unit is responsible for initiating the sequence of control signals and timing signals to
generate microoperations that comprise instructions.

Two major types of Control Unit

1. Hardwired Control :
 When the control signals are generated by hardware, the control unit is hardwired control unit.
 The control logic is implemented with gates, Flip-Flops, decoders, and other digital circuits.
 Fast operation.
 Wiring change (if the design has to be modified) is difficult.
 Example CPUs: Intel 8085, Motorola 6802, Zilog 80, and any RISC (Reduced Instruction Set
Computer) CPUs.

2. Microprogrammed Control :

 The control information is stored in a control memory, and the control memory is programmed to
initiate the required sequence of microoperations for an instruction.
 Any required change can be done by updating the microprogram in control memory.
 Slow operation
 Example CPUs: Intel 8080, Motorola 68000, Zilog 80, and any CISC(Complex Instruction Set
Computer) CPUs.

ii. Define the following:

(a) microoperation
The elementary operation performed on the data stored in the registers is
called microoperation.
(b) microinstruction
 The control function that specifies a microoperation is a Binary Variable or
Control Variable.

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  The control variables at any given time can be represented by a string of l's
and 0's called a control word.
 Each word (control word) in control memory contains within it a
microinstruction.
 The microinstruction specifies one or more microoperations for the system.

(c) microprogram
A sequence of microinstructions constitutes a microprogram.

(d) microcode
• A symbolic microprogram can be translated into its binary equivalent by a microprogram
assembler is called microcode

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