Computer Architecture

EE-371/CS-330

Hasan Baig
[email protected]

Department of Electrical Engineering

Dhanani School of Science and Engineering
Habib University
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Learning Outcomes

After completing this course, you will:

 be familiar with the language of a computer

 know how the programs are translated into machine language

 know how the arithmetic/logic and data transfer operations are performed

 be familiar with the hardware of a processor

 be aware of how to improve the performance using pipelining concept

 be able to design and implement processor on chip

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Text Book

The lecture slides of this course is prepared with a help of the official lecture slides of
the book mentioned above.
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Assessments

Components Marks
Quizzes 15%
Assignments/Presentations 15%
Midterm 30%
Final 40%

View grades
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Office Hours

• Thursday 2.00 - 3.00 PM

• Friday 2.30 - 3.30 PM
• Location: Faculty Pod: 203, N218
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Background Moore’s Law
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Introduction Below Your Program

• Application software
• Written in high-level language
• System software
• Compiler: translates HLL code to
machine code
• Operating System: service code
• Handling input/output
• Managing memory and storage
• Scheduling tasks & sharing resources
• Hardware
• Processor, memory, I/O controllers
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Introduction Levels of Program Code

• High-level language
• Level of abstraction closer to
problem domain
• Provides for productivity and
portability
• Assembly language
• Textual representation of
instructions
• Hardware representation
• Binary digits (bits)
• Encoded instructions and data
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Introduction Components of a Computer

• Same components for

all kinds of computer
• Desktop, server,
embedded
• Input/output includes
• User-interface devices
• Display, keyboard, mouse
• Storage devices
• Hard disk, CD/DVD, flash
• Network adapters
• For communicating with other
computers
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Introduction Touch Screen
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Introduction Opening the Box

Capacitive multitouch LCD screen

3.8 V, 25 Watt-hour battery

Computer board
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Introduction Opening the Box

• Datapath: performs operations on data

• Control: sequences datapath,
memory, ...
• Cache memory
• Small fast SRAM memory for immediate
access to data
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Introduction Semiconductor Technology

• Silicon: semiconductor
• Add materials to transform properties:
• Conductors
• Insulators
• Switch
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Introduction IC Manufacturing Process
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Introduction Intel Core i7 Wafer

• 300mm wafer, 280 chips, 32nm technology

• Each chip is 20.7 x 10.5 mm
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Introduction Defining Performance

• Which airplane has the best performance?

Boeing 777 Boeing 777

Boeing 747 Boeing 747

BAC/Sud BAC/Sud
Concorde Concorde
Douglas Douglas DC-
DC-8-50 8-50

0 100 200 300 400 500 0 2000 4000 6000 8000 10000

Passenger Capacity Cruising Range (miles)

Boeing 777 Boeing 777

Boeing 747 Boeing 747

BAC/Sud BAC/Sud
Concorde Concorde
Douglas Douglas DC-
DC-8-50 8-50

0 500 1000 1500 0 100000 200000 300000 400000

Cruising Speed (mph) Passengers x mph

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Introduction Response Time and Throughput

• Response time
• How long it takes to do a task
• Throughput
• Total work done per unit time
• e.g., tasks/transactions/… per hour
• How are response time and throughput affected by
• Replacing the processor with a faster version?
• Adding more processors?
• We’ll focus on response time for now…
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Introduction Relative Performance

• Define Performance = 1/Execution Time

• “X is n time faster than Y”
Performanc e X Performanc e Y
 Execution time Y Execution time X  n

 Example: time taken to run a program

 10s on A, 15s on B
 Execution TimeB / Execution TimeA
= 15s / 10s = 1.5
 So A is 1.5 times faster than B
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Introduction Measuring Execution Time

• Elapsed time
• Total response time, including all aspects
• Processing, I/O, OS overhead, idle time
• Determines system performance
• CPU time
• Time spent processing a given job
• Comprises user CPU time and system CPU time
• Different programs are affected differently by CPU and
system performance
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Introduction CPU Clocking

• Operation of digital hardware governed by a constant-

rate clock
Clock period

Clock (cycles)

Data transfer
and computation
Update state

 Clock period: duration of a clock cycle

 e.g., 250ps = 0.25ns = 250×10–12s
 Clock frequency (rate): cycles per second
 e.g., 4.0GHz = 4000MHz = 4.0×109Hz
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Introduction CPU Time

CPU Time  CPU Clock Cycles  Clock Cycle Time

CPU Clock Cycles

Clock Rate
• Performance improved by
• Reducing number of clock cycles
• Increasing clock rate
• Hardware designer must often trade off clock rate against
cycle count
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Introduction CPU Time Example

• Our favorite program runs in 10 seconds on computer A, which has a 2 GHz

clock. We are trying to help a computer designer build a computer, B, which
will run this program in 6 seconds. The designer has determined that a
substantial increase in the clock rate is possible, but this increase will affect
the rest of the CPU design, causing computer B to require 1.2 times as many
clock cycles as computer A for this program. What clock rate should we tell
the designer to target?

• Computer A: 2GHz clock, 10s CPU time

• Designing Computer B
• Aim for 6s CPU time
• Can do faster clock, but causes 1.2 × clock cycles of A
• How fast must Computer B clock be?
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Introduction CPU Time Example

• Computer A: 2GHz clock, 10s CPU time

• Designing Computer B
• Aim for 6s CPU time
• Can do faster clock, but causes 1.2 × clock cycles of A
• How fast must Computer B clock be?
Clock CyclesB 1.2  Clock CyclesA
Clock RateB  
CPU Time B 6s
Clock CyclesA  CPU Time A  Clock Rate A
 10s  2GHz  20  10 9
1.2  20  10 9 24  10 9
Clock RateB    4GHz
6s 6s
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Introduction Instruction Count and CPI

Clock Cycles  Instructio n Count  Cycles per Instructio n

CPU Time  Instructio n Count  CPI  Clock Cycle Time
Instructio n Count  CPI

Clock Rate
• Instruction Count for a program
• Determined by program, ISA and compiler
• Average cycles per instruction
• Determined by CPU hardware
• If different instructions have different CPI
• Average CPI affected by instruction mix
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Introduction CPI Example

• Computer A: Cycle Time = 250ps, CPI = 2.0

• Computer B: Cycle Time = 500ps, CPI = 1.2
• Same ISA
• Which is faster, and by how much?
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Performance Summary

Instructions Clock cycles Seconds

CPU Time   
Program Instruction Clock cycle

• Performance depends on
• Algorithm: affects IC, possibly CPI
• Programming language: affects IC, CPI
• Compiler: affects IC, CPI
• Instruction set architecture: affects IC, CPI, Tc
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Background Prerequisites Review

If the frequency of the computer is 5 GHz, how long is the clock cycle?

Clock period

Clock (cycles)

Answer:
1
Frequency =  5GHz
clock cycle
1 1
 clock cycle    0.0000002 s
5GHz 1
5G
s
 0.2  106 s  0.2us
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Background Prerequisites Review

Decimal Binary Number If you want to multiply a binary

Number number by 2, what kind of shift
0 0000 do you need?
1 0001 Answer:
2 0010 Shift left by 1
3 0011 0001 => 0010
4 0100 0011 => 1100
5 0101 If you want to divide a binary
6 0110 number by 2, what kind of shift
7 0111 do you need?
8 1000 Answer:
9 1001 Shift right by 1
10 1010 1010 => 0101
…….. …….. 1101 => 0110
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Background Prerequisites Review

 Note: Signed binary number is in two’s complement format

Binary Number Unsigned decimal Signed decimal

value value
1001 9 -7
0011 3 3
1111 15 -1
1010 10 -6
0101 5 5

 How can we get the binary representation of -12 for example?

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Background Prerequisites Review

• 1 Byte = 8 bits ; 1 Word = 4 bytes = 32 bits

• Since 8-bit bytes are so useful, most architectures address individual
bytes in memory.
• Thus, the memory address of a word must be a multiple of 4.

Byte Address Word Address

1 Byte 0x 000 0x000
0x 001
1 Word 0x 010
0x 011
0x 100 0x100
0x 101
0x 110
0X111
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Background Prerequisites Review

Why were 3 bits enough to address a memory with 8 bytes?

Answer:
8 Bytes = 23 Bytes => only 3 bits are enough.

Byte Address Word Address

1 Byte 0x 000 0x000
0x 001
1 Word 0x 010
0x 011
0x 100 0x100
0x 101
0x 110
0X111
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Background Prerequisites Review

If I have a memory of 1 Mega bytes, how many bits do I need to address this
memory?

Answer:
1 k Bytes = 1024 Bytes = 210 Bytes
1 M Bytes = 1024*1024 Bytes = 220 Bytes
=>
We need 20 bits address to address this memory.
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Background Prerequisites Review

Multiplexer Decoder

S1 S0 Y A1 A0 Y0 Y1 Y2 Y3
0 0 I0 0 0 0 0 0 1
0 1 I1 0 1 0 0 1 0
1 0 I2 1 0 0 1 0 0
1 1 I3 1 1 1 0 0 0
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Background Prerequisites Review

D-FF T-FF