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Computer Architecture 2

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Soban Janjua
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14 views3 pages

Computer Architecture 2

Uploaded by

Soban Janjua
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Computer Architecture

Assignment No #02
Submitted By:
 Muhammad Soban Rasheed
Roll Number:
 FA20-BCS-020
Submitted To:
 Sir Bicktash Ali
Section:
 BCS ‘4A’
Explain the following
1. Instruction level parallelism:
Instruction-level parallelism (ILP) could be a live of what
number operations during a computer program are often performed in-parallel at constant time.
One of the goals of compilers and processors designers is to use the maximum amount ILP
as attainable. Standard programs area unit written execute directions in sequence; one once the
opposite, within the order as written by programmers ILP permits the compiler and also
the processor to overlap the execution of multiple directions or perhaps to alter the order within
which directions area unit dead.
Instruction level parallelism Technologies:
Instruction level parallelism TECHNIQUES Micro-architectural techniques that use ILP include:
 Instruction pipelining
 Superscalar
 Out-of-order execution
 Register renaming
 Speculative execution
 Branch prediction

2. Superscalar processors:
A Superscalar processors executes multiple independent instructions in
parallel and per clock cycle for single sequential program . They are pipelined as well.
 Determines the dependencies between the nearby instructions.
 Input of one instruction depends upon the output of a preceding instruction locate nearby
independent instructions o
 Issue and complete instructions in an order different than specified in the code stream
 Uses branch prediction methods rather than delayed branches RISC or CICS.

3. Microarchitecture:
Microarchitecture is basically the fundamental design of microprocessor.
A microarchitecture is basically the digital logic that allows an instruction set to be executed.
it's the combined implementation of registers, memory, arithmetic logic units, multiplexers,
and the other digital logic blocks.. All of this together makes the processor.
A microarchitecture combined with an instruction set architecture (ISA) makes up the systems
computer architecture as a whole. Different microarchitectures can implement the same ISA,
for the power efficiency or execution speed. The most basic processor will include a register file,
an ALU, system memory, and a control units that allow the processor to make decisions based
on the instruction it is been executing.

4. Intel core microarchitecture:


Intel core microarchitecture referred to as , Intel Core two Solo
ULV, Intel Core design, Core two Solo ULV, Intel Core ,Clovertown, Core 2 ULV, Intel Conroe,
Intel P8, Intel Next Generation Microarchitecture, T5850, Core design, Intel ULV, Core
Microarchitecture, Core Intel Core two ULV, 80886 Collapse.
The Intel Core microarchitecture (previously referred to as the Next-Generation
MicroArchitecture may be a multi-core processor microarchitecture undraped by Intel in Q1
2006. It's supported the Yonah processor style and may be thought-about associate iteration of
the P6 microarchitecture, introduced in 1995 with Pentium professional. The high power
consumption and warmth intensity, the ensuing inability to effectively increase clock speed,
and alternative shortcomings like the inefficient pipeline were the first reasons that Intel
abandoned the NetBurst microarchitecture and switched to utterly totally different branch of
knowledge style, delivering high potency through alittle pipeline instead of high clock speeds.
The Core microarchitecture ne'er reached the clock speeds of the Netburst.

THE END…!

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