Synchronous Sequence Machines and FSM

❖Sequential circuit:
Its outputs a function of external inputs as well as stored
information.

❖ Finite-state machine (FSM):

Abstract model to describe the synchronous sequential
machine and its spatial counterpart, the iterative network.

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Sequential Circuits :
❖ Consist of a combinational circuit to which storage elements
are connected to form a feedback path
❖ State -- the state of the memory devices now, also called
current state .
❖ Next states and outputs are functions of inputs and present
states of storage elements

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Sequential Circuit Analysis:

❖ The behavior of a clocked sequential circuit is determined from --

→The inputs
→The outputs
→The state of its flip-flops
❖ The outputs and the next state are both a function of the inputs and
the present state
❖ To analyze a sequential circuit, we can use
→ State equations
→ State table
→ State diagram
→ Flip-Flop input equations

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State Equations:
❖ Specify the next state as a function of the present state and inputs
→ Also called transition equation
❖ Analyze the combinational part directly
EX:

A(t+1) = A(t)x(t) + B(t)x(t)

=>A(t+1) = Ax + Bx

B(t+1) = A’(t) x(t)

=>B(t+1) = A’x

y(t)=[A(t)+B(t)] x(t)
=>y=(A+B)x’

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State Table:

❖ Enumerate the time sequence of inputs, outputs, and flip-flop states.

→Also called transition table
→ Similar to list the truth table of state equations
❖
❖Consist of four sections
→ Present state, input, next state, and output

❖ A sequential circuit with m flip-flops and n inputs need 2^(m+n)

rows in the state table

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State Table:

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Second Form of State Table:
❖ The state table has only three section: present state, next state, and
output .
❖The input conditions are enumerated under next state and output
sections.

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State Diagram:
❖ Graphically represent the information in a state table.
→ Circle: a state (with its state value inside)
→ Directed lines: state transitions (with inputs/outputs above)

❖Ex: starting from state 00

→ If the input is 0, it stays at state 00 with output=0
→ If the input is 1, it goes to state 01 with output=0

❖The state table is easier to derive from a given logic diagram and state
equations.

❖The state diagram is suitable for human interpretation.

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State Diagram:

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Flip-Flop Input Equations:
❖To draw the logic diagram of a sequential circuit, we need
→ The type of flip-flops
→ A list of Boolean expressions of the combinational circuits.

❖The Boolean functions for the circuit that generates external outputs is
called output equations

❖The Boolean functions for the circuit that generates the inputs to flip-
flops is flip-flop input equations
→ Sometimes called excitation equations

❖The flip-flop input equations provide a convenient form for specifying

the logic diagram of a sequential circuit.
❖Ex: Refer diagram on slide no-04

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Analysis with D Flip-Flop:

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Analysis with Other Flip-Flops:
❖ The sequential circuit using other flip-flops such as JK or T type can
be analyzed as follows

▪ Determine the flip-flop input equations in terms of the present

state and input variables .

▪ List the binary values of each input equation.

▪ Use the corresponding flip-flop characteristic table to determine

the next state values in the state table.

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Analysis with JK Flip-Flops (1/2):

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Analysis with JK Flip-Flops (2/2):

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Analysis with T Flip-Flops (1/2):

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Analysis with T Flip-Flops (2/2):

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 Mealy and Moore Model

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Moore Machines: Moore machines are finite state machines with output
value and its output depends only on present state.

It can be defined as (Q, q0, ∑, O, δ, λ) where:

Q is finite set of states.
q0 is the initial state.
∑ is the input alphabet.
O is the output alphabet.
δ is transition function which maps Q×∑ → Q.
λ is the output function which maps Q → O.

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Moore Machines:

➢In the moore machine shown in Figure 1, the output is represented with
each input state separated by /.
➢The length of output for a moore machine is greater than input by 1.
Input: 11
Transition:
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δ (q0,11)=> δ(q2,1)=>q2
Mr. P D Sawant
Output: 000 (0 for q0, 0 for q2 and again 0 for q2)
Moore Machine –
➢ Output depends only upon present state.

➢ If input changes, output does not change.

➢ More number of states are required.

➢ There is less hardware requirement for circuit implementation.

➢ They react slower to inputs(One clock cycle later).

➢ Synchronous output and state generation.

➢ Output is placed on states.

➢ Easy to design.
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Mealy Machines: Mealy machines are also finite state machines wit
h output value and its output depends on present state and current
input symbol.
It can be defined as (Q, q0, ∑, O, δ, λ’) where:
Q is finite set of states.
q0 is the initial state.
∑ is the input alphabet.
O is the output alphabet.
δ is transition function which maps Q×∑ → Q.
‘λ’ is the output function which maps Q×∑→ O.

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 Mealy Machines:

In the mealy machine shown in Figure 1, the output is represented with e

ach input symbol for each state separated by /.
The length of output for a mealy machine is equal to the length of input.
Input:11
Transition: δ (q0,11)=> δ(q2,1)=>q2
Output: 00 (q0 to q2 transition has Output 0 and q2 to q2 transition also
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0)
Mealy Machine –
➢ Output depends on present state as well as present input.

➢ If input changes, output also changes.

➢ Less number of states are required.

➢ There is more hardware requirement for circuit implementation.

➢ They react faster to inputs.

➢ Asynchronous output generation.

➢ Output is placed on transitions.

➢ It is difficult to design.
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 State Reduction and Assignment
State Reduction:
❖ Reducing the number of states in a state table, while keeping the
external input-output requirements unchanged.
Example:
▪ Total 7 states
▪ A sequence as follows

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 State Reduction Rules
❖Two states are said to be equivalent if, for every possible inputs, they
give exactly the same output and have equivalent next state

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 Further State Reduction
❖ After the first reduction, we can see that state d and state f will have
the same output and next state for both x=0 and x=1.
▪ Further reduce one state

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 Reduced State Diagram
❖ After reduction, the circuit has only 5 states with same input/output
requirements.

❖Original output sequence:

❖Reduced output sequence:

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 Implication Chart Method (1/3)
❖ Step 1: build the implication chart

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 Implication Chart Method (2/3)
❖ Step 2: delete the node with unsatisfied conditions

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 Implication Chart Method (3/3)
❖ Step 3: repeat Step 2 until equivalent states found

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 State Assignment
❖ Assign coded binary values to the states for physical implementation.
❖ For a circuit with m states, the codes must contain n bits ,
→ where 2^n >= m
❖Unused states are treated as don’t care conditions during the design
▪ Don’t cares can help to obtain a simpler circuit.
❖ There are many possible state assignments
▪ Have large impacts on the final circuit size.

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 Popular State Assignments
❖ Binary: assign the states in binary order.
▪ Typical method without other considerations !

❖Gray code: assign the states by gray code.

▪ Lower power consumption during state transitions (if in order)

❖One-hot: assign a specific flip-flop for each state

▪ Simplify the circuit design but may have larger hardware cost.

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 Design Procedure
❖ Design procedure of synchronous sequential circuits:
➢Derive a state diagram for the circuit from specifications.

➢ Reduce the number of states if necessary.

➢ Assign binary values to the states.

➢ Obtain the binary-coded state table.

➢ Choose the type of flip-flop to be used.

➢ Derive the simplified flip-flop input equations and output equations.

➢ Draw the logic diagram.

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 Synthesis Using D Flip-Flops
❖ Ex: design a circuit that detects 3 or more consecutive 1’s at inputs

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 Synthesis Using D Flip-Flops
❖ Ex: design a circuit that detects 3 or more consecutive 1’s at inputs

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 Synthesis Using JK Flip-Flops
❖ Derive the state table with the excitation inputs.
❖ Other design procedures are the same.

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 Synthesis Using JK Flip-Flops

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 Synthesis Using T Flip-Flops
❖ Derive the state table with the excitation inputs.
❖ Other design procedures are the same.

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 Synthesis Using T Flip-Flops

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 Thank you

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