MICROPROCESSOR AND INTERFACING

8085 MICROPROCESSOR

COMPUTER ENGINEERING DEPARTMENT

SEMESTER: 6th
OUTLINES
 INTRUDUCTION OF 8085
 ARCHITECTURE OF 8085
 PIN FUNCTION OF 8085
 ADDRESS, DATA AND CONTROL BUSES
 INSTRUCTION CYCLE
 MACHINE CYCLE
 T-STATES
 MEMORY INTERFACING

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INTRUDUCTION OF 8085
 8085 is an 8-bit microprocessor

 The processor consists of 16-bit and 8-bit address and data lines and so
the capacity of the device is 216 which is 64KB of memory.

 The configurations of 8085 microprocessor mainly include data bus-8-

bit, address bus-16 bit, program counter-16-bit, stack pointer-16 bit,
registers 8-bit, +5V voltage supply, and operates at 3.2 MHz single
segment CLK

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ARCHITECTURE OF 8085
 The architecture of the 8085 microprocessor mainly includes :
Timing & control unit
Arithmetic and logic unit
Decoder
Instruction register
Interrupt control
Register array
Serial input/output control.
 The most important part of the microprocessor is the central processing unit
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ARCHITECTURE OF 8085

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ARCHITECTURE OF 8085
Operations of the 8085 Microprocessor:
 The main operation of ALU is arithmetic as well as logical which includes addition,
increment, subtraction, decrement, logical operations like AND, OR, Ex-OR,
complement, evaluation, left shift or right shift.

 Both the temporary registers as well as accumulators are utilized for holding the
information throughout the operations then the outcome will be stored within the
accumulator.

 The different flags are arranged or rearrange based on the outcome of the operation.

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ARCHITECTURE OF 8085
Flag Registers :
 The flag registers of microprocessor 8085 are
classified into five types namely sign, zero, auxiliary
carry, parity and carry. D7 D6 D5 D4 D3 D2 D1 D0

 The positions of bit set aside for these types of S Z - AC - P - CY

flags. After the operation of an ALU, when the
result of the most significant bit (D7) is one, then
the sign flag will be arranged.
 When the operation of the ALU outcome is zero
then the zero flags will be set. When the outcome
is not zero then the zero flags will be reset.

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ARCHITECTURE OF 8085
Flag Registers :
 In an arithmetic process, whenever a carry is
produced with the lesser nibble, then an auxiliary type
carry flag will be set.
D7 D6 D5 D4 D3 D2 D1 D0
 After an ALU operation, when the outcome has an
even number then the parity flag will be set, or else it is S Z - AC - P - CY
reset.
 When an arithmetic process outcome in a carry, then
carry flag will be set or else it will be reset. Between the
five types of flags, the AC type flag is employed on the
inside intended for BCD arithmetic as well as remaining
four flags are used with the developer to make sure the
conditions of the outcome of a process.

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ARCHITECTURE OF 8085
Control and Timing Unit:
 The control and timing unit coordinates with all the actions of the
microprocessor by the clock and gives the control signals which are
required for communication among the microprocessor as well as
peripherals.

Decoder and Instruction Register:

 As an order is obtained from memory after that it is located in the
instruction register, and encoded & decoded into different device cycles.

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ARCHITECTURE OF 8085
Register Array:
The general purpose programmable registers are classified into several types
apart from the accumulator such as B, C, D, E, H, & L.

These are utilized as 8-bit registers otherwise coupled to stock up the 16 bit of
data.

The permitted couples are BC, DE & HL, and the short term W & Z registers are
used in the processor

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ARCHITECTURE OF 8085
Special Purpose Registers:
 These registers are classified into four types namely program counter,
stack pointer, increment or decrement register, address buffer, or data
buffer.
 Program Counter (PC): It is basically a special purpose register that is
used to store the memory location of the instruction to be performed. As it
is clear that in order to fetch an instruction from the memory the
microprocessor needs to know about its address.

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ARCHITECTURE OF 8085
Special Purpose Registers:
 Stack Pointer (SP): It is also a 16-bit register and is a part of memory. The
data is stored in the stack in serial format and stack pointer generally stores
the address of the last data element stored in the stack. Thus the stack is
based on LIFO.

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ARCHITECTURE OF 8085
Address Bus and Data Bus:
 The data bus is useful in carrying the related information that is to be
stock up. It is bi-directional

 Address bus indicates the position as to where it must be stored & it is

unidirectional, useful for transmitting the information as well as address
input/output devices.

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 PIN FUNCTION OF 8085
 An 8085 microprocessor is an IC with 40 pins and operates with +5V
power supply.

 The pin configuration plays a very important role in understanding the

architecture of 8085 microprocessor.

 The signals of this 40 pin IC is grouped into 7 categories.

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PIN FUNCTION OF 8085

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 PIN FUNCTION OF 8085
1. Power supply and clock signals
2. Data bus
3. Address bus
4. Serial I/O ports
5. Control and status signals
6. Interrupts and externally generated signals
7. Direct memory access

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 PIN FUNCTION OF 8085
Power supply and clock signals:
 In 40 pin configuration, 4 pins are allotted to this particular category.

 VCC – External power supply of + 5 V is provided

 VSS – This pin shows the grounded connection of the microprocessor.
 X1 and X2 – These 2 pins are connected with a crystal to maintain the
internal frequency of the clock generator.
 CLK (OUT) – Acts as the system clock that keeps the record of time
duration required by each operation to get completed.

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 PIN FUNCTION OF 8085
Address bus:
 contains 8 pins. The address bus has 16 lines i.e.; it can carry 16 bits at a time.

 Out of 16, 8 are multiplexed with the data bus and the leftover 8 are
separately

 Used to carry the address of data and instruction from the processor to the
memory location and is unidirectional in nature.

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 PIN FUNCTION OF 8085
Data bus:
 contains 8 pins.

The size of the data bus of the 8085 microprocessor is 8 bits.

The address bus is denoted by A whereas the data bus is denoted by D.

The pin configuration denotes the lower order multiplexed address and
data bus bits from AD0 to AD7.

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 PIN FUNCTION OF 8085
Serial I/O ports:
 It has basically 2 pins.

SID – SID denotes serial input data pin. With this pin, data is serially fed to
the processor directly through the input devices.
SOD – SOD denotes serial output data pin. Once the data is processed in
the microprocessor then this pin represents bit by bit results at the output
devices.

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 PIN FUNCTION OF 8085
Control and status signals:
 6 pins of the pin configuration are used by control and status signals.

ALE – ALE is an acronym for Address Latch Enable. We know that 8 lower
order bits of the 16-bit address bus are multiplexed with the 8-bit data bus.
This pin gets enabled at the time when the address is present at the
multiplexed address and data bus. Otherwise, it gets disabled showing the
absence of an address on the bus.

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 PIN FUNCTION OF 8085
Control and status signals:
 RD – A low signal in this pin shows the read operation either from I/O
devices or from the memory unit. Thereby indicating that the data bus is
now in a state or position to accept the data from the memory or I/O
devices.
WR – A low signal in this pin represents the write operation at the
memory or I/O devices. This indicates that the data present in the data bus
is to be written into the desired memory address or I/O device by the
processor.
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 PIN FUNCTION OF 8085
Control and status signals:
 IO/M – Indicates the selection of a memory address or input-output
device. This shows whether the read/write operation is to be carried out at
the memory location or at the I/O device.

S0 and S1 – The pins S0 and S1 represent the status signal at pin number.
These signals show the type of recent operation of the microprocessor.

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 PIN FUNCTION OF 8085
Control and status signals:


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 PIN FUNCTION OF 8085
Interrupts and externally generated signals:
 Interrupts are the signals that are generated to break the sequence
of an ongoing operation.

When an interrupt signal is generated then CPU immediately stops

its recent task under operation and switches to some other program
known as interrupt service routine (ISR).

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 PIN FUNCTION OF 8085
Interrupts and externally generated signals:
 5 types of interrupts are shown by 5 different pins from pin

 Out of the 5 major interrupts 4 are the mask-able interrupts. These are
INTR, RST5.5, RST6.5, RST7.5 and are easily manageable interrupts.

 However, TRAP is a non-maskable interrupt and holds the topmost

priority among all interrupts in the 8085 microprocessor

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 PIN FUNCTION OF 8085
Interrupts and externally generated signals:
 On receipt of an interrupt, the microprocessor acknowledges the
interrupt by the active low INTA (Interrupt Acknowledge) signal.

 Reset In (input, active low): This signal is used to reset the

microprocessor. The program counter inside the microprocessor is set to
zero.
 Reset Out (Output): It indicates CPU is being reset. Used to reset all the
connected devices when the microprocessor is reset.

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 PIN FUNCTION OF 8085
Direct memory access:
 When 2 or more devices are connected to a common bus, to prevent the
devices from interfering with each other, the tristate gates are used to
disconnect all devices except the one that is communicating at a given
instant.

The CPU controls the data transfer operation between memory and I/O
device. Direct Memory Access operation is used for large volume data
transfer between memory and an I/O device directly.

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 PIN FUNCTION OF 8085
Direct memory access:
 HOLD: signal is generated by the DMA controller circuit. On receipt of this
signal, the microprocessor acknowledges the request by sending out HLDA signal
and leaves out the control of the buses. After the HLDA signal the DMA
controller starts the direct transfer of data.
READY (input): Memory and I/O devices will have slower response compared
to microprocessors.
Before completing the present job such a slow peripheral may not be able to
handle further data or control signal from CPU. The processor sets the READY
signal after completing the present job to access the data. The microprocessor
enters into WAIT state while the READY pin is disabled.

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