‘TRIBHUVAN UNIVERSITY INSTITUTE OF ENGINEERING | Leve __ Examination Control Division | Programme: BEX,BEL, BCT Pass Marks 32 2080 Bhadra Time Shes. “Subject: - Comp Y Candidates are required to give their answers in their own words as far as practicable. Y Aitempt All questions. ¥ The figures in the margin indicate Full Marks. v¥ Assume suitable data if necessary. 1. Discuss about the usage of a Multiple Hierarchical Bus Architecture over single bus system. {s] 2. Design a 1- bit ALU which can perform addition, AND, OR, and X-OR operations. Explain the different types of instruction formats, [ae] 3, What is addressing mode? Explain about the different types of addressing modes with suitable example. 246] 4, Explain address sequencing with the help of 2 block diagram. Describe mioro-instruction format in detail. [543] 5. Show that the Speedup factor for a Pipelined Processor is equal to the number of stages in a pipelice. Explain about the diffezent types of conflicts that ean be seen in apipetine. (46) 6, Explain booth’s algorithm, Multiply (9 x-4) using Booih’s multiplication algorithm. (446) 7. Compare restoring division algorithm with non restoring division algorithm. (6) 8, Explain direct Cache mapping technique with example. Explain different write policy techniques in cache memory. i743] 9, Explain three VO techniques for input of a block of data, Show the role of YO processor to assist the operation of the CPU, [o4} 10, List out the characteristics of a Multiprocessor. 4 eerauewvaNonweRstrY | INSTITUTE OF ENGINEERING Level BE Full Marks . 80 Examination Control Division {Programme BEX, BCL BET Rass Maris 32 2081 Baishakh Year /Part _ Subject: - Compr Organization and Architecture (CF 603) Candidates are required to give their aaswers in their own wonds as far as practicable, Attempt All questions. The figures in the margin indicate Full Marks. Assume suitable data if necessary. SAAN Explain instruction eycle state diagram, Deseribe PCT bus configuration, B43} % ‘Write program for N = (P-QxRY/S)#((T/U}+VxW) using three address, two address, one address and zero address instruction format. Consider N, P, Q, R, §, T, U, V and W as memory locations. [8] 3. Write down the different types of addressing modes and explain each of them with advantages and disedvaniages. (8) 4 Explain the micro instruction format. Difference between symbolic and binary inicro instruction, . [444] 5. Construet time-space diagram for four instructions with four-stage pipeline ahd show how Pipelining reduces the execution time? Explain arithmetic pipeline for solving floating: point addition/subtiaction, (545) 6. Draw the flowchart for Restoring Division, Divide Hsing restoring division. [s+6} 7. Multiply 10 (-7) using Booth’s multiplication algorithm, fo) 8. Explain in briefly the characteristics of a memory system, Differentiate between direct mapping and set associative mappiig. : (347) 9. ‘Why IOP is used in input-output organization? With the help of a neat diagram, explain how DMA technique is used to transfer data in a computer system. B47} 10. Diseuss about loosely-coupled and tightly-coupled architecture. rc)“TRIBHUVAN UNIVERSITY INSTITUTE OF ENGINEERING Examination Control Division 2080 Baishakh Y Candidates are required to give their answers in their own words as far as practicable. Y Atterspt All questions. Y The figures in the margin indicate Full Marks, Y Assume suitable data if necessary. | Define structure and function of 2 computer system. Daw instruction cycle state diagram with interrupt. [442] 2. Write down the code to evaluate x= Ac Bete in three address, two address, one address and zevo address instruetioa formats, (8) 3, What are the different types of addressing modes? Compare them with advantages and disadvantages. {246} 4, Diffecentiate between haedwited and micro programmed contro! unit. Explain with block diagram of micto programmed control unit [5+5] 5. How can we prove that pipelining improves the performance of a computer? Explain the operation of instruction pipeline for processing four segment instruction eycle with the help of space-time diagram, (4+6] 6. Explain non-restoring division algorithm with flow chart and also divide 12/5 using same algorithm. {S*5] 7, Multiply -6x7 using Booths taultiplication algorithm, 6] 8. What is set associative mapping? Explain how it combines the feature of direct and associated mapping technique. Explain different replacement algorithm techniques used in cache memory. (24343) 9, Explain CPU-IOP Communication with diagram. Explain DMA controller with suitable block diageam. [545] 10. {Explain the crossbar switch interconneetion structure with block diagram. 4] wot‘TRIBHUVAN UNIVERSITY INSTITUTE OF ENGINEERING Candidates are required to give their answers in their own words as far as practicable. Attempt All questions. ¥ v ¥ The figures in the margin indicate Full Macks, ¥ Assume suitable data if necessary. . Explain about the structural and fumetional viewpoint of a computer. Explain different elements of bus design, Write a code for X = ((A+B)/C) + (D - FE) using three addresses, two addresses, one address and zero address instruction format. 3. List out the different types of addressing modes aud explain each of them with suitable example, 4. Describe the operation of hardwired contro! unit with a typical block diagram. Explain the operation of microprogram sequencer used in microprogrammed control unit, 5. Explain arithmetic pipelining with example, Describe different types of pipeline hazards with exemple. 6. Draw the flowchart for Non-Restoring Division. Perform 13/5 using restoring division. 7. Bxplain floating poiat addition and subtraction algorithm with an example. 8. Describe how Set-Associative Mepping wotks in Cache memory mapping, Explain different write policy techniques in cache memory. 9. Blaborate the roles of /O interface in a computer system, Explain how data transfer is performed with programmed 1/0 technique with necessary diagram, 10,Compare snd contrast the interconnection structures used in multiprocessing environment. eH {442} (81 [8] [545] [46] [46] {6 [345] (10) a‘TRIBHUVAN UNIVERSITY INSTITUTE OF ENGINEERING Examination Control Division 2079 Baisbakh Subject: sion and Architecture (C603) ¥ Candidates are required to give their answers in their own words as far as practicable. Y Attempt A questions. Y. The figures in the margin indicate Full Marks. ¥ Assume suitable data if necessary. 1. What is performance balance and why itis required? Explain different elements of Pus design. [2+4] 2. Describe the instruction cycle state diagram. Write down the code to evaluate eA BHOMEHG) in tree addresses, two address, one adress and ero address instruction formats. (446) 4, List out the different types of addressing modes and explain them with suitable example for each. {8] 4. Differentiate between control memory and main memory, Draw the block diagram of Mictoprogram Sequencer for 2 contral memory, explain its operations. [3+7] 5. What is vector processing? How pipelining improves the performance of @ computer? Explain with an example. {0} 6. Explain restoring division algorithm, Use this algorithm to divide 31 (Dividend) by 33 (divisor). {8} 7. Bxplain floating point mukiplicaton algorithm with an example. (dl & What do you mean by write policy? Discuss and differentiate direst mapping and associative mapping functions in eache design. (8) 9, What are the functions of VO Module? Why priority interrupt is naeded for data transmission between COU and W/O device, Explain the types of priority interrupt in detail. [19] Lo. Compare and contrast the interconnection structures used in multiprocessing environment, 4] wee. TRIBHUVAN UNIVERSITY INSTITUTE OF ENGINEERING BE Full Marks | 80 Examination Control Division | Programme | BEX,BCT | Pass Marks | 32 2078 Kartik (Near/Part It 7i Fine Tie | Subject: - Computer Organization and Architecture (CT 603) Candidates are required to give their answers in their own words as fur as practicable, Attempt Alf questions. The figures in the margin indicate Full Marks. Assuine suitable data if necessary. Ass] Differentiate between computer organization and architecture. Compare and explain the bus structure of typical computer system. +4] 2. Write down the code for ¥ = (A-B/C) = (D+ExG) / F using three address, two address, one address and zero address instruction format. (8) 3. Comparison between different types of addressing modes with its advantages and disadvantages. {10] 4. Write down the symbolic microprogram for fetch routine aad addition execute routine. Explain with diagram the working of microprogram sequencer for control memory. [446] 5. How pipeline processing is done in an instruction pipeline? Explain four segment instruction pipeline with timing diagram. B45) 6. Describe the procedure for floating point addition and subtraction with kelp of flowchart and example. [6] 7. Draw the flowchart of Booth’s multiplication algorithm and multiply -7 * -10 using Booth's multiplication algorithm. a4] 8, Explain various mapping methods used in cache memory organization and compare each of them with example, [10] 9, Explain with biock diagram of DMA controller. How DMA techniques is different from programmed Input-Output? [+4] 10. Differentiate between tightly coupled multiprocessor and loosely coupled multiprocessor. [4] a‘TRIBHUVAN UNIVERSITY Eun. INSTITUTE OF ENGINEERING Level BE Examination Control Division | Programme | BEX, BEL BCT | Pam Maris 2 | 2078 Bhadra Yeor/Part [ii/T "Time Sit. Subject: Computer Organization and Architecture (C603) ¥ Candidates are required to give their answers in their own words as far as practicable. ~ Attempt All questions. Y The figures in the margin indicate Full Marks, Y Assume suitable data if necessary. 1. Explain different types of bus arbitration and compare them. {6 2. Explain different types of data manipulation instructions with example. [8] 3. Explain the component of CPU. Comparison between RISC and CISC architecture, [246] 4. Explain the organization structure of a microprogram control unit atid the generation of control signals using microprograna. Lol 5. What is meant by hazard in pipelining? Explain with example data and control hazards in Pipeline conffict. : (416) 6, Explain the non-testoring division algorithm for division. Divide 10/5 using non-restoring division. [5+5] 7. Explain the floating point addition and subtraction Process using flow chart. (3+3] $. Explain Least Recently Used (LRU) replacement algorithm in case of hit and miss with suitable example. [8] 9. Differentiate between igoleied and memory mapped Input-output. Explain with block diagram of DMA transfer in ‘a comtputer system, [46] 10, Compare and contrast the interconnection structures used in multiprocessor system, cc} ‘ . ee‘TRIBHUVAN UNIVERSITY [ee INSTITUTE OF ENGINEERING BE Examination Control Division [Programme ‘BEX, BCT, 2076 Chaitra (Wear/Part (77 Candidates ate required to give their answers in their ow words as far 9s practicable. Atiempt All questions. The figures in the margiv indicate Full Marks. Assume suitable data if necessary. SAKK ‘Draw the instmotion oycle state diagram with example. {6 Write down the code to evaluate Y = (A - BO)*[ D + (E*G) ] in three address, two address, one address and zero acidress instruction formats. [8] 3. Define addressing modes. Mention the different types of addressing modes and comparison between them. [2+6} 4, How address of micro instruction is generated by next address generator in control unit? Explain with suitable diagram. (8 5, Explain four stage instruction pipeline and also draw a time-space diagram for four © segments having six tasks. [10] 6. Explain the Bootb’s algorithm for multiplication. Multiply 10 x (5) using Booth’s multiplication algorithm. [545] Comspatison between restoring and non-restoring divisionvalgorithms with example. {6 8. Define cache mapping techniques. Explain direct mapping technique with suitable diagram. Why replacement algorithm is necessary in associative mapping? Justify. {2+4*4] pv 9. Comparison between program IL0, Interrupt driven 110 and direct memory access. Why data communication processor is required in an 110 organization. [842] 10. Diseuss about hypercube interconnection network with example. io} wir“TRIBHTIVAN UNIVERSITY INSTITUTE OF ENGINEERING Examination Control Division | Pros 2076 Ashwin (Near /Par Candidates are required 0 give their answers in their own words as far as practicable, v Attempt AU questions. ¥ The figures in the margin indicate Full Marks. Y Assume suitable data if necessary. 1. What is PCI? Explain the design goals and performance metries for a computer system regarding its orgenization and architecture [45] 2, Write the arithmetic statement Y=(W+X)*(Y-Z) using Zero, One, Two and Three address instruction format. 18} 3, Explain the different types of addressing modes and compare each of them. {8} 4, Explain block diagram of micro-programmed control organization. Describe various fields in micro-instruction format with diagram showing different fields. [46] 5, Deseribe the hazard in a pipeline. Explain the different types of hazards. How can these be overcome? (24133 6. Write an algorithm of booth multiplication. Perform 8x4 using booth multiplication algorithm. (109) 7. Diffeventiate between sestoring division and non-restoring division and non-restoring division algorithm. {61 8. Deseribe cache operation in briefly. Explain about associative mapping technique. Give reasons why replacement algorithm is not required in direct mapping technique. [24612] 9, Fixplain the DMA operation with block diagram. How does DMA. have request over the CPU when both request a memory transfer? [812] 10. Discuss about tightly-coupled multiprocessor with block diagram. i 8‘DUBHUVAN UNIVERSITY INSTITUTE OF ENGINEERING Examination Control Division 2075 Chattra Computer Organization and Architecture (CT 603) ¥ Candidates are required to give their answers in their own words as far as practicable, ¥ Attempt All questions. v ¥ ‘The figures in the margin indicate Full Marks, Assume suitable data if necessary. |. Define computer architecture, Discuss the limitations of using single bus system to connect different devices. What does width of address bus represent in a system? 124242] 2. Design an 2-bit ALU that can perform subtraction, AND, OR and XOR. 18] 3. Write a code for Y=(A¥B)C + Di(E*F) using three address, two address, one address and zero address instruction format. [8] 4. Differentiate hardwired and micro-programmed control unit. Draw end explain block diagram of micro-programmed sequencer for control memory. [oy 5. - Derive expression showing speed up ratio equals number of segments in pipeline, Discuss “in detail about data dependency problem that arises in pipelining along with itssolution. [345] 6." Write an algorithm for non restoring division, Perform the 10/3 using restoring division * algorithm, G7] 7. Multiply -6x-11 using Booths Multiplication algorithm. (6) 8." Write characteristics of memory system? Suppose main memory has 64 blocks and cache memory has 8 blocks when 10 blocks of main memory are used, show how mapping is performed in direct mapping technique. [436] 9. Explain three reasons behind the requirement of I/O interfaces. Why memory address spaces are reduced memory mapped 1/0 ? Describe DMA controller with suitable block diagram. [342+5] 10. Explain inter-processor synchronization with example, 14) 08SON “AIBHUVAN UNIVERSITY (ia INSTITUTE OF ENGINEERING [Lev Examination Controt Division BEX,BCT | Pass Marks | 32 2074 Ashwin ._ —— Architecture (C7603) Y Candidates are required to give their answers in their own words as far as practicable, “"¥_Astempt All questions. one Oye in thegnatgin indice? Full Marks. aq #67 Agsumne suitable data ij pede sary. ‘ yee 1. Explain instruction cycle state diagram with interrupt, 6) 2, Write codes using 3, 2, 1 and 0 address instruction formats to perforin given operation. [8] X=(A*B/C)-O+E/F) 3, Describe various fields in microinstruction format. Explain about the sequencing techniques Used in microinstruction format with necessary diagram. 0] 4, Explain mioroinstraction format showing all the fields in det. Write symbolic microprogram for fetch cycle. (10) <5." Explain arithmetic pipeline with 2u example of 4 segments, Deseribe different types of array processing. 64} 6. Write an algorithm flow chart and hard ware design of restoring division with example. {10} 7. Draw a flow chart for floating. point multiplication algorithm. {4] 8, Explain about associative mapping technique, Give reasons why replacement algorithm is ~ ” Fequired in associative mapping technique? [8] 9, Explain the block diagram of DMA controller and also explain how DMA is used to transfer daia from peripheral. . [oy 10. Differentiate between tightly coupled multiprocessors and loosely coupled multiprocessors. (4) a6 TRIBHUVAN UNIVERSITY Exam. INSTITUTE OF ENGINEERING, [Level BE Full Marks [80 Examination Control Division Programme | BEX,BCT | Pass Marks | 32 2073 Chaitra ‘Year /Pare | H/T “Time Shes, | ‘Subject: - Computer Organization and Architecture (CT603) ‘Candidates are required to give their answers in their own words as far as practicable. Attenpt All questions. The figures in the margin indicate Full Marks, me Assume suitable data if necessary. yo ASAN Explain instruction cycle state diagram with interrupt. 2. Write a code for Y = A(B+C) + D+E)*F using three address, two address, one address and zero address instruction format, [8] 3. Explaimdifferent types of data manipulation instructions with examples. [10] 4. Why is micro-programmed contro! unit more flexible as compared to hardwired control unit? Explain the sequencing technique used in control memory. [10] 5, Explain the function of four segment pipeline and also draw a space diagram for four segment pipeline with example. {10] 6. Write ‘an algorithm for division of floating point numbet. [4] 7. Explain Booth algorithm of multiplication with hardware implementation diagram and multiply-10%6. [19] 8. Explain major characteristics of memory. Explain LRUC (Least Recently Used) replacement policy with example. {81 9. Why W/O processor is necessary in an input-dutput organization? Explain about DMA - control with necessary diagram. (10) 10, Design for 4x4 omega switching network and show the switch setting required to connect input 3 to output 1. 14] aea7 ‘TRIBHUVAN UNIVERSITY INSTITUTE OF ENGINEERING Examination Control Division i yme | BEX, BCT _| Pass Marks 2073 Shrawan (Year /Part_[ii71 Time | Sbrs 7 ‘Subject: - Computer Organization and Architecture (C7603) Y Candidates are required to give their answers in their own words as far as practicable, v Atiempt Ail questions. Y The figures in the margin indicate Full Marks. Y Assume suitable data if necessary. 1. What do you mean by intercomection stincture? Explain different types of. interconnections indeed required in Computer Architecture. RH] 2. Write a code for Y=A*(B+D/C)+(G*E)/F using three addresses, two address, one address and zero address instruction format. it 3. Following instructions are given: [10] ) LDA 2000H ii) MVIB, 32H Which addressing modes are used in the above instructions? Explain briefly about them. 4, Explain microinstruction format used in mictoprogremming Control unit and write micro progtam for fetch cycle. [e+4} 5. Explain in detail how the arithmetic pipeline increases the performance of a system. m 6.. "RISC has the ability to use efficient instruction pipeline", Justify the statement, Bl 7. Explain signed binary division algorithm. Use the non-restoring division algorithm to devide 15 by 4. i] 8. Explain floating point addition and subtraction algorithm with example. 6) 9, Describe how set associative mapping combines the feature of direct and associated ‘mapping technique. Explain different write policy techniques in cache memory. [543] 10, Why input-output processor is needed in an input-output organization? How does a computer know which device issued the interrupt; if multiple devices, how does the selection take place? (545) LL. Deseribe how the multiprocessor systems increase the performance level and retibility. —_(4] ee.e 36 skivvas vvansey a INSTITUTE OF ENGINEERING i! ‘Marks | 80 Examination Control Division [Programme 2072 Chaitra Y Candidates aré required to give their answets in their own words as far as practicable. Y Attempt All questions. Y The figures in the margin indicate Full Marks. ¥ Assume suitable data if necessary. 4, Define computer architecture and computer organization, How can we maintain a performance balance between processor and memory? Discuss the limitations of using single bus system to connect different devices in any given system. [2+2+2] 2, What do you mean by instruction format? Write codes for given operation using 3.,2-1- and 0- address instruction format, [4+8] X(A-B*E)*CHDE 3, Differentiate-between RISC and CISC. (6) 4, What factors cause micro-programmed control unit to be selected over hardwired control uit. Explain with relevant block diagram, how address of; control memory is selected in © micro-programrhed control unit: B+7] 5. Describe Flynn's classification. Explain contol pipeline hazard and its solutions. [46] 6.: Explain Booth’s multiplication hardware algorithm with diagram. Multiply:-5%-9 using ‘Bgoth's multiplication algorithm, . . [5+5] 7. Draw the flowchart for division of floating point numbers. . 4] 8.- Draw the memory hierarchy. Explain direct cache mapping with its merits and demerits. [246] 9. Differentiate between Isolated VO and Memory-mapped 1/0. Deserite DMA controller with suitable block diagram. [4+6] 10. Diseuss about inter process synchronization with the suitable mechanism? [4] nee36 TRIBHUVAN UNIVERSITY INSTITUTE OF ENGINEERING Examination Control Division Marie [80 Computer Organization and Arcl Candidates are required to give their answers in their own words as far as practicable, Attempt All questions. The figures in the margin indicate Fuell Marks, Assume suitable data if necessary. KASS | Differentiate between computer architecture and computer organization. Explain the computer fimotions with different cycles. 3], 2. Write a code for Y= (A+B)*(CHD)+G/E"F using three address, two address one address and zero address instruction format, ro} 3, Mention the different types of addressing mode and compare each other. {10} 4, Explain the address sequencer with the help of a. block diagram. Explain about microinstruction format in detail. [5+5] 5, Define pipeline and explain its types. Describe different pipeline hazards with example. [4+6] 6. Draw the flowchart for restoring division method. 14] 7. lixplain Booth multiplication algorithm. Multiply -6*12 using Booths algocithm, [461 8. Draw the memory hierarchy. Explain Associative Cache Mapping with example, [246] 9. What are the different types of priority interrupt? Explain the communication between CPU and JOP with necessary block diagram. [446] 10. Explain about multiprocessor and multiprocessing in brief. 4]cd TRIBAUVAN UNIVERSITY INSTITUTE OF ENGINEERING . Examination Control Division 2071 Chaitra Candidtes ae required to give their answers in their own words a fat as practicable. Attempt All questions. The figures in the margin tridicate Full Marks, Assume suitable data if necessary. RAK + What are the major differences between comptes architectuse and coinputir organization? ‘What does the width of data bus and address bus represent in agystem’? ‘Why'is bus hierarchy” required? on De] 2. Explain the general organization of register in CPU. Describe the operation of LD (load) instruction undér various addressing modes with syntax. 5 [64] 3, What are the different types of instructions? How éan: you perform’ X = (A+B) x (CHD) __ Qperdtion by using zero, one, two and thret address instnicton format Assume A,B,CD,X ‘are memory address. : B+5] “4. What is address sequencing? Explain the selection of address for eotrol memory. with its block diageam, . [B+7] 5.. Explain the Arithmetic pipeline and instruction pipeline with example. ~ {10} 6. Draw the flowehadt for: floating point Division, . cy 7, Design a booth multiplication algorithen hardware. Multiply 5 and -§ using booth multiplication algorithm. . [4+4) 5. Explain cacte organization. Explain the cache mapping techniques with example. ia+6] 9. Highlight the role of 1/0. interfice in a computer system. ‘Describe. the “drawbacks of Programmed VO and interrupt driven 1/O and explain how DMA overcomes thei drawbacks [446] 10. How can multiprocessor be classified according o their metry oreanization? Explain. [4] vas37 TRIBRUVAN UNIVERSITY INSTITUTE OF ENGINEERING Examination Control Division 2071 Shawan Y Candidates are required to give theit answers in theiz own words as far as practicable. ¥ Attempt Ail questions. Y The figures in the margin indicate Full Marks, Y Assume suitable data if necessary. 1. What do you understand by Bus Intereonnection? What are the driving factors behind the need to design for performance? 2H] 2, Explain Instruction Format with its types? Illustrate the code to evaluate to evaluate: Y= (A+B) * (C+D) using three address, two address, one address and zevo address instruction formats, (216) 3, Describe the instruction cycle state diagram? Design a 2-Bit ALU that can perform addition, AND, OR operations. B43) 4, Explain the organization of a control memory. Discuss the microinsteuction {format with the help of a suitable example. [46] 5, Discuss bout parallel processing? How paralle! processing can be achieved {n pipelining, explain it with time-space diagram for four segments pipeline paving six tasks. [446] 6. Write down the detail algorithm of Booth Maltiptication. Illustrate the ‘multiplication of (9) and (-3) using 2's complement method. 1545] 7. What is Memory Hierarchy and why it is formed in computer system? Explain the Direct cache memory mapping technique using organization diagram and appropriate example. +6} & Whatare the functions of /O Module? What is the purpose of priority interrupt; explain priority interrupt types with key characteristics. B+ 9, Differentiate the following {4x3} a RISC and CISC : b. __ Restoring and Non-Restoring Division ©. Crossbar Switch and Multistage Switching Network soe .36 TRIBHUVAN UNIVERSITY INSTITUTE OF ENGINEERING Examination Control Division 2070 Chaitra "__ Subject: - Computer Organization and Architecture (CT603) Candidates are required to give their answers in their own words as far as practicable, Attempt All questions. The figures in the margin indicate Full Marks, Assume suitable data if necessary. SAA8 Explain the interconnection.of CPU with Memory and 10 devices along with different operations over them. (343] 2, Write down the Y = A/B+(CxD).+ F(H/G) equation in three address, two address, one address and zero address instruction. (8) 3. Mention the different types of addrescing modes. Compare each of them with algorithm as well as advantages and disadvantages. [oy 4. Differentiate between hardwired and micro-propranmed control unit. How does a sequencing logic work in micro-programmed control unit to execute a micro-program? [446] oS. Explain. the arithmetic pipeline and instruction pipeline with example, [10] 6. Explain the non-restoring division along with its algorithm, flowchart and example, 18 7... Explain the Booth algorithm and multiply Y = 89 using Booth algorithms. (4 8, Mention the ‘characteristics of computer memory. Differentiate between’ associative mappings and set associative mapping with example, (345) 9. How does DMA overcome the problems of programmed /O and interruptdriven 10 techniques? Explain. 15} 10. Why IOP is use in YO organization? Explain, 15) 11. Explain the characteristics of multiprocessors, i a37 TRIBEUVAN UNIVERSITY INSTITUTE OF ENGINEERING Examination Control Db 2079 Asbad Condidhtes are required to give their answers in heir own words as far as practicable, Attempt Ail questions. “The figures in the margin indicate Kull Marks, “Assume suitable data if necessary. 1. What is performance batanoe and why is it tequired? Explain different elements of bus éesign. 2, Define the addressing mode and explain the different wpes of addressing modes with example. 3, What are the stages of ALU design? Explain withthe example of 2-bit ALU performing addition, subtraction, OR and XOR. 4 What are the differences between hardwired implementation and micro-programmed implementation of control unit? Explain with steps involved when you are designing ‘miero-program control nit 5. ‘What is instruction hazacd in pipeline? What is the four segment instruetion. pipeline? Explain with example. 6. How division operation can be performed? Explain with ts hardware implementation, 7, Draw a flowchart of floating point subtraction, 3, What are the major differences between different caches mapping techniques? Suppose TN memory has 32 blocks and Cache memory has 8 blocks when 40 blocks of main Tnemory ate used, show how mapping is performed in direct mapping technique. 6, Differentiate between programmed UO, interupt-dtiven VO and direct memory access (DMA). 10, Explain the interprocessor synchronization with example. we ie 110] (81 [446] 8} 19) cl [62] 10] 437 TRIBHUVAN Univesity INSTITUTE OF ENGINEERING Examination Control Division 2069 Chaitra Candidates are required to give their answers in their own worde as fa ae practicable, ¥ Attempt All questions. ~The figures in the margin indicate. Full Marks, Y Assume suitable data if necessary. ~ Differentiate between computer organization and ezchitecture. What do you mean by bus interconnection? [343] 2. "What are the different types of instruction oats? Explain with example, [to] 3. Define data ‘Manipulation instruction. Expiain the logical and bit ‘manipulation instruction with mnemonic cade, [3+5) 4. What is address sequencing in control unit? Explain with necessary figure. [10 5. What is vector processing? How Pipelining improves the performance of a computer? Explain with example, [10 6. Explain the restoring division algorithm and hardware design with example. 0) 7.” Draw the flowchart of floating point maltiplication, . . : 4] 8. What is cache memory? What are the ‘different ‘ways the cache ‘can be hiapped? Explain ‘with example. +6] (0) [4]